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/*
* Etoms Et61x151 GPL Linux driver by Michel Xhaard (09/09/2004)
*
* V4L2 by Jean-Francois Moine <http://moinejf.free.fr>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
#define MODULE_NAME "etoms"
#include "gspca.h"
MODULE_AUTHOR("Michel Xhaard <mxhaard@users.sourceforge.net>");
MODULE_DESCRIPTION("Etoms USB Camera Driver");
MODULE_LICENSE("GPL");
/* specific webcam descriptor */
struct sd {
struct gspca_dev gspca_dev; /* !! must be the first item */
unsigned char autogain;
char sensor;
#define SENSOR_PAS106 0
#define SENSOR_TAS5130CXX 1
signed char ag_cnt;
#define AG_CNT_START 13
};
static const struct v4l2_pix_format vga_mode[] = {
{320, 240, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
.bytesperline = 320,
.sizeimage = 320 * 240,
.colorspace = V4L2_COLORSPACE_SRGB,
.priv = 1},
/* {640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
.bytesperline = 640,
.sizeimage = 640 * 480,
.colorspace = V4L2_COLORSPACE_SRGB,
.priv = 0}, */
};
static const struct v4l2_pix_format sif_mode[] = {
{176, 144, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
.bytesperline = 176,
.sizeimage = 176 * 144,
.colorspace = V4L2_COLORSPACE_SRGB,
.priv = 1},
{352, 288, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
.bytesperline = 352,
.sizeimage = 352 * 288,
.colorspace = V4L2_COLORSPACE_SRGB,
.priv = 0},
};
#define ETOMS_ALT_SIZE_1000 12
#define ET_GPIO_DIR_CTRL 0x04 /* Control IO bit[0..5] (0 in 1 out) */
#define ET_GPIO_OUT 0x05 /* Only IO data */
#define ET_GPIO_IN 0x06 /* Read Only IO data */
#define ET_RESET_ALL 0x03
#define ET_ClCK 0x01
#define ET_CTRL 0x02 /* enable i2c OutClck Powerdown mode */
#define ET_COMP 0x12 /* Compression register */
#define ET_MAXQt 0x13
#define ET_MINQt 0x14
#define ET_COMP_VAL0 0x02
#define ET_COMP_VAL1 0x03
#define ET_REG1d 0x1d
#define ET_REG1e 0x1e
#define ET_REG1f 0x1f
#define ET_REG20 0x20
#define ET_REG21 0x21
#define ET_REG22 0x22
#define ET_REG23 0x23
#define ET_REG24 0x24
#define ET_REG25 0x25
/* base registers for luma calculation */
#define ET_LUMA_CENTER 0x39
#define ET_G_RED 0x4d
#define ET_G_GREEN1 0x4e
#define ET_G_BLUE 0x4f
#define ET_G_GREEN2 0x50
#define ET_G_GR_H 0x51
#define ET_G_GB_H 0x52
#define ET_O_RED 0x34
#define ET_O_GREEN1 0x35
#define ET_O_BLUE 0x36
#define ET_O_GREEN2 0x37
#define ET_SYNCHRO 0x68
#define ET_STARTX 0x69
#define ET_STARTY 0x6a
#define ET_WIDTH_LOW 0x6b
#define ET_HEIGTH_LOW 0x6c
#define ET_W_H_HEIGTH 0x6d
#define ET_REG6e 0x6e /* OBW */
#define ET_REG6f 0x6f /* OBW */
#define ET_REG70 0x70 /* OBW_AWB */
#define ET_REG71 0x71 /* OBW_AWB */
#define ET_REG72 0x72 /* OBW_AWB */
#define ET_REG73 0x73 /* Clkdelay ns */
#define ET_REG74 0x74 /* test pattern */
#define ET_REG75 0x75 /* test pattern */
#define ET_I2C_CLK 0x8c
#define ET_PXL_CLK 0x60
#define ET_I2C_BASE 0x89
#define ET_I2C_COUNT 0x8a
#define ET_I2C_PREFETCH 0x8b
#define ET_I2C_REG 0x88
#define ET_I2C_DATA7 0x87
#define ET_I2C_DATA6 0x86
#define ET_I2C_DATA5 0x85
#define ET_I2C_DATA4 0x84
#define ET_I2C_DATA3 0x83
#define ET_I2C_DATA2 0x82
#define ET_I2C_DATA1 0x81
#define ET_I2C_DATA0 0x80
#define PAS106_REG2 0x02 /* pxlClk = systemClk/(reg2) */
#define PAS106_REG3 0x03 /* line/frame H [11..4] */
#define PAS106_REG4 0x04 /* line/frame L [3..0] */
#define PAS106_REG5 0x05 /* exposure time line offset(default 5) */
#define PAS106_REG6 0x06 /* exposure time pixel offset(default 6) */
#define PAS106_REG7 0x07 /* signbit Dac (default 0) */
#define PAS106_REG9 0x09
#define PAS106_REG0e 0x0e /* global gain [4..0](default 0x0e) */
#define PAS106_REG13 0x13 /* end i2c write */
static const __u8 GainRGBG[] = { 0x80, 0x80, 0x80, 0x80, 0x00, 0x00 };
static const __u8 I2c2[] = { 0x08, 0x08, 0x08, 0x08, 0x0d };
static const __u8 I2c3[] = { 0x12, 0x05 };
static const __u8 I2c4[] = { 0x41, 0x08 };
/* read 'len' bytes to gspca_dev->usb_buf */
static void reg_r(struct gspca_dev *gspca_dev,
__u16 index,
__u16 len)
{
struct usb_device *dev = gspca_dev->dev;
if (len > USB_BUF_SZ) {
gspca_err(gspca_dev, "reg_r: buffer overflow\n");
return;
}
usb_control_msg(dev,
usb_rcvctrlpipe(dev, 0),
0,
USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_INTERFACE,
0,
index, gspca_dev->usb_buf, len, 500);
gspca_dbg(gspca_dev, D_USBI, "reg read [%02x] -> %02x ..\n",
index, gspca_dev->usb_buf[0]);
}
static void reg_w_val(struct gspca_dev *gspca_dev,
__u16 index,
__u8 val)
{
struct usb_device *dev = gspca_dev->dev;
gspca_dev->usb_buf[0] = val;
usb_control_msg(dev,
usb_sndctrlpipe(dev, 0),
0,
USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_INTERFACE,
0,
index, gspca_dev->usb_buf, 1, 500);
}
static void reg_w(struct gspca_dev *gspca_dev,
__u16 index,
const __u8 *buffer,
__u16 len)
{
struct usb_device *dev = gspca_dev->dev;
if (len > USB_BUF_SZ) {
pr_err("reg_w: buffer overflow\n");
return;
}
gspca_dbg(gspca_dev, D_USBO, "reg write [%02x] = %02x..\n",
index, *buffer);
memcpy(gspca_dev->usb_buf, buffer, len);
usb_control_msg(dev,
usb_sndctrlpipe(dev, 0),
0,
USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_INTERFACE,
0, index, gspca_dev->usb_buf, len, 500);
}
static int i2c_w(struct gspca_dev *gspca_dev,
__u8 reg,
const __u8 *buffer,
int len, __u8 mode)
{
/* buffer should be [D0..D7] */
__u8 ptchcount;
/* set the base address */
reg_w_val(gspca_dev, ET_I2C_BASE, 0x40);
/* sensor base for the pas106 */
/* set count and prefetch */
ptchcount = ((len & 0x07) << 4) | (mode & 0x03);
reg_w_val(gspca_dev, ET_I2C_COUNT, ptchcount);
/* set the register base */
reg_w_val(gspca_dev, ET_I2C_REG, reg);
while (--len >= 0)
reg_w_val(gspca_dev, ET_I2C_DATA0 + len, buffer[len]);
return 0;
}
static int i2c_r(struct gspca_dev *gspca_dev,
__u8 reg)
{
/* set the base address */
reg_w_val(gspca_dev, ET_I2C_BASE, 0x40);
/* sensor base for the pas106 */
/* set count and prefetch (cnd: 4 bits - mode: 4 bits) */
reg_w_val(gs
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