/*
* Driver for Nuvoton Technology Corporation w83667hg/w83677hg-i CIR
*
* Copyright (C) 2010 Jarod Wilson <jarod@redhat.com>
* Copyright (C) 2009 Nuvoton PS Team
*
* Special thanks to Nuvoton for providing hardware, spec sheets and
* sample code upon which portions of this driver are based. Indirect
* thanks also to Maxim Levitsky, whose ene_ir driver this driver is
* modeled after.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
* USA
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/pnp.h>
#include <linux/io.h>
#include <linux/interrupt.h>
#include <linux/sched.h>
#include <linux/slab.h>
#include <media/rc-core.h>
#include <linux/pci_ids.h>
#include "nuvoton-cir.h"
/* write val to config reg */
static inline void nvt_cr_write(struct nvt_dev *nvt, u8 val, u8 reg)
{
outb(reg, nvt->cr_efir);
outb(val, nvt->cr_efdr);
}
/* read val from config reg */
static inline u8 nvt_cr_read(struct nvt_dev *nvt, u8 reg)
{
outb(reg, nvt->cr_efir);
return inb(nvt->cr_efdr);
}
/* update config register bit without changing other bits */
static inline void nvt_set_reg_bit(struct nvt_dev *nvt, u8 val, u8 reg)
{
u8 tmp = nvt_cr_read(nvt, reg) | val;
nvt_cr_write(nvt, tmp, reg);
}
/* clear config register bit without changing other bits */
static inline void nvt_clear_reg_bit(struct nvt_dev *nvt, u8 val, u8 reg)
{
u8 tmp = nvt_cr_read(nvt, reg) & ~val;
nvt_cr_write(nvt, tmp, reg);
}
/* enter extended function mode */
static inline void nvt_efm_enable(struct nvt_dev *nvt)
{
/* Enabling Extended Function Mode explicitly requires writing 2x */
outb(EFER_EFM_ENABLE, nvt->cr_efir);
outb(EFER_EFM_ENABLE, nvt->cr_efir);
}
/* exit extended function mode */
static inline void nvt_efm_disable(struct nvt_dev *nvt)
{
outb(EFER_EFM_DISABLE, nvt->cr_efir);
}
/*
* When you want to address a specific logical device, write its logical
* device number to CR_LOGICAL_DEV_SEL, then enable/disable by writing
* 0x1/0x0 respectively to CR_LOGICAL_DEV_EN.
*/
static inline void nvt_select_logical_dev(struct nvt_dev *nvt, u8 ldev)
{
outb(CR_LOGICAL_DEV_SEL, nvt->cr_efir);
outb(ldev, nvt->cr_efdr);
}
/* write val to cir config register */
static inline void nvt_cir_reg_write(struct nvt_dev *nvt, u8 val, u8 offset)
{
outb(val, nvt->cir_addr + offset);
}
/* read val from cir config register */
static u8 nvt_cir_reg_read(struct nvt_dev *nvt, u8 offset)
{
u8 val;
val = inb(nvt->cir_addr + offset);