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/*
* pluto2.c - Satelco Easywatch Mobile Terrestrial Receiver [DVB-T]
*
* Copyright (C) 2005 Andreas Oberritter <obi@linuxtv.org>
*
* based on pluto2.c 1.10 - http://instinct-wp8.no-ip.org/pluto/
* by Dany Salman <salmandany@yahoo.fr>
* Copyright (c) 2004 TDF
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*
*/
#include <linux/i2c.h>
#include <linux/i2c-algo-bit.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/dma-mapping.h>
#include <linux/slab.h>
#include "demux.h"
#include "dmxdev.h"
#include "dvb_demux.h"
#include "dvb_frontend.h"
#include "dvb_net.h"
#include "dvbdev.h"
#include "tda1004x.h"
DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
#define DRIVER_NAME "pluto2"
#define REG_PIDn(n) ((n) << 2) /* PID n pattern registers */
#define REG_PCAR 0x0020 /* PC address register */
#define REG_TSCR 0x0024 /* TS ctrl & status */
#define REG_MISC 0x0028 /* miscellaneous */
#define REG_MMAC 0x002c /* MSB MAC address */
#define REG_IMAC 0x0030 /* ISB MAC address */
#define REG_LMAC 0x0034 /* LSB MAC address */
#define REG_SPID 0x0038 /* SPI data */
#define REG_SLCS 0x003c /* serial links ctrl/status */
#define PID0_NOFIL (0x0001 << 16)
#define PIDn_ENP (0x0001 << 15)
#define PID0_END (0x0001 << 14)
#define PID0_AFIL (0x0001 << 13)
#define PIDn_PID (0x1fff << 0)
#define TSCR_NBPACKETS (0x00ff << 24)
#define TSCR_DEM (0x0001 << 17)
#define TSCR_DE (0x0001 << 16)
#define TSCR_RSTN (0x0001 << 15)
#define TSCR_MSKO (0x0001 << 14)
#define TSCR_MSKA (0x0001 << 13)
#define TSCR_MSKL (0x0001 << 12)
#define TSCR_OVR (0x0001 << 11)
#define TSCR_AFUL (0x0001 << 10)
#define TSCR_LOCK (0x0001 << 9)
#define TSCR_IACK (0x0001 << 8)
#define TSCR_ADEF (0x007f << 0)
#define MISC_DVR (0x0fff << 4)
#define MISC_ALED (0x0001 << 3)
#define MISC_FRST (0x0001 << 2)
#define MISC_LED1 (0x0001 << 1)
#define MISC_LED0 (0x0001 << 0)
#define SPID_SPIDR (0x00ff << 0)
#define SLCS_SCL (0x0001 << 7)
#define SLCS_SDA (0x0001 << 6)
#define SLCS_CSN (0x0001 << 2)
#define SLCS_OVR (0x0001 << 1)
#define SLCS_SWC (0x0001 << 0)
#define TS_DMA_PACKETS (8)
#define TS_DMA_BYTES (188 * TS_DMA_PACKETS)
#define I2C_ADDR_TDA10046 0x10
#define I2C_ADDR_TUA6034 0xc2
#define NHWFILTERS 8
struct pluto {
/* pci */
struct pci_dev *pdev;
u8 __iomem *io_mem;
/* dvb */
struct dmx_frontend hw_frontend;
struct dmx_frontend mem_frontend;
struct dmxdev dmxdev;
struct dvb_adapter dvb_adapter;
struct dvb_demux demux;
struct dvb_frontend *fe;
struct dvb_net dvbnet;
unsigned int full_ts_users;
unsigned int users;
/* i2c */
struct i2c_algo_bit_data i2c_bit;
struct i2c_adapter i2c_adap;
unsigned int i2cbug;
/* irq */
unsigned int overflow;
unsigned int dead;
/* dma */
dma_addr_t dma_addr;
u8 dma_buf[TS_DMA_BYTES];
u8 dummy[4096];
};
static inline struct pluto *feed_to_pluto(struct dvb_demux_feed *feed)
{
return container_of(feed->demux, struct pluto, demux);
}
static inline struct pluto *frontend_to_pluto(struct dvb_frontend *fe)
{
return container_of(fe->dvb, struct pluto, dvb_adapter);
}
static inline u32 pluto_readreg(struct pluto *pluto, u32 reg)
{
return readl(&pluto->io_mem[reg]);
}
static inline void pluto_writereg(struct pluto *pluto, u32 reg, u32 val)
{
writel(val, &pluto->io_mem[reg]);
}
static inline void pluto_rw(struct pluto *pluto, u32 reg, u32 mask, u32 bits)
{
u32 val = readl(&pluto->io_mem[reg]);
val &= ~mask;
val |= bits;
writel(val, &pluto->io_mem[reg]);
}
static void pluto_write_tscr(struct pluto *pluto, u32 val)
{
/* set the number of packets */
val &= ~TSCR_ADEF;
val |= TS_DMA_PACKETS / 2;
pluto_writereg(pluto, REG_TSCR, val);
}
static void pluto_setsda(void *data, int state)
{
struct pluto *pluto = data;
if (state)
pluto_rw(pluto, REG_SLCS, SLCS_SDA, SLCS_SDA);
else
pluto_rw(pluto, REG_SLCS, SLCS_SDA, 0);
}
static void pluto_setscl(void *data, int state)
{
struct pluto *pluto = data;
if (state)
pluto_rw(pluto, REG_SLCS, SLCS_SCL, SLCS_SCL);
else
pluto_rw(pluto, REG_SLCS, SLCS_SCL, 0);
/* try to detect i2c_inb() to workaround hardware bug:
* reset SDA to high after SCL has been set to low */
if ((state) && (pluto->i2cbug == 0)) {
pluto->i2cbug = 1;
} else {
if ((!state) && (pluto->i2cbug == 1))
pluto_setsda(pluto, 1);
pluto->i2cbug = 0;
}
}
static int pluto_getsda(void *data)
{
struct pluto *pluto = data;
return pluto_readreg(pluto, REG_SLCS) & SLCS_SDA;
}
static int pluto_getscl(void *data)
{
struct pluto *pluto = data;
return pluto_readreg(pluto, REG_SLCS) & SLCS_SCL;
}
static void pluto_reset_frontend(struct pluto *pluto, int reenable)
{
u32 val = pluto_readreg(pluto, REG_MISC);
if (val & MISC_FRST) {
val &= ~MISC_FRST;
pluto_writereg(pluto, REG_MISC, val);
}
if (reenable) {
val |= MISC_FRST;
pluto_writereg(pluto, REG_MISC, val);
}
}
static void pluto_reset_ts(struct pluto *pluto, int reenable)
{
u32 val = pluto_readreg(pluto, REG_TSCR);
if (val & TSCR_RSTN) {
val &= ~TSCR_RSTN;
pluto_write_tscr(pluto, val);
}
if (
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