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|
/*
* Driver for MT9T001 CMOS Image Sensor from Aptina (Micron)
*
* Copyright (C) 2010-2011, Laurent Pinchart <laurent.pinchart@ideasonboard.com>
*
* Based on the MT9M001 driver,
*
* Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/clk.h>
#include <linux/i2c.h>
#include <linux/log2.h>
#include <linux/module.h>
#include <linux/regulator/consumer.h>
#include <linux/slab.h>
#include <linux/videodev2.h>
#include <linux/v4l2-mediabus.h>
#include <media/i2c/mt9t001.h>
#include <media/v4l2-ctrls.h>
#include <media/v4l2-device.h>
#include <media/v4l2-subdev.h>
#define MT9T001_PIXEL_ARRAY_HEIGHT 1568
#define MT9T001_PIXEL_ARRAY_WIDTH 2112
#define MT9T001_CHIP_VERSION 0x00
#define MT9T001_CHIP_ID 0x1621
#define MT9T001_ROW_START 0x01
#define MT9T001_ROW_START_MIN 0
#define MT9T001_ROW_START_DEF 20
#define MT9T001_ROW_START_MAX 1534
#define MT9T001_COLUMN_START 0x02
#define MT9T001_COLUMN_START_MIN 0
#define MT9T001_COLUMN_START_DEF 32
#define MT9T001_COLUMN_START_MAX 2046
#define MT9T001_WINDOW_HEIGHT 0x03
#define MT9T001_WINDOW_HEIGHT_MIN 1
#define MT9T001_WINDOW_HEIGHT_DEF 1535
#define MT9T001_WINDOW_HEIGHT_MAX 1567
#define MT9T001_WINDOW_WIDTH 0x04
#define MT9T001_WINDOW_WIDTH_MIN 1
#define MT9T001_WINDOW_WIDTH_DEF 2047
#define MT9T001_WINDOW_WIDTH_MAX 2111
#define MT9T001_HORIZONTAL_BLANKING 0x05
#define MT9T001_HORIZONTAL_BLANKING_MIN 21
#define MT9T001_HORIZONTAL_BLANKING_MAX 1023
#define MT9T001_VERTICAL_BLANKING 0x06
#define MT9T001_VERTICAL_BLANKING_MIN 3
#define MT9T001_VERTICAL_BLANKING_MAX 1023
#define MT9T001_OUTPUT_CONTROL 0x07
#define MT9T001_OUTPUT_CONTROL_SYNC (1 << 0)
#define MT9T001_OUTPUT_CONTROL_CHIP_ENABLE (1 << 1)
#define MT9T001_OUTPUT_CONTROL_TEST_DATA (1 << 6)
#define MT9T001_OUTPUT_CONTROL_DEF 0x0002
#define MT9T001_SHUTTER_WIDTH_HIGH 0x08
#define MT9T001_SHUTTER_WIDTH_LOW 0x09
#define MT9T001_SHUTTER_WIDTH_MIN 1
#define MT9T001_SHUTTER_WIDTH_DEF 1561
#define MT9T001_SHUTTER_WIDTH_MAX (1024 * 1024)
#define MT9T001_PIXEL_CLOCK 0x0a
#define MT9T001_PIXEL_CLOCK_INVERT (1 << 15)
#define MT9T001_PIXEL_CLOCK_SHIFT_MASK (7 << 8)
#define MT9T001_PIXEL_CLOCK_SHIFT_SHIFT 8
#define MT9T001_PIXEL_CLOCK_DIVIDE_MASK (0x7f << 0)
#define MT9T001_FRAME_RESTART 0x0b
#define MT9T001_SHUTTER_DELAY 0x0c
#define MT9T001_SHUTTER_DELAY_MAX 2047
#define MT9T001_RESET 0x0d
#define MT9T001_READ_MODE1 0x1e
#define MT9T001_READ_MODE_SNAPSHOT (1 << 8)
#define MT9T001_READ_MODE_STROBE_ENABLE (1 << 9)
#define MT9T001_READ_MODE_STROBE_WIDTH (1 << 10)
#define MT9T001_READ_MODE_STROBE_OVERRIDE (1 << 11)
#define MT9T001_READ_MODE2 0x20
#define MT9T001_READ_MODE_BAD_FRAMES (1 << 0)
#define MT9T001_READ_MODE_LINE_VALID_CONTINUOUS (1 << 9)
#define MT9T001_READ_MODE_LINE_VALID_FRAME (1 << 10)
#define MT9T001_READ_MODE3 0x21
#define MT9T001_READ_MODE_GLOBAL_RESET (1 << 0)
#define MT9T001_READ_MODE_GHST_CTL (1 << 1)
#define MT9T001_ROW_ADDRESS_MODE 0x22
#define MT9T001_ROW_SKIP_MASK (7 << 0)
#define MT9T001_ROW_BIN_MASK (3 << 3)
#define MT9T001_ROW_BIN_SHIFT 3
#define MT9T001_COLUMN_ADDRESS_MODE 0x23
#define MT9T001_COLUMN_SKIP_MASK (7 << 0)
#define MT9T001_COLUMN_BIN_MASK (3 << 3)
#define MT9T001_COLUMN_BIN_SHIFT 3
#define MT9T001_GREEN1_GAIN 0x2b
#define MT9T001_BLUE_GAIN 0x2c
#define MT9T001_RED_GAIN 0x2d
#define MT9T001_GREEN2_GAIN 0x2e
#define MT9T001_TEST_DATA 0x32
#define MT9T001_GLOBAL_GAIN 0x35
#define MT9T001_GLOBAL_GAIN_MIN 8
#define MT9T001_GLOBAL_GAIN_MAX 1024
#define MT9T001_BLACK_LEVEL 0x49
#define MT9T001_ROW_BLACK_DEFAULT_OFFSET 0x4b
#define MT9T001_BLC_DELTA_THRESHOLDS 0x5d
#define MT9T001_CAL_THRESHOLDS 0x5f
#define MT9T001_GREEN1_OFFSET 0x60
#define MT9T001_GREEN2_OFFSET 0x61
#define MT9T001_BLACK_LEVEL_CALIBRATION 0x62
#define MT9T001_BLACK_LEVEL_OVERRIDE (1 << 0)
#define MT9T001_BLACK_LEVEL_DISABLE_OFFSET (1 << 1)
#define MT9T001_BLACK_LEVEL_RECALCULATE (1 << 12)
#define MT9T001_BLACK_LEVEL_LOCK_RED_BLUE (1 << 13)
#define MT9T001_BLACK_LEVEL_LOCK_GREEN (1 << 14)
#define MT9T001_RED_OFFSET 0x63
#define MT9T001_BLUE_OFFSET 0x64
struct mt9t001 {
struct v4l2_subdev subdev;
struct media_pad pad;
struct clk *clk;
struct regulator_bulk_data regulators[2];
struct mutex power_lock; /* lock to protect power_count */
int power_count;
struct v4l2_mbus_framefmt format;
struct v4l2_rect crop;
struct v4l2_ctrl_handler ctrls;
struct v4l2_ctrl *gains[4];
u16 output_control;
u16 black_level;
};
static inline struct mt9t001 *to_mt9t001(struct v4l2_subdev *sd)
{
return container_of(sd, struct mt9t001, subdev);
}
static int mt9t001_read(struct i2c_client *client, u8 reg)
{
return i2c_smbus_read_word_swapped(client, reg);
}
static int mt9t001_write(struct i2c_client *client, u8 reg, u16 data)
{
return i2c_smbus_write_word_swapped(client, reg, data);
}
static int mt9t001_set_output_control(struct mt9t001 *mt9t001, u16 clear,
u16 set)
{
struct i2c_client *client = v4l2_get_subdevdata(&mt9t001->subdev);
u16 value = (mt9t001->output_control & ~clear) | set;
int ret;
if (value == mt9t001->output_control)
return 0;
ret = mt9t001_write(client, MT9T001_OUTPUT_CONTROL, value);
if (ret < 0)
return ret;
mt9t001->output_control = value;
return 0;
}
static int mt9t001_reset(struct mt9t001 *mt9t001)
{
struct i2c_client *client = v4l2_get_subdevdata(&mt9t001->subdev);
int ret;
/* Reset the chip and stop data read out */
ret = mt9t001_write(client, MT9T001_RESET, 1);
if (ret < 0)
return ret;
ret = mt9t001_write(client, MT9T001_RESET, 0);
if (ret < 0)
return ret;
mt9t001->output_control = MT9T001_OUTPUT_CONTROL_DEF;
return mt9t001_set_output_control(mt9t001,
MT9T001_OUTPUT_CONTROL_CHIP_ENABLE,
0);
}
static int mt9t001_power_on(struct mt9t001 *mt9t001)
{
int ret;
/* Bring up the supplies */
ret = regulator_bulk_enable(ARRAY_SIZE(mt9t001->regulators),
mt9t001->regulators);
if (ret < 0)
return ret;
/* Enable clock */
ret = clk_prepare_enable(mt9t001->clk);
if (ret < 0)
regulator_bulk_disable(ARRAY_SIZE(mt9t001->regulators),
mt9t001->regulators);
return ret;
}
static void mt9t001_power_off(struct mt9t001 *mt9t001)
{
regulator_bulk_disable(ARRAY_SIZE(mt9t001->regulators),
mt9t001->regulators);
clk_disable_unprepare(mt9t001->clk);
}
static int
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