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/*
* Copyright (c) 2015 Intel Corporation
*
* Driver for TXC PA12203001 Proximity and Ambient Light Sensor.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published by
* the Free Software Foundation.
* To do: Interrupt support.
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/acpi.h>
#include <linux/delay.h>
#include <linux/i2c.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include <linux/mutex.h>
#include <linux/pm.h>
#include <linux/pm_runtime.h>
#include <linux/regmap.h>
#define PA12203001_DRIVER_NAME "pa12203001"
#define PA12203001_REG_CFG0 0x00
#define PA12203001_REG_CFG1 0x01
#define PA12203001_REG_CFG2 0x02
#define PA12203001_REG_CFG3 0x03
#define PA12203001_REG_ADL 0x0b
#define PA12203001_REG_PDH 0x0e
#define PA12203001_REG_POFS 0x10
#define PA12203001_REG_PSET 0x11
#define PA12203001_ALS_EN_MASK BIT(0)
#define PA12203001_PX_EN_MASK BIT(1)
#define PA12203001_PX_NORMAL_MODE_MASK GENMASK(7, 6)
#define PA12203001_AFSR_MASK GENMASK(5, 4)
#define PA12203001_AFSR_SHIFT 4
#define PA12203001_PSCAN 0x03
/* als range 31000, ps, als disabled */
#define PA12203001_REG_CFG0_DEFAULT 0x30
/* led current: 100 mA */
#define PA12203001_REG_CFG1_DEFAULT 0x20
/* ps mode: normal, interrupts not active */
#define PA12203001_REG_CFG2_DEFAULT 0xcc
#define PA12203001_REG_CFG3_DEFAULT 0x00
#define PA12203001_SLEEP_DELAY_MS 3000
#define PA12203001_CHIP_ENABLE 0xff
#define PA12203001_CHIP_DISABLE 0x00
/* available scales: corresponding to [500, 4000, 7000, 31000] lux */
static const int pa12203001_scales[] = { 7629, 61036, 106813, 473029};
struct pa12203001_data {
struct i2c_client *client;
/* protect device states */
struct mutex lock;
bool als_enabled;
bool px_enabled;
bool als_needs_enable;
bool px_needs_enable;
struct regmap *map;
};
static const struct {
u8 reg;
u8 val;
} regvals[] = {
{PA12203001_REG_CFG0, PA12203001_REG_CFG0_DEFAULT},
{PA12203001_REG_CFG1, PA12203001_REG_CFG1_DEFAULT},
{PA12203001_REG_CFG2, PA12203001_REG_CFG2_DEFAULT},
{PA12203001_REG_CFG3, PA12203001_REG_CFG3_DEFAULT},
{PA12203001_REG_PSET, PA12203001_PSCAN},
};
static IIO_CONST_ATTR(in_illuminance_scale_available,
"0.007629 0.061036 0.106813 0.473029");
static struct attribute *pa12203001_attrs[] = {
&iio_const_attr_in_illuminance_scale_available.dev_attr.attr,
NULL
};
static const struct attribute_group pa12203001_attr_group = {
.attrs = pa12203001_attrs,
};
static const struct iio_chan_spec pa12203001_channels[] = {
{
.type = IIO_LIGHT,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
BIT(IIO_CHAN_INFO_SCALE),
},
{
.type = IIO_PROXIMITY,
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
}
};
static const struct regmap_range pa12203001_volatile_regs_ranges[] = {
regmap_reg_range(PA12203001_REG_ADL, PA12203001_REG_ADL + 1),
regmap_reg_range(PA12203001_REG_PDH, PA12203001_REG_PDH),
};
static const struct regmap_access_table pa12203001_volatile_regs = {
.yes_ranges = pa12203001_volatile_regs_ranges,
.n_yes_ranges = ARRAY_SIZE(pa12203001_volatile_regs_ranges),
};
static const struct regmap_config pa12203001_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
.max_register = PA12203001_REG_PSET,
.cache_type = REGCACHE_RBTREE,
.volatile_table = &pa12203001_volatile_regs,
};
static inline int pa12203001_als_enable(struct pa12203001_data *data, u8 enable)
{
int ret;
ret = regmap_update_bits(data->map, PA12203001_REG_CFG0,
PA12203001_ALS_EN_MASK, enable);
if (ret < 0)
return ret;
data->als_enabled = !!enable;
return 0;
}
static inline int pa12203001_px_enable(struct pa12203001_data *data, u8 enable)
{
int ret;
ret = regmap_update_bits(data->map, PA12203001_REG_CFG0,
PA12203001_PX_EN_MASK, enable);
if (ret < 0)
return ret;
data->px_enabled = !!enable;
return 0;
}
static int pa12203001_set_power_state(struct pa12203001_data *data, bool on,
u8 mask)
{
#ifdef CONFIG_PM
int ret;
if (on && (mask & PA12203001_ALS_EN_MASK)) {
mutex_lock(&data->lock);
if (data->px_enabled) {
ret = pa12203001_als_enable(data,
PA12203001_ALS_EN_MASK);
if (ret < 0)
goto err;
} else {
data->als_needs_enable = true;
}
mutex_unlock(&data->lock);
}
if (on && (mask & PA12203001_PX_EN_MASK)) {
mutex_lock(&data->lock);
if (data->als_enabled) {
ret = pa12203001_px_enable(data, PA12203001_PX_EN_MASK);
if (ret < 0)
goto err;
} else {
data->px_needs_enable = true;
}
mutex_unlock(&data->lock);
}
if (on) {
ret = pm_runtime_get_sync(&data->client->dev);
if (ret < 0)
pm_runtime_put_noidle(&data->client->dev);
} else {
pm_runtime_mark_last_busy(&data->client->dev);
ret = pm_runtime_put_autosuspend(&data->client->dev);
}
return ret;
err:
mutex_unlock(&data->lock);
return ret;
#endif
return 0;
}
static int pa12203001_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan, int *val,
int *val2, long mask)
{
struct pa12203001_data *data = iio_priv(indio_dev);
int ret;
u8 dev_mask;
unsigned int reg_byte;
__le16 reg_word;
switch (mask) {
case IIO_CHAN_INFO_RAW:
switch (chan->type) {
case IIO_LIGHT:
dev_mask = PA12203001_ALS_EN_MASK;
ret = pa12203001_set_power_state(data, true, dev_mask);
if (ret < 0)
return ret;
/*
* ALS ADC value is stored in registers
* PA12203001_REG_ADL and in PA12203001_REG_ADL + 1.
*/
ret = regmap_bulk_read(data->map, PA12203001_REG_ADL,
®_word, 2);
if (ret < 0)
goto reg_err;
*val = le16_to_cpu(reg_word);
ret = pa12203001_set_power_state(data, false, dev_mask);
if (ret < 0)
return ret;
break;
case IIO_PROXIMITY:
dev_mask = PA12203001_PX_EN_MASK;
ret = pa12203001_set_power_state(data, true, dev_mask);
if (ret < 0)
return ret;
ret = regmap_read(data->map, PA12203001_REG_PDH,
®_byte);
if (ret < 0)
goto reg_err;
*val = reg_byte;
ret = pa12203001_set_power_state(data, false, dev_mask);
if (ret < 0)
return ret;
break;
default:
return -EINVAL;
}
return IIO_VAL_INT;
case IIO_CHAN_INFO_SCALE:
ret = regmap_read(data->map, PA12203001_REG_CFG0, ®_byte);
if (ret < 0)
return ret;
*val = 0;
reg_byte = (reg_byte & PA12203001_AFSR_MASK);
*val2 = pa12203001_scales[reg_byte >> 4];
return IIO_VAL_INT_PLUS_MICRO;
default:
return -EINVAL;
}
reg_err:
pa12203001_set_power_state(data, false, dev_mask);
return ret;
}
static int pa12203001_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan, int val,
int val2, long mask)
{
struct pa12203001_data *data = iio_priv(indio_dev);
int i, ret
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