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|
/*
w83627ehf - Driver for the hardware monitoring functionality of
the Winbond W83627EHF Super-I/O chip
Copyright (C) 2005 Jean Delvare <khali@linux-fr.org>
Shamelessly ripped from the w83627hf driver
Copyright (C) 2003 Mark Studebaker
Thanks to Leon Moonen, Steve Cliffe and Grant Coady for their help
in testing and debugging this driver.
This driver also supports the W83627EHG, which is the lead-free
version of the W83627EHF.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
Supports the following chips:
Chip #vin #fan #pwm #temp chip_id man_id
w83627ehf - 5 - 3 0x88 0x5ca3
This is a preliminary version of the driver, only supporting the
fan and temperature inputs. The chip does much more than that.
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/i2c.h>
#include <linux/i2c-isa.h>
#include <linux/hwmon.h>
#include <linux/err.h>
#include <asm/io.h>
#include "lm75.h"
/* The actual ISA address is read from Super-I/O configuration space */
static unsigned short address;
/*
* Super-I/O constants and functions
*/
static int REG; /* The register to read/write */
static int VAL; /* The value to read/write */
#define W83627EHF_LD_HWM 0x0b
#define SIO_REG_LDSEL 0x07 /* Logical device select */
#define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
#define SIO_REG_ENABLE 0x30 /* Logical device enable */
#define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
#define SIO_W83627EHF_ID 0x8840
#define SIO_ID_MASK 0xFFC0
static inline void
superio_outb(int reg, int val)
{
outb(reg, REG);
outb(val, VAL);
}
static inline int
superio_inb(int reg)
{
outb(reg, REG);
return inb(VAL);
}
static inline void
superio_select(int ld)
{
outb(SIO_REG_LDSEL, REG);
outb(ld, VAL);
}
static inline void
superio_enter(void)
{
outb(0x87, REG);
outb(0x87, REG);
}
static inline void
superio_exit(void)
{
outb(0x02, REG);
outb(0x02, VAL);
}
/*
* ISA constants
*/
#define REGION_ALIGNMENT ~7
#define REGION_OFFSET 5
#define REGION_LENGTH 2
#define ADDR_REG_OFFSET 5
#define DATA_REG_OFFSET 6
#define W83627EHF_REG_BANK 0x4E
#define W83627EHF_REG_CONFIG 0x40
#define W83627EHF_REG_CHIP_ID 0x49
#define W83627EHF_REG_MAN_ID 0x4F
static const u16 W83627EHF_REG_FAN[] = { 0x28, 0x29, 0x2a, 0x3f, 0x553 };
static const u16 W83627EHF_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d, 0x3e, 0x55c };
#define W83627EHF_REG_TEMP1 0x27
#define W83627EHF_REG_TEMP1_HYST 0x3a
#define W83627EHF_REG_TEMP1_OVER 0x39
static const u16 W83627EHF_REG_TEMP[] = { 0x150, 0x250 };
static const u16 W83627EHF_REG_TEMP_HYST[] = { 0x153, 0x253 };
static const u16 W83627EHF_REG_TEMP_OVER[] = { 0x155, 0x255 };
static const u16 W83627EHF_REG_TEMP_CONFIG[] = { 0x152, 0x252 };
/* Fan clock dividers are spread over the following five registers */
#define W83627EHF_REG_FANDIV1 0x47
#define W83627EHF_REG_FANDIV2 0x4B
#define W83627EHF_REG_VBAT 0x5D
#define W83627EHF_REG_DIODE 0x59
#define W83627EHF_REG_SMI_OVT 0x4C
/*
* Conversions
*/
static inline unsigned int
fan_from_reg(u8 reg, unsigned int div)
{
if (reg == 0 || reg == 255)
return 0;
return 1350000U / (reg * div);
}
static inline unsigned int
div_from_reg(u8 reg)
{
return 1 << reg;
}
static inline int
temp1_from_reg(s8 reg)
{
return reg * 1000;
}
static inline s8
temp1_to_reg(int temp)
{
if (temp <= -128000)
return -128;
if (temp >= 127000)
return 127;
if (temp < 0)
return (temp - 500) / 1000;
return (temp + 500) / 1000;
}
/*
* Data structures and manipulation thereof
*/
struct w83627ehf_data {
struct i2c_client client;
struct class_device *class_dev;
struct semaphore lock;
struct semaphore update_lock;
char valid; /* !=0 if following fields are valid */
unsigned long last_updated; /* In jiffies */
/* Register values */
u8 fan[5];
u8 fan_min[5];
u8 fan_div[5];
u8 has_fan; /* some fan inputs can be disabled */
s8 temp1;
s8 temp1_max;
s8 temp1_max_hyst;
s16 temp[2];
s16 temp_max[2];
s16 temp_max_hyst[2];
};
static inline int is_word_sized(u16 reg)
{
return (((reg & 0xff00) == 0x100
|| (reg & 0xff00) == 0x200)
&& ((reg & 0x00ff) == 0x50
|| (reg & 0x00ff) == 0x53
|| (reg & 0x00ff) == 0x55));
}
/* We assume that the default bank is 0, thus the following two functions do
nothing for registers which live in bank 0. For others, they respectively
set the bank register to the correct value (before the register is
accessed), and back to 0 (afterwards). */
static inline void w83627ehf_set_bank(struct i2c_client *client, u16 reg)
{
if (reg & 0xff00) {
outb_p(W83627EHF_REG_BANK, client->addr + ADDR_REG_OFFSET);
outb_p(reg >> 8, client->addr + DATA_REG_OFFSET);
}
}
static inline void w83627ehf_reset_bank(struct i2c_client *client, u16 reg)
{
if (reg & 0xff00) {
outb_p(W83627EHF_REG_BANK, client->addr + ADDR_REG_OFFSET);
outb_p(0, client->addr + DATA_REG_OFFSET);
}
}
static u16 w83627ehf_read_value(struct i2c_client *client, u16 reg)
{
struct w83627ehf_data *data = i2c_get_clientdata(client);
int res
|