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// SPDX-License-Identifier: GPL-2.0
/*
* ADM1266 - Cascadable Super Sequencer with Margin
* Control and Fault Recording
*
* Copyright 2020 Analog Devices Inc.
*/
#include <linux/bitfield.h>
#include <linux/crc8.h>
#include <linux/debugfs.h>
#include <linux/gpio/driver.h>
#include <linux/i2c.h>
#include <linux/i2c-smbus.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/nvmem-consumer.h>
#include <linux/nvmem-provider.h>
#include "pmbus.h"
#include <linux/slab.h>
#include <linux/timekeeping.h>
#define ADM1266_BLACKBOX_CONFIG 0xD3
#define ADM1266_PDIO_CONFIG 0xD4
#define ADM1266_READ_STATE 0xD9
#define ADM1266_READ_BLACKBOX 0xDE
#define ADM1266_SET_RTC 0xDF
#define ADM1266_GPIO_CONFIG 0xE1
#define ADM1266_BLACKBOX_INFO 0xE6
#define ADM1266_PDIO_STATUS 0xE9
#define ADM1266_GPIO_STATUS 0xEA
/* ADM1266 GPIO defines */
#define ADM1266_GPIO_NR 9
#define ADM1266_GPIO_FUNCTIONS(x) FIELD_GET(BIT(0), x)
#define ADM1266_GPIO_INPUT_EN(x) FIELD_GET(BIT(2), x)
#define ADM1266_GPIO_OUTPUT_EN(x) FIELD_GET(BIT(3), x)
#define ADM1266_GPIO_OPEN_DRAIN(x) FIELD_GET(BIT(4), x)
/* ADM1266 PDIO defines */
#define ADM1266_PDIO_NR 16
#define ADM1266_PDIO_PIN_CFG(x) FIELD_GET(GENMASK(15, 13), x)
#define ADM1266_PDIO_GLITCH_FILT(x) FIELD_GET(GENMASK(12, 9), x)
#define ADM1266_PDIO_OUT_CFG(x) FIELD_GET(GENMASK(2, 0), x)
#define ADM1266_BLACKBOX_OFFSET 0
#define ADM1266_BLACKBOX_SIZE 64
#define ADM1266_PMBUS_BLOCK_MAX 255
struct adm1266_data {
struct pmbus_driver_info info;
struct gpio_chip gc;
const char *gpio_names[ADM1266_GPIO_NR + ADM1266_PDIO_NR];
struct i2c_client *client;
struct dentry *debugfs_dir;
struct nvmem_config nvmem_config;
struct nvmem_device *nvmem;
u8 *dev_mem;
struct mutex buf_mutex;
u8 write_buf[ADM1266_PMBUS_BLOCK_MAX + 1] ____cacheline_aligned;
u8 read_buf[ADM1266_PMBUS_BLOCK_MAX + 1] ____cacheline_aligned;
};
static const struct nvmem_cell_info adm1266_nvmem_cells[] = {
{
.name = "blackbox",
.offset = ADM1266_BLACKBOX_OFFSET,
.bytes = 2048,
},
};
DECLARE_CRC8_TABLE(pmbus_crc_table);
/*
* Different from Block Read as it sends data and waits for the slave to
* return a value dependent on that data. The protocol is simply a Write Block
* followed by a Read Block without the Read-Block command field and the
* Write-Block STOP bit.
*/
static int adm1266_pmbus_block_xfer(struct adm1266_data *data, u8 cmd, u8 w_len, u8 *data_w,
u8 *data_r)
{
struct i2c_client *client = data->client;
struct i2c_msg msgs[2] = {
{
.addr = client->addr,
.flags = I2C_M_DMA_SAFE,
.buf = data->write_buf,
.len = w_len + 2,
},
{
.addr = client->addr,
.flags = I2C_M_RD | I2C_M_DMA_SAFE,
.buf = data->read_buf,
.len = ADM1266_PMBUS_BLOCK_MAX + 2,
}
};
u8 addr;
u8 crc;
int ret;
mutex_lock(&data->buf_mutex);
msgs[0].buf[0] = cmd;
msgs[0].buf[1] = w_len;
memcpy(&msgs[0].buf[2], data_w, w_len);
ret = i2c_transfer(client->adapter, msgs, 2);
if (ret != 2) {
if (ret >= 0)
ret = -EPROTO;
mutex_unlock(&data->buf_mutex);
return ret;
}
if (client->flags & I2C_CLIENT_PEC) {
addr = i2c_8bit_addr_from_msg(&msgs[0]);
crc = crc8(pmbus_crc_table, &addr, 1, 0);
crc = crc8(pmbus_crc_table, msgs[0].buf, msgs[0].len, crc);
addr = i2c_8bit_addr_from_msg(&msgs[1]);
crc = crc8(pmbus_crc_table, &addr, 1, crc);
crc = crc8(pmbus_crc_table, msgs[1].buf, msgs[1].buf[0] + 1, crc);
if (crc != msgs[1].buf[msgs[1].buf[0] + 1]) {
mutex_unlock(&data->buf_mutex);
return -EBADMSG;
}
}
memcpy(data_r, &msgs[1].buf[1], msgs[1].buf[0]);
ret = msgs[1].buf[0];
mutex_unlock(&data->buf_mutex);
return ret;
}
static const unsigned int adm1266_gpio_mapping[ADM1266_GPIO_NR][2] = {
{1, 0},
{2, 1},
{3, 2},
{4, 8},
{5, 9},
{6, 10},
{7, 11},
{8, 6},
{9, 7},
};
static const char *adm1266_names[ADM1266_GPIO_NR + ADM1266_PDIO_NR] = {
"GPIO1", "GPIO2", "GPIO3", "GPIO4", "GPIO5", "GPIO6", "GPIO7", "GPIO8",
"GPIO9", "PDIO1", "PDIO2", "PDIO3", "PDIO4", "PDIO5", "PDIO6",
"PDIO7", "PDIO8", "PDIO9", "PDIO10", "PDIO11", "PDIO12", "PDIO13",
"PDIO14", "PDIO15", "PDIO16",
};
static int adm1266_gpio_get(struct gpio_chip *chip, unsigned int offset)
{
struct adm1266_data *data = gpiochip_get_data(chip);
u8 read_buf[I2C_SMBUS_BLOCK_MAX + 1];
unsigned long pins_status;
unsigned int pmbus_cmd;
int ret;
if (offset < ADM1266_GPIO_NR)
pmbus_cmd = ADM1266_GPIO_STATUS;
else
pmbus_cmd = ADM1266_PDIO_STATUS;
ret = i2c_smbus_read_block_data(data->client, pmbus_cmd, read_buf);
if (ret < 0)
return ret;
pins_status = read_buf[0] + (read_buf[1] << 8);
if (offset < ADM1266_GPIO_NR)
return test_bit(adm1266_gpio_mapping[offset][1], &pins_status);
return test_bit(offset - ADM1266_GPIO_NR, &pins_status);
}
static int adm1266_gpio_get_multiple(struct gpio_chip *chip, unsigned long *mask,
unsigned long *bits)
{
struct adm1266_data *data = gpiochip_get_data(chip);
u8 read_buf[ADM1266_PMBUS_BLOCK_MAX + 1];
unsigned long status;
unsigned int gpio_nr;
int ret;
ret = i2c_smbus_read_block_data(data->client, ADM1266_GPIO_STATUS, read_buf);
if (ret < 0)
return ret;
status = read_buf[0] + (read_buf[1] << 8);
*bits = 0;
for_each_set_bit(gpio_nr, mask, ADM1266_GPIO_NR) {
if (test_bit(adm1266_gpio_mapping[gpio_nr][1], &status))
set_bit(gpio_nr, bits);
}
ret = i2c_smbus_read_block_data(data->client, ADM1266_PDIO_STATUS, read_buf);
if (ret < 0)
return ret;
status = read_buf[0] + (read_buf[1] << 8);
*bits = 0;
for_each_set_bit_from(gpio_nr, mask, ADM1266_GPIO_NR + ADM1266_PDIO_STATUS) {
if (test_bit(gpio_nr - ADM1266_GPIO_NR, &status))
set_bit(gpio_nr, bits);
}
return 0;
}
static void adm1266_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
{
struct adm1266_data *data =
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