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/*
* Toumaz Xenif TZ1090 GPIO handling.
*
* Copyright (C) 2008-2013 Imagination Technologies Ltd.
*
* Based on ARM PXA code and others.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/bitops.h>
#include <linux/export.h>
#include <linux/gpio.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/irq.h>
#include <linux/irqdomain.h>
#include <linux/kernel.h>
#include <linux/of_irq.h>
#include <linux/pinctrl/consumer.h>
#include <linux/platform_device.h>
#include <linux/slab.h>
#include <linux/syscore_ops.h>
#include <asm/global_lock.h>
/* Register offsets from bank base address */
#define REG_GPIO_DIR 0x00
#define REG_GPIO_IRQ_PLRT 0x20
#define REG_GPIO_IRQ_TYPE 0x30
#define REG_GPIO_IRQ_EN 0x40
#define REG_GPIO_IRQ_STS 0x50
#define REG_GPIO_BIT_EN 0x60
#define REG_GPIO_DIN 0x70
#define REG_GPIO_DOUT 0x80
/* REG_GPIO_IRQ_PLRT */
#define REG_GPIO_IRQ_PLRT_LOW 0
#define REG_GPIO_IRQ_PLRT_HIGH 1
/* REG_GPIO_IRQ_TYPE */
#define REG_GPIO_IRQ_TYPE_LEVEL 0
#define REG_GPIO_IRQ_TYPE_EDGE 1
/**
* struct tz1090_gpio_bank - GPIO bank private data
* @chip: Generic GPIO chip for GPIO bank
* @domain: IRQ domain for GPIO bank (may be NULL)
* @reg: Base of registers, offset for this GPIO bank
* @irq: IRQ number for GPIO bank
* @label: Debug GPIO bank label, used for storage of chip->label
*
* This is the main private data for a GPIO bank. It encapsulates a gpio_chip,
* and the callbacks for the gpio_chip can access the private data with the
* to_bank() macro below.
*/
struct tz1090_gpio_bank {
struct gpio_chip chip;
struct irq_domain *domain;
void __iomem *reg;
int irq;
char label[16];
};
/**
* struct tz1090_gpio - Overall GPIO device private data
* @dev: Device (from platform device)
* @reg: Base of GPIO registers
*
* Represents the overall GPIO device. This structure is actually only
* temporary, and used during init.
*/
struct tz1090_gpio {
struct device *dev;
void __iomem *reg;
};
/**
* struct tz1090_gpio_bank_info - Temporary registration info for GPIO bank
* @priv: Overall GPIO device private data
* @node: Device tree node specific to this GPIO bank
* @index: Index of bank in range 0-2
*/
struct tz1090_gpio_bank_info {
struct tz1090_gpio *priv;
struct device_node *node;
unsigned int index;
};
/* Convenience register accessors */
static inline void tz1090_gpio_write(struct tz1090_gpio_bank *bank,
unsigned int reg_offs, u32 data)
{
iowrite32(data, bank->reg + reg_offs);
}
static inline u32 tz1090_gpio_read(struct tz1090_gpio_bank *bank,
unsigned int reg_offs)
{
return ioread32(bank->reg + reg_offs);
}
/* caller must hold LOCK2 */
static inline void _tz1090_gpio_clear_bit(struct tz1090_gpio_bank *bank,
unsigned int reg_offs,
unsigned int offset)
{
u32 value;
value = tz1090_gpio_read(bank, reg_offs);
value &= ~BIT(offset);
tz1090_gpio_write(bank, reg_offs, value);
}
static void tz1090_gpio_clear_bit(struct tz1090_gpio_bank *bank,
unsigned int reg_offs,
unsigned int offset)
{
int lstat;
__global_lock2(lstat);
_tz1090_gpio_clear_bit(bank, reg_offs, offset);
__global_unlock2(lstat);
}
/* caller must hold LOCK2 */
static inline void _tz1090_gpio_set_bit(struct tz1090_gpio_bank *bank,
unsigned int reg_offs,
unsigned int offset)
{
u32 value;
value = tz1090_gpio_read(bank, reg_offs);
value |= BIT(offset);
tz1090_gpio_write(bank, reg_offs, value);
}
static void tz1090_gpio_set_bit(struct tz1090_gpio_bank *bank,
unsigned int reg_offs,
unsigned int offset)
{
int lstat;
__global_lock2(lstat);
_tz1090_gpio_set_bit(bank, reg_offs, offset);
__global_unlock2(lstat);
}
/* caller must hold LOCK2 */
static inline void _tz1090_gpio_mod_bit(struct tz1090_gpio_bank *bank,
unsigned int reg_offs,
unsigned int offset,
bool val)
{
u32 value;
value = tz1090_gpio_read(bank, reg_offs);
value &= ~BIT(offset);
if (val)
value |= BIT(offset);
tz1090_gpio_write(bank, reg_offs, value);
}
static void tz1090_gpio_mod_bit(struct tz1090_gpio_bank *bank,
unsigned int reg_offs,
unsigned int offset,
bool val)
{
int lstat;
__global_lock2(lstat);
_tz1090_gpio_mod_bit(bank, reg_offs, offset, val);
__global_unlock2(lstat);
}
static inline int tz1090_gpio_read_bit(struct tz1090_gpio_bank *bank,
unsigned int reg_offs,
unsigned int offset)
{
return tz1090_gpio_read(bank, reg_offs) & BIT(offset);
}
/* GPIO chip callbacks */
static int tz1090_gpio_direction_input(struct gpio_chip *chip,
unsigned int offset)
{
struct tz1090_gpio_bank *bank = gpiochip_get_data(chip);
tz1090_gpio_set_bit(bank, REG_GPIO_DIR, offset);
return 0;
}
static int tz1090_gpio_direction_output(struct gpio_chip *chip,
unsigned int offset, int output_value)
{
struct tz1090_gpio_bank *bank = gpiochip_get_data(chip);
int lstat;
__global_lock2(lstat);
_tz1090_gpio_mod_bit(bank, REG_GPIO_DOUT, offset, output_value);
_tz1090_gpio_clear_bit(bank, REG_GPIO_DIR, offset);
__global_unlock2(lstat);
return 0;
}
/*
* Return GPIO level
*/
static int tz1090_gpio_get(struct gpio_chip *chip, unsigned int offset)
{
struct tz1090_gpio_bank *bank = gpiochip_get_data(chip);
return !!tz1090_gpio_read_bit(bank, REG_GPIO_DIN, offset);
}
/*
* Set output GPIO level
*/
static void tz1090_gpio_set(struct gpio_chip *chip, unsigned int offset,
int output_value)
{
struct tz1090_gpio_bank *bank = gpiochip_get_data(chip);
tz1090_gpio_mod_bit(bank, REG_GPIO_DOUT, offset, output_value);
}
static int tz1090_gpio_request(struct gpio_chip *chip, unsigned int offset)
{
struct tz1090_gpio_bank *bank = gpiochip_get_data(chip);
int ret;
ret = pinctrl_request_gpio(chip->base + offset);
if (ret)
return ret;
tz1090_gpio_set_bit(bank, REG_GPIO_DIR, offset);
tz1090_gpio_set_bit(bank, REG_GPIO_BIT_EN, offset);
return 0;
}
static void tz1090_gpio_free(struct gpio_chip *chip, unsigned int offset)
{
struct tz1090_gpio_bank *bank = gpiochip_get_data(chip);
pinctrl_free_gpio(chip->base + offset);
tz1090_gpio_clear_bit(bank, REG_GPIO_BIT_EN, offset);
}
static int tz1090_gpio_to_irq(struct gpio_chip *chip, unsigned int offset)
{
struct tz1090_gpio_bank *bank = gpiochip_get_data(chip);
if (!bank->domain)
return -EINVAL;
return irq_create_mapping(bank->domain, offset);
}
/* IRQ chip handlers */
/* Get TZ1090 GPIO chip from irq data provided to generic IRQ callbacks */
static inline struct tz1090_gpio_bank *irqd_to_gpio_bank(struct irq_data *data)
{
return (struct tz1090_gpio_bank *)data->domain->host_data;
}
static void tz1090_gpio_irq_polarity(struct tz1090_gpio_bank *bank,
unsigned int offset, unsigned int polarity)
{
tz1090_gpio_mod_bit(bank, REG_GPIO_IRQ_PLRT, offset, polarity);
}
static void tz1090_gpio_irq_type(struct
|