/*
* Driver for the Diolan DLN-2 USB-GPIO adapter
*
* Copyright (c) 2014 Intel Corporation
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation, version 2.
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/types.h>
#include <linux/irqdomain.h>
#include <linux/irq.h>
#include <linux/irqchip/chained_irq.h>
#include <linux/gpio.h>
#include <linux/gpio/driver.h>
#include <linux/platform_device.h>
#include <linux/mfd/dln2.h>
#define DLN2_GPIO_ID 0x01
#define DLN2_GPIO_GET_PIN_COUNT DLN2_CMD(0x01, DLN2_GPIO_ID)
#define DLN2_GPIO_SET_DEBOUNCE DLN2_CMD(0x04, DLN2_GPIO_ID)
#define DLN2_GPIO_GET_DEBOUNCE DLN2_CMD(0x05, DLN2_GPIO_ID)
#define DLN2_GPIO_PORT_GET_VAL DLN2_CMD(0x06, DLN2_GPIO_ID)
#define DLN2_GPIO_PIN_GET_VAL DLN2_CMD(0x0B, DLN2_GPIO_ID)
#define DLN2_GPIO_PIN_SET_OUT_VAL DLN2_CMD(0x0C, DLN2_GPIO_ID)
#define DLN2_GPIO_PIN_GET_OUT_VAL DLN2_CMD(0x0D, DLN2_GPIO_ID)
#define DLN2_GPIO_CONDITION_MET_EV DLN2_CMD(0x0F, DLN2_GPIO_ID)
#define DLN2_GPIO_PIN_ENABLE DLN2_CMD(0x10, DLN2_GPIO_ID)
#define DLN2_GPIO_PIN_DISABLE DLN2_CMD(0x11, DLN2_GPIO_ID)
#define DLN2_GPIO_PIN_SET_DIRECTION DLN2_CMD(0x13, DLN2_GPIO_ID)
#define DLN2_GPIO_PIN_GET_DIRECTION DLN2_CMD(0x14, DLN2_GPIO_ID)
#define DLN2_GPIO_PIN_SET_EVENT_CFG DLN2_CMD(0x1E, DLN2_GPIO_ID)
#define DLN2_GPIO_PIN_GET_EVENT_CFG DLN2_CMD(0x1F, DLN2_GPIO_ID)
#define DLN2_GPIO_EVENT_NONE 0
#define DLN2_GPIO_EVENT_CHANGE 1
#define DLN2_GPIO_EVENT_LVL_HIGH 2
#define DLN2_GPIO_EVENT_LVL_LOW 3
#define DLN2_GPIO_EVENT_CHANGE_RISING 0x11
#define DLN2_GPIO_EVENT_CHANGE_FALLING 0x21
#define DLN2_GPIO_EVENT_MASK 0x0F
#define DLN2_GPIO_MAX_PINS 32
struct dln2_gpio {
struct platform_device *pdev;
struct gpio_chip gpio;
/*
* Cache pin direction to save us one transfer, since the hardware has
* separate commands to read the in and out values.
*/
DECLARE_BITMAP(output_enabled, DLN2_GPIO_MAX_PINS);
/* active IRQs - not synced to hardware */
DECLARE_BITMAP(unmasked_irqs, DLN2_GPIO_MAX_PINS);
/* active IRQS - synced to hardware */
DECLARE_BITMAP(enabled_irqs, DLN2_GPIO_MAX_PINS);
int irq_type[DLN2_GPIO_MAX_PINS];
struct mutex irq_lock;
};
struct dln2_gpio_pin {
__le16 pin;
};
struct dln2_gpio_pin_val {
__le16 pin __packed;
u8 value;
};
static int dln2_gpio_get_pin_count(struct platform_device *pdev)
{
int ret;
__le16 count;
int len = sizeof(count);
ret = dln2_transfer_rx(pdev, DLN2_GPIO_GET_PIN_COUNT, &count, &len);
if (ret < 0)
return ret;
if (len < sizeof(count))
return -EPROTO;
return le16_to_cpu(count);
}
static int dln2_gpio_pin_cmd(struct dln2_gpio *dln2, int cmd, unsigned pin)
{
struct dln2_gpio_pin req = {
.pin = cpu_to_le16(pin),
};
return dln2_transfer_tx(dln2->pdev, cmd, &req, sizeof(req));
}
static int dln2_gpio_pin_val(struct dln2_gpio *dln2, int cmd, unsigned int pin)
{
int ret;
struct dln2_gpio_pin req = {
.pin = cpu_to_le16(pin),
};
struct dln2_gpio_pin_val rsp;
int len = sizeof(rsp);
ret = dln2_transfer(dln2->pdev, cmd, &req, sizeof(req), &rsp, &len);
if (ret < 0)
return ret;
if (len < sizeof(rsp) || req.pin != rsp.pin)
return -EPROTO;
return rsp.value;
}
static int dln2_gpio_pin_get_in_val(struct dln2_gpio *dln2, unsigned int pin)
{
int ret;
ret = dln2_gpio_pin_val(dln2, DLN2_GPIO_PIN_GET_VAL, pin);
if (ret < 0)
return ret;
return !!ret;
}
static int dln2_gpio_pin_get_out_val(struct dln2_gpio *dln2, unsigned int pin)
{
int ret;
ret = dln2_gpio_pin_val(dln2, DLN2_GPIO_PIN_GET_OUT_VAL, pin);
if (ret < 0)
return ret;
return !!ret;
}
static int dln2_gpio_pin_set_out_val(struct dln2_gpio *dln2,
unsigned int pin, int value)
{
struct dln2_gpio_pin_val req = {
.pin = cpu_to_le16(pin),
.value = value,
};
return dln2_transfer_tx(dln2->pdev, DLN2_GPIO_PIN_SET_OUT_VAL, &req,
sizeof(req));
}
#define DLN2_GPIO_DIRECTION_IN 0
#define DLN2_GPIO_DIRECTION_OUT 1
static int dln2_gpio_request(struct gpio_chip *chip, unsigned offset)
{
struct dln2_gpio *dln2 = gpiochip_get_data(chip);
struct dln2_gpio_pin req = {
.pin = cpu_to_le16(offset),
};
struct dln2_gpio_pin_val rsp;
int len = sizeof(rsp);
int ret;
ret = dln2_gpio_pin_cmd(dln2, DLN2_GPIO_PIN_ENABLE, offset);
if (ret < 0)
return ret;
/* cache the pin direction */
ret = dln2_transfer(dln2->pdev, DLN2_GPIO_PIN_GET_DIRECTION,
&req, sizeof(req), &rsp, &len);
if (ret < 0)
return ret;
if (len < sizeof(rsp) || req.pin != rsp.pin) {
ret = -EPROTO;
goto out_disable;
}
switch (rsp.value) {
case DLN2_GPIO_DIRECTION_IN:
clear_bit(offset, dln2->output_enabled);
return 0;
case DLN2_GPIO_DIRECTION_OUT:
set_bit(offset, dln2->output_enabled);
return 0;
default:
ret = -EPROTO;
goto out_disable;
}
out_disable:
dln2_gpio_pin_cmd(dln2, DLN2_GPIO_PIN_DISABLE, offset);
return ret;
}
static void dln2_gpio_free(struct gpio_chip *chip, unsigned offset)
{
struct dln2_gpio *dln2 = gpiochip_get_data(chip);
dln2_gpio_pin_cmd(dln2, DLN2_GPIO_PIN_DISABLE, offset);
}
static int dln2_gpio_get_direction(struct gpio_chip *chip, unsigned offset)
{
struct dln2_gpio *dln2 = gpiochip_get_data(chip);
if (test_bit(offset, dln2->output_enabled))
return GPIOF_DIR_OUT;
return GPIOF_DIR_IN;
}
static int dln2_gpio_get(struct gpio_chip *chip, unsigned int offset)
{
struct dln2_gpio *dln2 = gpiochip_get_data(chip);
int dir;
dir = dln2_gpio_get_direction(chip, offset);
if (dir < 0)
return dir;
if (dir == GPIOF_DIR_IN)
return dln2_gpio_pin_get_in_val(dln2, offset);
return dln2_gpio_pin_get_out_val(dln2, offset);
}
static void dln2_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
{
struct dln2_gpio *dln2 = gpiochip_get_data(chip);
dln2_gpio_pin_set_out_val(dln2, offset, value);
}
static int dln2_gpio_set_direction(struct gpio_chip *chip, unsigned offset,
unsigned dir)
{
struct dln2_gpio *dln2 = gpiochip_get_data(chip);
struct dln2_gpio_pin_val req = {
.pin = cpu_to_le16(offset),
.value = dir,
};
int ret;
ret = dln2_transfer_tx(dln2->pdev, DLN2_GPIO_PIN_SET_DIRECTION,
&req, sizeof(req));
if (ret < 0)
return ret;
if (dir == DLN2_GPIO_DIRECTION_OUT)
set_bit(offset, dln2->output_enabled);
else
clear_bit(offset, dln2->output_enabled);
return ret;
}
static int dln2_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
{
return dln2_gpio_set_direction(chip, offset, DLN2_GPIO_DIRECTION_IN