// SPDX-License-Identifier: GPL-2.0-only
/*
* FSI core driver
*
* Copyright (C) IBM Corporation 2016
*
* TODO:
* - Rework topology
* - s/chip_id/chip_loc
* - s/cfam/chip (cfam_id -> chip_id etc...)
*/
#include <linux/crc4.h>
#include <linux/device.h>
#include <linux/fsi.h>
#include <linux/idr.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/slab.h>
#include <linux/bitops.h>
#include <linux/cdev.h>
#include <linux/fs.h>
#include <linux/uaccess.h>
#include "fsi-master.h"
#define CREATE_TRACE_POINTS
#include <trace/events/fsi.h>
#define FSI_SLAVE_CONF_NEXT_MASK GENMASK(31, 31)
#define FSI_SLAVE_CONF_SLOTS_MASK GENMASK(23, 16)
#define FSI_SLAVE_CONF_SLOTS_SHIFT 16
#define FSI_SLAVE_CONF_VERSION_MASK GENMASK(15, 12)
#define FSI_SLAVE_CONF_VERSION_SHIFT 12
#define FSI_SLAVE_CONF_TYPE_MASK GENMASK(11, 4)
#define FSI_SLAVE_CONF_TYPE_SHIFT 4
#define FSI_SLAVE_CONF_CRC_SHIFT 4
#define FSI_SLAVE_CONF_CRC_MASK GENMASK(3, 0)
#define FSI_SLAVE_CONF_DATA_BITS 28
#define FSI_PEEK_BASE 0x410
static const int engine_page_size = 0x400;
#define FSI_SLAVE_BASE 0x800
/*
* FSI slave engine control register offsets
*/
#define FSI_SMODE 0x0 /* R/W: Mode register */
#define FSI_SISC 0x8 /* R/W: Interrupt condition */
#define FSI_SSTAT 0x14 /* R : Slave status */
#define FSI_LLMODE 0x100 /* R/W: Link layer mode register */
/*
* SMODE fields
*/
#define FSI_SMODE_WSC 0x80000000 /* Warm start done */
#define FSI_SMODE_ECRC 0x20000000 /* Hw CRC check */
#define FSI_SMODE_SID_SHIFT 24 /* ID shift */
#define FSI_SMODE_SID_MASK 3 /* ID Mask */
#define FSI_SMODE_ED_SHIFT 20 /* Echo delay shift */
#define FSI_SMODE_ED_MASK 0xf /* Echo delay mask */
#define FSI_SMODE_SD_SHIFT 16 /* Send delay shift */
#define FSI_SMODE_SD_MASK 0xf /* Send delay mask */
#define FSI_SMODE_LBCRR_SHIFT 8 /* Clk ratio shift */
#define FSI_SMODE_LBCRR_MASK 0xf /* Clk ratio mask */
/*
* LLMODE fields
*/
#define FSI_LLMODE_ASYNC 0x1
#define FSI_SLAVE_SIZE_23b 0x800000
static DEFINE_IDA(master_ida);
struct fsi_slave {
struct device dev;
struct fsi_master *master;
struct cdev cdev;
int cdev_idx;
int id; /* FSI address */
int link; /* FSI link# */
u32 cfam_id;
int chip_id;
uint32_t size; /* size of slave address space */
u8 t_send_delay;
u8 t_echo_delay;
};
#define to_fsi_master(d) container_of(d, struct fsi_master, dev)
#define to_fsi_slave(d) container_of(d, struct fsi_slave, dev)
static const int slave_retries = 2;
static int discard_errors;
static dev_t fsi_base_dev;
static DEFINE_IDA(fsi_minor_ida);
#define FSI_CHAR_MAX_DEVICES 0x1000
/* Legacy /dev numbering: 4 devices per chip, 16 chips */
#define FSI_CHAR_LEGACY_TOP 64
static int fsi_master_read(struct fsi_master *master,