/* * Copyright (c) 2013 Samsung Electronics Co., Ltd. * Copyright (c) 2013 Linaro Ltd. * Author: Thomas Abraham <thomas.ab@samsung.com> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. * * Common Clock Framework support for all Exynos4 SoCs.*/#include<dt-bindings/clock/exynos4.h>#include<linux/slab.h>#include<linux/clk.h>#include<linux/clk-provider.h>#include<linux/of.h>#include<linux/of_address.h>#include<linux/syscore_ops.h>#include"clk.h"#include"clk-cpu.h"/* Exynos4 clock controller register offsets */#define SRC_LEFTBUS 0x4200#define DIV_LEFTBUS 0x4500#define GATE_IP_LEFTBUS 0x4800#define E4X12_GATE_IP_IMAGE 0x4930#define CLKOUT_CMU_LEFTBUS 0x4a00#define SRC_RIGHTBUS 0x8200#define DIV_RIGHTBUS 0x8500#define GATE_IP_RIGHTBUS 0x8800#define E4X12_GATE_IP_PERIR 0x8960#define CLKOUT_CMU_RIGHTBUS 0x8a00#define EPLL_LOCK 0xc010#define VPLL_LOCK 0xc020#define EPLL_CON0 0xc110#define EPLL_CON1 0xc114#define EPLL_CON2 0xc118#define VPLL_CON0 0xc120#define VPLL_CON1 0xc124#define VPLL_CON2 0xc128#define SRC_TOP0 0xc210#define SRC_TOP1 0xc214#define SRC_CAM 0xc220#define SRC_TV 0xc224#define SRC_MFC 0xc228