/*
* ti-sysc.c - Texas Instruments sysc interconnect target driver
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* This program is distributed "as is" WITHOUT ANY WARRANTY of any
* kind, whether express or implied; without even the implied warranty
* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <linux/io.h>
#include <linux/clk.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/pm_runtime.h>
#include <linux/of_address.h>
#include <linux/of_platform.h>
#include <linux/platform_data/ti-sysc.h>
#include <dt-bindings/bus/ti-sysc.h>
enum sysc_registers {
SYSC_REVISION,
SYSC_SYSCONFIG,
SYSC_SYSSTATUS,
SYSC_MAX_REGS,
};
static const char * const reg_names[] = { "rev", "sysc", "syss", };
enum sysc_clocks {
SYSC_FCK,
SYSC_ICK,
SYSC_MAX_CLOCKS,
};
static const char * const clock_names[] = { "fck", "ick", };
#define SYSC_IDLEMODE_MASK 3
#define SYSC_CLOCKACTIVITY_MASK 3
/**
* struct sysc - TI sysc interconnect target module registers and capabilities
* @dev: struct device pointer
* @module_pa: physical address of the interconnect target module
* @module_size: size of the interconnect target module
* @module_va: virtual address of the interconnect target module
* @offsets: register offsets from module base
* @clocks: clocks used by the interconnect target module
* @legacy_mode: configured for legacy mode if set
* @cap: interconnect target module capabilities
* @cfg: interconnect target module configuration
* @name: name if available
* @revision: interconnect target module revision
*/
struct sysc {
struct device *dev;
u64 module_pa;
u32 module_size;
void __iomem *module_va;
int offsets[SYSC_MAX_REGS];
struct clk *clocks[SYSC_MAX_CLOCKS];
const char *legacy_mode;
const struct sysc_capabilities *cap;
struct sysc_config cfg;
const char *name;
u32 revision;
};
static u32 sysc_read(struct sysc *ddata, int offset)
{
if (ddata->cfg.quirks & SYSC_QUIRK_16BIT) {
u32 val;
val = readw_relaxed(ddata->module_va + offset);
val |= (readw_relaxed(ddata->module_va + offset + 4) << 16);
return val;
}
return readl_relaxed(ddata->module_va + offset);
}
static u32 sysc_read_revision(struct sysc *ddata)
{
int offset = ddata->offsets[SYSC_REVISION];
if (offset < 0)
return 0;
return sysc_read(ddata, offset);
}
static int sysc_get_one_clock(struct sysc *ddata,
enum sysc_clocks index)
{
const char *name;
int error;
switch (index) {
case SYSC_FCK:
break;
case SYSC_ICK:
break;
default:
return -EINVAL;
}
name = clock_names[index];
ddata->clocks[index] = devm_clk_get(ddata->dev, name);
if (IS_ERR(ddata->clocks[index])) {
if (PTR_ERR(ddata->clocks[index]) == -ENOENT)
return 0;
dev_err(ddata->dev, "clock get error for %s: %li\n",
name, PTR_ERR(ddata->clocks[index]));
return PTR_ERR(ddata->clocks[index]);
}
error = clk_prepare(ddata->clocks[index]);
if (error) {
dev_err(ddata->dev, "clock prepare error for %s: %i\n",
name, error);
return error;
}
return 0;
}
static int sysc_get_clocks(struct sysc *ddata)
{
int i, error;
if (ddata->legacy_mode)
return 0;
for (i = 0; i < SYSC_MAX_CLOCKS; i++) {
error = sysc_get_one_clock(ddata, i);
if (error && error != -ENOENT)
return error;
}
return 0;
}
/**
* sysc_parse_and_check_child_range - parses module IO region from ranges
* @ddata: device driver data
*
* In general we only need rev, syss, and sysc registers and not the whole
* module range. But we do want the offsets for these registers from the
* module base. This allows us to check them against the legacy hwmod
* platform data. Let's also check the ranges are configured properly.
*/
static int sysc_parse_and_check_child_range(struct sysc *ddata)
{
struct device_node *np = ddata->dev->of_node;
const __be32 *ranges;
u32 nr_addr, nr_size;
int len, error;
ranges = of_get_property(np, "ranges", &len);
if (!ranges)<