// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Driver for SWIM (Sander Woz Integrated Machine) floppy controller
*
* Copyright (C) 2004,2008 Laurent Vivier <Laurent@lvivier.info>
*
* based on Alastair Bridgewater SWIM analysis, 2001
* based on SWIM3 driver (c) Paul Mackerras, 1996
* based on netBSD IWM driver (c) 1997, 1998 Hauke Fath.
*
* 2004-08-21 (lv) - Initial implementation
* 2008-10-30 (lv) - Port to 2.6
*/
#include <linux/module.h>
#include <linux/fd.h>
#include <linux/slab.h>
#include <linux/blk-mq.h>
#include <linux/mutex.h>
#include <linux/hdreg.h>
#include <linux/kernel.h>
#include <linux/delay.h>
#include <linux/platform_device.h>
#include <asm/mac_via.h>
#define CARDNAME "swim"
struct sector_header {
unsigned char side;
unsigned char track;
unsigned char sector;
unsigned char size;
unsigned char crc0;
unsigned char crc1;
} __attribute__((packed));
#define DRIVER_VERSION "Version 0.2 (2008-10-30)"
#define REG(x) unsigned char x, x ## _pad[0x200 - 1];
struct swim {
REG(write_data)
REG(write_mark)
REG(write_CRC)
REG(write_parameter)
REG(write_phase)
REG(write_setup)
REG(write_mode0)
REG(write_mode1)
REG(read_data)
REG(read_mark)
REG(read_error)
REG(read_parameter)
REG(read_phase)
REG(read_setup)
REG(read_status)
REG(read_handshake)
} __attribute__((packed));
#define swim_write(base, reg, v) out_8(&(base)->write_##reg, (v))
#define swim_read(base, reg) in_8(&(base)->read_##reg)
/* IWM registers */
struct iwm {
REG(ph0L)
REG(ph0H)
REG(ph1L)
REG(ph1H)
REG(ph2L)
REG(ph2H)
REG(ph3L)
REG(ph3H)
REG(mtrOff)
REG(mtrOn)
REG(intDrive)
REG(extDrive)
REG(q6L)
REG(q6H)
REG(q7L)
REG(q7H)
} __attribute__((packed));
#define iwm_write(base, reg, v) out_8(&(base)->reg, (v))
#define iwm_read(base, reg) in_8(&(base)->reg)
/* bits in phase register */
#define SEEK_POSITIVE 0x070
#define SEEK_NEGATIVE 0x074
#define STEP 0x071
#define MOTOR_ON 0x072
#define MOTOR_OFF 0x076
#define INDEX 0x073
#define EJECT 0x077
#define SETMFM 0x171
#define SETGCR 0x175
#define RELAX 0x033
#define LSTRB 0x008
#define CA_MASK 0x077
/* Select values for swim_select and swim_readbit */
#define READ_DATA_0 0x074
#define ONEMEG_DRIVE 0x075
#define SINGLE_SIDED 0x076
#define DRIVE_PRESENT 0x077
#define DISK_IN 0x170
#define WRITE_PROT 0x171
#define TRACK_ZERO 0x172
#define TACHO 0x173
#define READ_DATA_1 0x174
#define GCR_MODE 0x175
#define SEEK_COMPLETE 0x176
#define TWOMEG_MEDIA 0x177
/* Bits in handshake register */
#define MARK_BYTE 0x01
#define CRC_ZERO 0x02
#define RDDATA 0x04
#define SENSE 0x08
#define MOTEN 0x10
#define ERROR 0x20
#define DAT2BYTE 0x40
#define DAT1BYTE 0x80
/* bits in setup register */
#define S_INV_WDATA 0x01
#define S_3_5_SELECT 0x02
#define S_GCR 0x04
#define S_FCLK_DIV2 0x08
#define S_ERROR_CORR 0x10
#define S_IBM_DRIVE 0x20
#define S_GCR_WRITE 0x40
#define S_TIMEOUT 0x80
/* bits in mode register */
#define CLFIFO 0x01
#define ENBL1 0x02
#define ENBL2 0x04
#define ACTION 0x08
#define WRITE_MODE 0x10
#define HEDSEL 0x20
#define MOTON 0x80
/*----------------------------------------------------------------------------*/
enum drive_location {
INTERNAL_DRIVE = 0x02,
EXTERNAL_DRIVE = 0x04,
};
enum media_type {
DD_MEDIA,
HD_MEDIA,
};
struct floppy_state {
/* physical properties */
enum drive_location location; /* internal or external drive */
int head_number; /* single- or double-sided drive */
/* media */
int disk_in;
int ejected;
enum media_type type;
int write_protected;
int total_secs;
int secpercyl;
int secpertrack;
/* in-use information */
int track;
int ref_count;
struct gendisk *disk;
struct blk_mq_tag_set tag_set;
/* parent controller */
struct swim_priv *swd;
};
enum motor_action {
OFF,
ON,
};
enum head {
LOWER_HEAD = 0,
UPPER_HEAD = 1,
};
#define FD_MAX_UNIT 2
struct swim_priv {
struct swim __iomem *base;
spinlock_t lock;
int floppy_count;
struct floppy_state unit[FD_MAX_UNIT];
};
extern int swim_read_sector_header(struct swim __iomem *base,
struct sector_header *header);
extern int swim_read_sector_data(struct swim __iomem *base,
unsigned char *data);
static DEFINE_MUTEX(swim_mutex);
static inline void set_swim_mode(struct swim __iomem *base, int enable)
{
struct iwm __iomem *iwm_base;
unsigned long flags;
if (!enable) {
swim_write(base, mode0, 0xf8);
return;
}
iwm_base = (struct iwm __iomem *)base;
local_irq_save(flags);
iwm_read(iwm_base, q7L);
iwm_read(iwm_base, mtrOff);
iwm_read(iwm_base, q6H);
iwm_write(iwm_base, q7H, 0x57);
iwm_write(iwm_base, q7H, 0x17);
iwm_write(iwm_base, q7H, 0x57);
iwm_write(iwm_base, q7H, 0x57);
local_irq_restore(flags);
}
static inline int get_swim_mode(struct swim __iomem *base)
{
unsigned long flags;