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|
/*
he.h
ForeRunnerHE ATM Adapter driver for ATM on Linux
Copyright (C) 1999-2001 Naval Research Laboratory
This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with this library; if not, write to the Free Software
Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
/*
he.h
ForeRunnerHE ATM Adapter driver for ATM on Linux
Copyright (C) 1999-2000 Naval Research Laboratory
Permission to use, copy, modify and distribute this software and its
documentation is hereby granted, provided that both the copyright
notice and this permission notice appear in all copies of the software,
derivative works or modified versions, and any portions thereof, and
that both notices appear in supporting documentation.
NRL ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" CONDITION AND
DISCLAIMS ANY LIABILITY OF ANY KIND FOR ANY DAMAGES WHATSOEVER
RESULTING FROM THE USE OF THIS SOFTWARE.
*/
#ifndef _HE_H_
#define _HE_H_
#define DEV_LABEL "he"
#define CONFIG_DEFAULT_VCIBITS 12
#define CONFIG_DEFAULT_VPIBITS 0
#define CONFIG_IRQ_SIZE 128
#define CONFIG_IRQ_THRESH (CONFIG_IRQ_SIZE/2)
#define CONFIG_TPDRQ_SIZE 512
#define TPDRQ_MASK(x) (((unsigned long)(x))&((CONFIG_TPDRQ_SIZE<<3)-1))
#define CONFIG_RBRQ_SIZE 512
#define CONFIG_RBRQ_THRESH 400
#define RBRQ_MASK(x) (((unsigned long)(x))&((CONFIG_RBRQ_SIZE<<3)-1))
#define CONFIG_TBRQ_SIZE 512
#define CONFIG_TBRQ_THRESH 400
#define TBRQ_MASK(x) (((unsigned long)(x))&((CONFIG_TBRQ_SIZE<<2)-1))
#define CONFIG_RBPL_SIZE 512
#define CONFIG_RBPL_THRESH 64
#define CONFIG_RBPL_BUFSIZE 4096
#define RBPL_MASK(x) (((unsigned long)(x))&((CONFIG_RBPL_SIZE<<3)-1))
#define CONFIG_RBPS_SIZE 1024
#define CONFIG_RBPS_THRESH 64
#define CONFIG_RBPS_BUFSIZE 128
#define RBPS_MASK(x) (((unsigned long)(x))&((CONFIG_RBPS_SIZE<<3)-1))
/* 5.1.3 initialize connection memory */
#define CONFIG_RSRA 0x00000
#define CONFIG_RCMLBM 0x08000
#define CONFIG_RCMABR 0x0d800
#define CONFIG_RSRB 0x0e000
#define CONFIG_TSRA 0x00000
#define CONFIG_TSRB 0x08000
#define CONFIG_TSRC 0x0c000
#define CONFIG_TSRD 0x0e000
#define CONFIG_TMABR 0x0f000
#define CONFIG_TPDBA 0x10000
#define HE_MAXCIDBITS 12
/* 2.9.3.3 interrupt encodings */
struct he_irq {
volatile u32 isw;
};
#define IRQ_ALIGNMENT 0x1000
#define NEXT_ENTRY(base, tail, mask) \
(((unsigned long)base)|(((unsigned long)(tail+1))&mask))
#define ITYPE_INVALID 0xffffffff
#define ITYPE_TBRQ_THRESH (0<<3)
#define ITYPE_TPD_COMPLETE (1<<3)
#define ITYPE_RBPS_THRESH (2<<3)
#define ITYPE_RBPL_THRESH (3<<3)
#define ITYPE_RBRQ_THRESH (4<<3)
#define ITYPE_RBRQ_TIMER (5<<3)
#define ITYPE_PHY (6<<3)
#define ITYPE_OTHER 0x80
#define ITYPE_PARITY 0x81
#define ITYPE_ABORT 0x82
#define ITYPE_GROUP(x) (x & 0x7)
#define ITYPE_TYPE(x) (x & 0xf8)
#define HE_NUM_GROUPS 8
/* 2.1.4 transmit packet descriptor */
struct he_tpd {
/* read by the adapter */
volatile u32 status;
volatile u32 reserved;
#define TPD_MAXIOV 3
struct {
u32 addr, len;
} iovec[TPD_MAXIOV];
#define address0 iovec[0].addr
#define length0 iovec[0].len
/* linux-atm extensions */
struct sk_buff *skb;
struct atm_vcc *vcc;
struct list_head entry;
};
#define TPD_ALIGNMENT 64
#define TPD_LEN_MASK 0xffff
#define TPD_ADDR_SHIFT 6
#define TPD_MASK 0xffffffc0
#define TPD_ADDR(x) ((x) & TPD_MASK)
#define TPD_INDEX(x) (TPD_ADDR(x) >> TPD_ADDR_SHIFT)
/* table 2.3 transmit buffer return elements */
struct he_tbrq {
volatile u32 tbre;
};
#define TBRQ_ALIGNMENT CONFIG_TBRQ_SIZE
#define TBRQ_TPD(tbrq) ((tbrq)->tbre & 0xffffffc0)
#define TBRQ_EOS(tbrq) ((tbrq)->tbre & (1<<3))
#define TBRQ_MULTIPLE(tbrq) ((tbrq)->tbre & (1))
/* table 2.21 receive buffer return queue element field organization */
struct he_rbrq {
volatile u32 addr;
volatile u32 cidlen;
};
#define RBRQ_ALIGNMENT CONFIG_RBRQ_SIZE
#define RBRQ_ADDR(rbrq) ((rbrq)->addr & 0xffffffc0)
#define RBRQ_CRC_ERR(rbrq) ((rbrq)->addr & (1<<5))
#define RBRQ_LEN_ERR(rbrq) ((rbrq)->addr & (1<<4))
#define RBRQ_END_PDU(rbrq) ((rbrq)->addr & (1<<3))
#define RBRQ_AAL5_PROT(rbrq) ((rbrq)->addr & (1<<2))
#define RBRQ_CON_CLOSED(rbrq) ((rbrq)->addr & (1<<1))
#define RBRQ_HBUF_ERR(rbrq) ((rbrq)->addr & 1)
#define RBRQ_CID(rbrq) (((rbrq)->cidlen >> 16) & 0x1fff)
#define RBRQ_BUFLEN(rbrq) ((rbrq)->cidlen & 0xffff)
/* figure 2.3 transmit packet descriptor ready queue */
struct he_tpdrq {
volatile u32 tpd;
volatile u32 cid;
};
#define TPDRQ_ALIGNMENT CONFIG_TPDRQ_SIZE
/* table 2.30 host status page detail */
#define HSP_ALIGNMENT 0x400 /* must align on 1k boundary */
struct he_hsp {
struct he_hsp_entry {
volatile u32 tbrq_tail;
volatile u32 reserved1[15];
volatile u32 rbrq_tail;
volatile u32 reserved2[15];
} group[HE_NUM_GROUPS];
};
/* figure 2.9 receive buffer pools */
struct he_rbp {
volatile u32 phys;
volatile u32 status;
};
/* NOTE: it is suggested that virt be the virtual address of the host
buffer. on a 64-bit machine, this would not work. Instead, we
store the real virtual address in another list, and store an index
(and buffer status) in the virt member.
*/
#define RBP_INDEX_OFF 6
#define RBP_INDEX(x) (((long)(x) >> RBP_INDEX_OFF) & 0xffff)
#define RBP_LOANED 0x80000000
#define RBP_SMALLBUF 0x40000000
struct he_virt {
void *virt;
};
#define RBPL_ALIGNMENT CONFIG_RBPL_SIZE
#define RBPS_ALIGNMENT CONFIG_RBPS_SIZE
#ifdef notyet
struct he_group {
u32 rpbs_size, rpbs_qsize;
struct he_rbp rbps_ba;
u32 rpbl_size, rpbl_qsize;
struct he_rpb_entry *rbpl_ba;
};
#endif
#define HE_LOOKUP_VCC(dev, cid) ((dev)->he_vcc_table[(cid)].vcc)
struct he_vcc_table
{
struct atm_vcc *vcc;
};
struct he_cs_stper
{
long pcr;
int inuse;
};
#define HE_NUM_CS_STPER 16
struct he_dev {
unsigned int number;
unsigned int irq;
void __iomem *membase;
char prod_id[30];
char mac_addr[6];
int media;
unsigned int vcibits, vpibits;
unsigned int cells_per_row;
unsigned int bytes_per_row;
unsigned int cells_per_lbuf;
unsigned int r0_numrows, r0_startrow, r0_numbuffs;
unsigned int r1_numrows, r1_startrow, r1_numbuffs;
unsigned int tx_numrows, tx_startrow, tx_numbuffs;
unsigned int buffer_limit;
struct he_vcc_table *he_vcc_table;
#ifdef notyet
struct he_group group[HE_NUM_GROUPS];
#endif
struct he_cs_stper cs_stper[HE_NUM_CS_STPER];
unsigned total_bw;
dma_addr_t irq_phys;
struct he_irq *irq_base, *irq_head, *irq_tail;
volatile unsigned *irq_tailoffset;
int irq_peak;
struct tasklet_struct tasklet;
struct pci_pool *tpd_pool;
struct list_head outstanding_tpds;
dma_addr_t tpdrq_phys;
struct he_tpdrq *tpdrq_base, *tpdrq_tail, *tpdrq_head;
spinlock_t global_lock; /* 8.1.5 pci transaction ordering
error problem */
dma_addr_t rbrq_phys;
struct he_rbrq *rbrq_base, *rbrq_head;
int rbrq_peak;
struct pci_pool *rbpl_pool;
dma_addr_t rbpl_phys;
struct he_rbp *rbpl_base, *rbpl_tail;
struct he_virt *rbpl_virt;
int rbpl_peak;
struct pci_pool *rbps_pool;
dma_addr_t rbps_phys;
struct he_rbp *rbps_base, *rbps_tail;
struct he_virt *rbps_virt;
int rbps_peak;
dma_addr_t tbrq_phys;
struct he_tbrq *tbrq_base, *tbrq_head;
int tbrq_peak;
dma_addr_t hsp_phys;
struct he_hsp *hsp;
struct pci_dev *pci_dev;
struct atm_dev *atm_dev;
struct he_dev *next;
};
struct he_iovec
{
u32 iov_base;
u32 iov_len;
};
#define HE_MAXIOV 20
struct he_vcc
{
struct he_iovec iov_head[HE_MAXIOV];
struct he_iovec
|