path: root/arch/sparc/kernel/head_32.S

/* SPDX-License-Identifier: GPL-2.0 */
/*
 * head.S: The initial boot code for the Sparc port of Linux.
 *
 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
 * Copyright (C) 1995,1999 Pete Zaitcev   (zaitcev@yahoo.com)
 * Copyright (C) 1996 Miguel de Icaza (miguel@nuclecu.unam.mx)
 * Copyright (C) 1997 Jakub Jelinek   (jj@sunsite.mff.cuni.cz)
 * Copyright (C) 1997 Michael A. Griffith (grif@acm.org)
 *
 * CompactPCI platform by Eric Brower, 1999.
 */

#include <linux/version.h>
#include <linux/init.h>

#include <asm/head.h>
#include <asm/asi.h>
#include <asm/contregs.h>
#include <asm/ptrace.h>
#include <asm/psr.h>
#include <asm/page.h>
#include <asm/kdebug.h>
#include <asm/winmacro.h>
#include <asm/thread_info.h>	/* TI_UWINMASK */
#include <asm/errno.h>
#include <asm/pgtsrmmu.h>	/* SRMMU_PGDIR_SHIFT */
#include <asm/export.h>

	.data
/* The following are used with the prom_vector node-ops to figure out
 * the cpu-type
 */
	.align 4
	.globl cputypval
cputypval:
	.asciz "sun4m"
	.ascii "     "

/* Tested on SS-5, SS-10 */
	.align 4
cputypvar:
	.asciz "compatible"

	.align 4

notsup:
	.asciz	"Sparc-Linux sun4/sun4c or MMU-less not supported\n\n"
	.align 4

sun4e_notsup:
        .asciz  "Sparc-Linux sun4e support does not exist\n\n"
	.align 4

/* The trap-table - located in the __HEAD section */
#include "ttable_32.S"

	.align PAGE_SIZE

/* This was the only reasonable way I could think of to properly align
 * these page-table data structures.
 */
	.globl empty_zero_page
empty_zero_page:	.skip PAGE_SIZE
EXPORT_SYMBOL(empty_zero_page)

	.global root_flags
	.global ram_flags
	.global root_dev
	.global sparc_ramdisk_image
	.global sparc_ramdisk_size

/* This stuff has to be in sync with SILO and other potential boot loaders
 * Fields should be kept upward compatible and whenever any change is made,
 * HdrS version should be incremented.
 */
	.ascii	"HdrS"
	.word	LINUX_VERSION_CODE
	.half	0x0203		/* HdrS version */
root_flags:
	.half	1
root_dev:
	.half	0
ram_flags:
	.half	0
sparc_ramdisk_image:
	.word	0
sparc_ramdisk_size:
	.word	0
	.word	reboot_command
	.word	0, 0, 0
	.word	_end

/* Cool, here we go. Pick up the romvec pointer in %o0 and stash it in
 * %g7 and at prom_vector_p. And also quickly check whether we are on
 * a v0, v2, or v3 prom.
 */
gokernel:
		/* Ok, it's nice to know, as early as possible, if we
		 * are already mapped where we expect to be in virtual
		 * memory.  The Solaris /boot elf format bootloader
		 * will peek into our elf header and load us where
		 * we want to be, otherwise we have to re-map.
		 *
		 * Some boot loaders don't place the jmp'rs address
		 * in %o7, so we do a pc-relative call to a local
		 * label, then see what %o7 has.
		 */

		mov	%o7, %g4		! Save %o7

		/* Jump to it, and pray... */
current_pc:
		call	1f
		 nop

1:
		mov	%o7, %g3

		tst	%o0
		be	no_sun4u_here
		 mov	%g4, %o7		/* Previous %o7. */

		mov	%o0, %l0		! stash away romvec
		mov	%o0, %g7		! put it here too
		mov	%o1, %l1		! stash away debug_vec too

		/* Ok, let's check out our run time program counter. */
		set	current_pc, %g5
		cmp	%g3, %g5
		be	already_mapped
		 nop

		/* %l6 will hold the offset we have to subtract
		 * from absolute symbols in order to access areas
		 * in our own image.  If already mapped this is
		 * just plain zero, else it is KERNBASE.
		 */
		set	KERNBASE, %l6
		b	copy_prom_lvl14
		 nop

already_mapped:
		mov	0, %l6

		/* Copy over the Prom's level 14 clock handler. */
copy_prom_lvl14:
#if 1
		/* DJHR
		 * preserve our linked/calculated instructions
		 */
		set	lvl14_save, %g1
		set	t_irq14, %g3
		sub	%g1, %l6, %g1		! translate to physical
		sub	%g3, %l6, %g3		! translate to physical
		ldd	[%g3], %g4
		std	%g4, [%g1]
		ldd	[%g3+8], %g4
		std	%g4, [%g1+8]
#endif
		rd	%tbr, %g1
		andn	%g1, 0xfff, %g1		! proms trap table base
		or	%g0, (0x1e<<4), %g2	! offset to lvl14 intr
		or	%g1, %g2, %g2
		set	t_irq14, %g3
		sub	%g3, %l6, %g3
		ldd	[%g2], %g4
		std	%g4, [%g3]
		ldd	[%g2 + 0x8], %g4
		std	%g4, [%g3 + 0x8]	! Copy proms handler

/* DON'T TOUCH %l0 thru %l5 in these remapping routines,
 * we need their values afterwards!
 */

		/* Now check whether we are already mapped, if we
		 * are we can skip all this garbage coming up.
		 */
copy_prom_done:
		cmp	%l6, 0
		be	go_to_highmem		! this will be a nop then
		 nop

		/* Validate that we are in fact running on an
		 * SRMMU based cpu.
		 */
		set	0x4000, %g6
		cmp	%g7, %g6
		bne	not_a_sun4
		 nop

halt_notsup:
		ld	[%g7 + 0x68], %o1
		set	notsup, %o0
		sub	%o0, %l6, %o0
		call	%o1
		 nop
		ba	halt_me
		 nop

not_a_sun4:
		/* It looks like this is a machine we support.
		 * Now find out what MMU we are dealing with
		 * LEON - identified by the psr.impl field
		 * Viking - identified by the psr.impl field
		 * In all other cases a sun4m srmmu.
		 * We check that the MMU is enabled in all cases.
		 */

		/* Check if this is a LEON CPU */
		rd	%psr, %g3
		srl	%g3, PSR_IMPL_SHIFT, %g3
		and	%g3, PSR_IMPL_SHIFTED_MASK, %g3
		cmp	%g3, PSR_IMPL_LEON
		be	leon_remap		/* It is a LEON - jump */
		 nop

		/* Sanity-check, is MMU enabled */
		lda	[%g0] ASI_M_MMUREGS, %g1
		andcc	%g1, 1, %g0
		be	halt_notsup
		 nop

		/* Check for a viking (TI) module. */
		cmp	%g3, PSR_IMPL_TI
		bne	srmmu_not_viking
		 nop

		/* Figure out what kind of viking we are on.
		 * We need to know if we have to play with the
		 * AC bit and disable traps or not.
		 */

		/* I've only seen MicroSparc's on SparcClassics with this
		 * bit set.
		 */
		set	0x800, %g2
		lda	[