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// SPDX-License-Identifier: GPL-2.0
#define KMSG_COMPONENT "zpci"
#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
#include <linux/kernel.h>
#include <linux/irq.h>
#include <linux/kernel_stat.h>
#include <linux/pci.h>
#include <linux/msi.h>
#include <linux/smp.h>
#include <asm/isc.h>
#include <asm/airq.h>
static enum {FLOATING, DIRECTED} irq_delivery;
#define SIC_IRQ_MODE_ALL 0
#define SIC_IRQ_MODE_SINGLE 1
#define SIC_IRQ_MODE_DIRECT 4
#define SIC_IRQ_MODE_D_ALL 16
#define SIC_IRQ_MODE_D_SINGLE 17
#define SIC_IRQ_MODE_SET_CPU 18
/*
* summary bit vector
* FLOATING - summary bit per function
* DIRECTED - summary bit per cpu (only used in fallback path)
*/
static struct airq_iv *zpci_sbv;
/*
* interrupt bit vectors
* FLOATING - interrupt bit vector per function
* DIRECTED - interrupt bit vector per cpu
*/
static struct airq_iv **zpci_ibv;
/* Modify PCI: Register adapter interruptions */
static int zpci_set_airq(struct zpci_dev *zdev)
{
u64 req = ZPCI_CREATE_REQ(zdev->fh, 0, ZPCI_MOD_FC_REG_INT);
struct zpci_fib fib = {0};
u8 status;
fib.fmt0.isc = PCI_ISC;
fib.fmt0.sum = 1; /* enable summary notifications */
fib.fmt0.noi = airq_iv_end(zdev->aibv);
fib.fmt0.aibv = (unsigned long) zdev->aibv->vector;
fib.fmt0.aibvo = 0; /* each zdev has its own interrupt vector */
fib.fmt0.aisb = (unsigned long) zpci_sbv->vector + (zdev->aisb/64)*8;
fib.fmt0.aisbo = zdev->aisb & 63;
return zpci_mod_fc(req, &fib, &status) ? -EIO : 0;
}
/* Modify PCI: Unregister adapter interruptions */
static int zpci_clear_airq(struct zpci_dev *zdev)
{
u64 req = ZPCI_CREATE_REQ(zdev->fh, 0, ZPCI_MOD_FC_DEREG_INT);
struct zpci_fib fib = {0};
u8 cc, status;
cc = zpci_mod_fc(req, &fib, &status);
if (cc == 3 || (cc == 1 && status == 24))
/* Function already gone or IRQs already deregistered. */
cc = 0;
return cc ? -EIO : 0;
}
/* Modify PCI: Register CPU directed interruptions */
static int zpci_set_directed_irq(struct zpci_dev *zdev)
{
u64 req = ZPCI_CREATE_REQ(zdev->fh, 0, ZPCI_MOD_FC_REG_INT_D);
struct zpci_fib fib = {0};
u8 status;
fib.fmt = 1;
fib.fmt1.noi = zdev->msi_nr_irqs;
fib.fmt1.dibvo = zdev->msi_first_bit;
return zpci_mod_fc(req, &fib, &status) ? -EIO : 0;
}
/* Modify PCI: Unregister CPU directed interruptions */
static int zpci_clear_directed_irq(struct zpci_dev *zdev)
{
u64 req = ZPCI_CREATE_REQ(zdev->fh, 0, ZPCI_MOD_FC_DEREG_INT_D);
struct zpci_fib fib = {0};
u8 cc, status;
fib.fmt = 1;
cc = zpci_mod_fc(req, &fib, &status);
if (cc == 3 || (cc == 1 && status == 24))
/* Function already gone or IRQs already deregistered. */
cc = 0;
return cc ? -EIO : 0;
}
static int zpci_set_irq_affinity(struct irq_data *data, const struct cpumask *dest,
bool force)
{
struct msi_desc *entry = irq_get_msi_desc(data->irq);
struct msi_msg msg = entry->msg;
msg.address_lo &= 0xff0000ff;
msg.address_lo |= (cpumask_first(dest) << 8);
pci_write_msi_msg(data->irq, &msg);
return IRQ_SET_MASK_OK;
}
static struct irq_chip zpci_irq_chip = {
.name = "PCI-MSI",
.irq_unmask = pci_msi_unmask_irq,
.irq_mask = pci_msi_mask_irq,
};
static void zpci_handle_cpu_local_irq(bool rescan)
{
struct airq_iv *dibv = zpci_ibv[smp_processor_id()];
unsigned long bit;
int irqs_on = 0;
for (bit = 0;;) {
/* Scan the directed IRQ bit vector */
bit = airq_iv_scan(dibv, bit, airq_iv_end(dibv));
if (bit == -1UL) {
if (!rescan || irqs_on++)
/* End of second scan with interrupts on. */
break;
/* First scan complete, reenable interrupts. */
if (zpci_set_irq_ctrl(SIC_IRQ_MODE_D_SINGLE, PCI_ISC))
break;
bit = 0;
continue;
}
inc_irq_stat(IRQIO_MSI);
generic_handle_irq(airq_iv_get_data(dibv, bit));
}
}
struct cpu_irq_data {
call_single_data_t csd;
atomic_t scheduled;
};
static DEFINE_PER_CPU_SHARED_ALIGNED(struct cpu_irq_data, irq_data);
static void zpci_handle_remote_irq(void *data)
{
atomic_t *scheduled = data;
do {
zpci_handle_cpu_local_irq(false);
} while (atomic_dec_return(scheduled));
}
static void zpci_handle_fallback_irq(void)
{
struct cpu_irq_data *cpu_data;
unsigned long cpu;
int irqs_on = 0;
for (cpu = 0;;) {
cpu = airq_iv_scan(zpci_sbv, cpu, airq_iv_end(zpci_sbv));
if (cpu == -1UL) {
if (irqs_on++)
/* End of second scan with interrupts on. */
break;
/* First scan complete, reenable interrupts. */
if (zpci_set_irq_ctrl(SIC_IRQ_MODE_SINGLE, PCI_ISC))
break;
cpu = 0;
continue;
}
cpu_data = &per_cpu(irq_data, cpu);
if (atomic_inc_return(&cpu_data->scheduled) > 1)
continue;
cpu_data->csd.func = zpci_handle_remote_irq;
cpu_data->csd.info = &cpu_data->scheduled;
cpu_data->csd.flags = 0;
smp_call_function_single_async(cpu, &cpu_data->csd);
}
}
static void zpci_directed_irq_handler(struct airq_struct *airq, bool floating)
{
if (floating) {
inc_irq_stat(IRQIO_PCF);
zpci_handle_fallback_irq();
} else {
inc_irq_stat(IRQIO_PCD);
zpci_handle_cpu_local_irq(true);
}
}
static void zpci_floating_irq_handler(struct airq_struct *airq, bool floating)
{
unsigned long si, ai;
struct airq_iv *aibv;
int irqs_on = 0;
inc_irq_stat(IRQIO_PCF);
for (si = 0;;) {
/* Scan adapter summary indicator bit vector */
si = airq_iv_scan(zpci_sbv, si, airq_iv_end(zpci_sbv));
if (si == -1UL) {
if (irqs_on++)
/* End of second scan with interrupts on. */
break;
/* First scan complete, reenable interrupts. */
if (zpci_set_irq_ctrl(SIC_IRQ_MODE_SINGLE, PCI_ISC))
break;
si = 0;
continue;
}
/* Scan the adapter interrupt vector for this device. */
aibv = zpci_ibv[si];
for (ai = 0;;) {
ai = airq_iv_scan(aibv, ai, airq_iv_end(aibv));
if (ai == -1UL)
break;
inc_irq_stat(IRQIO_MSI);
airq_iv_lock(aibv, ai);
generic_handle_irq(airq_iv_get_data(aibv, ai));
airq_iv_unlock(aibv, ai);
}
}
}
int arch_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
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