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|
/*
* PowerNV cpuidle code
*
* Copyright 2015 IBM Corp.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#include <linux/types.h>
#include <linux/mm.h>
#include <linux/slab.h>
#include <linux/of.h>
#include <linux/device.h>
#include <linux/cpu.h>
#include <asm/firmware.h>
#include <asm/machdep.h>
#include <asm/opal.h>
#include <asm/cputhreads.h>
#include <asm/cpuidle.h>
#include <asm/code-patching.h>
#include <asm/smp.h>
#include <asm/runlatch.h>
#include "powernv.h"
#include "subcore.h"
/* Power ISA 3.0 allows for stop states 0x0 - 0xF */
#define MAX_STOP_STATE 0xF
#define P9_STOP_SPR_MSR 2000
#define P9_STOP_SPR_PSSCR 855
static u32 supported_cpuidle_states;
/*
* The default stop state that will be used by ppc_md.power_save
* function on platforms that support stop instruction.
*/
static u64 pnv_default_stop_val;
static u64 pnv_default_stop_mask;
static bool default_stop_found;
/*
* First deep stop state. Used to figure out when to save/restore
* hypervisor context.
*/
u64 pnv_first_deep_stop_state = MAX_STOP_STATE;
/*
* psscr value and mask of the deepest stop idle state.
* Used when a cpu is offlined.
*/
static u64 pnv_deepest_stop_psscr_val;
static u64 pnv_deepest_stop_psscr_mask;
static bool deepest_stop_found;
static int pnv_save_sprs_for_deep_states(void)
{
int cpu;
int rc;
/*
* hid0, hid1, hid4, hid5, hmeer and lpcr values are symmetric across
* all cpus at boot. Get these reg values of current cpu and use the
* same across all cpus.
*/
uint64_t lpcr_val = mfspr(SPRN_LPCR) & ~(u64)LPCR_PECE1;
uint64_t hid0_val = mfspr(SPRN_HID0);
uint64_t hid1_val = mfspr(SPRN_HID1);
uint64_t hid4_val = mfspr(SPRN_HID4);
uint64_t hid5_val = mfspr(SPRN_HID5);
uint64_t hmeer_val = mfspr(SPRN_HMEER);
uint64_t msr_val = MSR_IDLE;
uint64_t psscr_val = pnv_deepest_stop_psscr_val;
for_each_possible_cpu(cpu) {
uint64_t pir = get_hard_smp_processor_id(cpu);
uint64_t hsprg0_val = (uint64_t)&paca[cpu];
rc = opal_slw_set_reg(pir, SPRN_HSPRG0, hsprg0_val);
if (rc != 0)
return rc;
rc = opal_slw_set_reg(pir, SPRN_LPCR, lpcr_val);
if (rc != 0)
return rc;
if (cpu_has_feature(CPU_FTR_ARCH_300)) {
rc = opal_slw_set_reg(pir, P9_STOP_SPR_MSR, msr_val);
if (rc)
return rc;
rc = opal_slw_set_reg(pir,
P9_STOP_SPR_PSSCR, psscr_val);
if (rc)
return rc;
}
/* HIDs are per core registers */
if (cpu_thread_in_core(cpu) == 0) {
rc = opal_slw_set_reg(pir, SPRN_HMEER, hmeer_val);
if (rc != 0)
return rc;
rc = opal_slw_set_reg(pir, SPRN_HID0, hid0_val);
if (rc != 0)
return rc;
/* Only p8 needs to set extra HID regiters */
if (!cpu_has_feature(CPU_FTR_ARCH_300)) {
rc = opal_slw_set_reg(pir, SPRN_HID1, hid1_val);
if (rc != 0)
return rc;
rc = opal_slw_set_reg(pir, SPRN_HID4, hid4_val);
if (rc != 0)
return rc;
rc = opal_slw_set_reg(pir, SPRN_HID5, hid5_val);
if (rc != 0)
return rc;
}
}
}
return 0;
}
static void pnv_alloc_idle_core_states(void)
{
int i, j;
int nr_cores = cpu_nr_cores();
u32 *core_idle_state;
/*
* core_idle_state - The lower 8 bits track the idle state of
* each thread of the core.
*
* The most significant bit is the lock bit.
*
* Initially all the bits corresponding to threads_per_core
* are set. They are cleared when the thread enters deep idle
* state like sleep and winkle/stop.
*
* Initially the lock bit is cleared. The lock bit has 2
* purposes:
* a. While the first thread in the core waking up from
* idle is restoring core state, it prevents other
* threads in the core from switching to process
* context.
* b. While the last thread in the core is saving the
* core state, it prevents a different thread from
* waking up.
*/
for (i = 0; i < nr_cores; i++) {
int first_cpu = i * threads_per_core;
int node = cpu_to_node(first_cpu);
size_t paca_ptr_array_size;
core_idle_state = kmalloc_node(sizeof(u32), GFP_KERNEL, node);
*core_idle_state = (1 << threads_per_core) - 1;
paca_ptr_array_size = (threads_per_core *
sizeof(struct paca_struct *));
for (j = 0; j < threads_per_core; j++) {
int cpu = first_cpu + j;
paca[cpu].core_idle_state_ptr = core_idle_state;
paca[cpu].thread_idle_state = PNV_THREAD_RUNNING;
paca[cpu].thread_mask = 1 << j;
if (!cpu_has_feature(CPU_FTR_POWER9_DD1))
continue;
paca[cpu].thread_sibling_pacas =
kmalloc_node(paca_ptr_array_size,
GFP_KERNEL, node);
}
}
update_subcore_sibling_mask();
if (supported_cpuidle_states & OPAL_PM_LOSE_FULL_CONTEXT)
pnv_save_sprs_for_deep_states();
}
u32 pnv_get_supported_cpuidle_states(void)
{
return supported_cpuidle_states;
}
EXPORT_SYMBOL_GPL(pnv_get_supported_cpuidle_states);
static void pnv_fastsleep_workaround_apply(void *info)
{
int rc;
int *err = info;
rc = opal_config_cpu_idle_state(OPAL_CONFIG_IDLE_FASTSLEEP,
OPAL_CONFIG_IDLE_APPLY);
if (rc)
*err = 1;
}
/*
* Used to store fastsleep workaround state
* 0 - Workaround applied/undone at fastsleep entry/exit path (Default)
* 1 - Workaround applied once, never undone.
*/
static u8 fastsleep_workaround_applyonce;
static ssize_t show_fastsleep_workaround_applyonce(struct device *dev,
struct device_attribute *attr, char *buf)
{
return sprintf(buf, "%u\n", fastsleep_workaround_applyonce);
}
static ssize_t store_fastsleep_workaround_applyonce(struct device *dev,
struct device_attribute *attr, const char *buf,
size_t count)
{
cpumask_t primary_thread_mask;
int err;
u8 val;
if (kstrtou8(buf, 0, &val) || val != 1)
return -EINVAL;
if (fastsleep_workaround_applyonce == 1)
return count;
/*
* fastsleep_workaround_applyonce = 1 implies
* fastsleep workaround needs to be left in 'applied' state on all
* the cores. Do this by-
* 1. Patching out the call to 'undo' workaround in fastsleep exit path
* 2. Sending ipi to all the cores which have at least one online thread
* 3. Patching out the call to 'apply' workaround in fastsleep entry
* path
* There is no need to send ipi to cores which have all threads
* offlined, as last thread of the core entering fastsleep or deeper
* state would have applied workaround.
*/
err = patch_instruction(
(unsigned int *)pnv_fastsleep_workaround_at_exit,
PPC_INST_NOP);
if (err) {
pr_err("fastsleep_workaround_applyonce change failed while patching pnv_fastsleep_work
|