/* SPDX-License-Identifier: GPL-2.0 *//* * Contains the definition of registers common to all PowerPC variants. * If a register definition has been changed in a different PowerPC * variant, we will case it in #ifndef XXX ... #endif, and have the * number used in the Programming Environments Manual For 32-Bit * Implementations of the PowerPC Architecture (a.k.a. Green Book) here. */#ifndef _ASM_POWERPC_REG_H#define _ASM_POWERPC_REG_H#ifdef __KERNEL__#include<linux/stringify.h>#include<linux/const.h>#include<asm/cputable.h>#include<asm/asm-const.h>#include<asm/feature-fixups.h>/* Pickup Book E specific registers. */#if defined(CONFIG_BOOKE) || defined(CONFIG_40x)#include<asm/reg_booke.h>#endif /* CONFIG_BOOKE || CONFIG_40x */#ifdef CONFIG_FSL_EMB_PERFMON#include<asm/reg_fsl_emb.h>#endif#include<asm/reg_8xx.h>#define MSR_SF_LG 63 /* Enable 64 bit mode */#define MSR_ISF_LG 61 /* Interrupt 64b mode valid on 630 */#define MSR_HV_LG 60 /* Hypervisor state */#define MSR_TS_T_LG 34 /* Trans Mem state: Transactional */#define MSR_TS_S_LG 33 /* Trans Mem state: Suspended */#define MSR_TS_LG 33 /* Trans Mem state (2 bits) */#define MSR_TM_LG 32 /* Trans Mem Available */#define MSR_VEC_LG 25 /* Enable AltiVec */#define MSR_VSX_LG 23 /* Enable VSX */#define MSR_S_LG 22 /* Secure state */#define MSR_POW_LG 18 /* Enable Power Management */#define MSR_WE_LG 18 /* Wait State Enable */#define MSR_TGPR_LG 17 /* TLB Update registers in use */#define MSR_CE_LG 17 /* Critical Interrupt Enable */#define MSR_ILE_LG 16 /* Interrupt Little Endian */#define MSR_EE_LG 15 /* External Interrupt Enable */#define MSR_PR_LG 14 /* Problem State / Privilege Level */#define MSR_FP_LG 13 /* Floating Point enable */#define MSR_ME_LG 12 /* Machine Check Enable */#define MSR_FE0_LG 11 /* Floating Exception mode 0 */#define MSR_SE_LG 10 /* Single Step */#define MSR_BE_LG 9 /* Branch Trace */#define MSR_DE_LG 9 /* Debug Exception Enable */#define MSR_FE1_LG 8 /* Floating Exception mode 1 */#define MSR_IP_LG 6 /* Exception prefix 0x000/0xFFF */#define MSR_IR_LG 5 /* Instruction Relocate */#define MSR_DR_LG 4 /* Data Relocate */