// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Linux/PA-RISC Project (http://www.parisc-linux.org/)
*
* Floating-point emulation code
* Copyright (C) 2001 Hewlett-Packard (Paul Bame) <bame@debian.org>
*/
/*
* BEGIN_DESC
*
* File:
* @(#) pa/fp/fpudispatch.c $Revision: 1.1 $
*
* Purpose:
* <<please update with a synopsis of the functionality provided by this file>>
*
* External Interfaces:
* <<the following list was autogenerated, please review>>
* emfpudispatch(ir, dummy1, dummy2, fpregs)
* fpudispatch(ir, excp_code, holder, fpregs)
*
* Internal Interfaces:
* <<the following list was autogenerated, please review>>
* static u_int decode_06(u_int, u_int *)
* static u_int decode_0c(u_int, u_int, u_int, u_int *)
* static u_int decode_0e(u_int, u_int, u_int, u_int *)
* static u_int decode_26(u_int, u_int *)
* static u_int decode_2e(u_int, u_int *)
* static void update_status_cbit(u_int *, u_int, u_int, u_int)
*
* Theory:
* <<please update with a overview of the operation of this file>>
*
* END_DESC
*/
#define FPUDEBUG 0
#include "float.h"
#include <linux/bug.h>
#include <linux/kernel.h>
#include <asm/processor.h>
/* #include <sys/debug.h> */
/* #include <machine/sys/mdep_private.h> */
#define COPR_INST 0x30000000
/*
* definition of extru macro. If pos and len are constants, the compiler
* will generate an extru instruction when optimized
*/
#define extru(r,pos,len) (((r) >> (31-(pos))) & (( 1 << (len)) - 1))
/* definitions of bit field locations in the instruction */
#define fpmajorpos 5
#define fpr1pos 10
#define fpr2pos 15
#define fptpos 31
#define fpsubpos 18
#define fpclass1subpos 16
#define fpclasspos 22
#define fpfmtpos 20
#define fpdfpos 18
#define fpnulpos 26
/*
* the following are the extra bits for the 0E major op
*/
#define fpxr1pos 24
#define fpxr2pos 19
#define fpxtpos 25
#define fpxpos 23
#define fp0efmtpos 20
/*
* the following are for the multi-ops
*/
#define fprm1pos 10
#define fprm2pos 15
#define fptmpos 31
#define fprapos 25
#define fptapos 20
#define fpmultifmt 26
/*
* the following are for the fused FP instructions
*/
/* fprm1pos 10 */
/* fprm2pos 15 */
#define fpraupos 18
#define fpxrm2pos 19
/* fpfmtpos 20 */
#define fpralpos 23
#define fpxrm1pos 24
/* fpxtpos 25 */
#define fpfusedsubop 26
/* fptpos 31 */
/*
* offset to constant zero in the FP emulation registers
*/
#define fpzeroreg (32*sizeof(double)/sizeof(u_int))
/*
* extract the major opcode from the instruction
*/
#define get_major(op) extru(op,fpmajorpos,6)
/*
* extract the two bit class field from the FP instruction. The class is at bit
* positions 21-22
*/
#define get_class(op) extru(op,fpclasspos,2)
/*
* extract the 3 bit subop field. For all but class 1 instructions, it is
* located at bit positions 16-18
*/
#define get_subop(op) extru(op,fpsubpos,3)
/*
* extract the 2 or 3 bit subop field from class 1 instructions. It is located
* at bit positions 15-16 (PA1.1) or 14-16 (PA2.0)
*/
#define get_subop1_PA1_1(op) extru(op,fpclass1subpos,2) /* PA89 (1.1) fmt */
#define get_subop1_PA2_0(op) extru(op,fpclass1subpos,3) /* PA 2.0 fmt */
/* definitions of unimplemented exceptions */
#define MAJOR_0C_EXCP 0x09
#define MAJOR_0E_EXCP 0x0b
#define MAJOR_06_EXCP 0x03
#define MAJOR_26_EXCP 0x23
#define MAJOR_2E_EXCP 0x2b
#define PA83_UNIMP_EXCP 0x01
/*
* Special Defines for TIMEX specific code
*/
#define FPU_TYPE_FLAG_POS (EM_FPU_TYPE_OFFSET>>2)
#d