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/*
* Copyright (C) 2012 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
*/
#include <linux/mm.h>
#include <linux/delay.h>
#include <linux/clk.h>
#include <linux/io.h>
#include <linux/clkdev.h>
#include <linux/of.h>
#include <linux/err.h>
#include "crmregs-imx3.h"
#include "clk.h"
#include "common.h"
#include "hardware.h"
struct arm_ahb_div {
unsigned char arm, ahb, sel;
};
static struct arm_ahb_div clk_consumer[] = {
{ .arm = 1, .ahb = 4, .sel = 0},
{ .arm = 1, .ahb = 3, .sel = 1},
{ .arm = 2, .ahb = 2, .sel = 0},
{ .arm = 0, .ahb = 0, .sel = 0},
{ .arm = 0, .ahb = 0, .sel = 0},
{ .arm = 0, .ahb = 0, .sel = 0},
{ .arm = 4, .ahb = 1, .sel = 0},
{ .arm = 1, .ahb = 5, .sel = 0},
{ .arm = 1, .ahb = 8, .sel = 0},
{ .arm = 1, .ahb = 6, .sel = 1},
{ .arm = 2, .ahb = 4, .sel = 0},
{ .arm = 0, .ahb = 0, .sel = 0},
{ .arm = 0, .ahb = 0, .sel = 0},
{ .arm = 0, .ahb = 0, .sel = 0},
{ .arm = 4, .ahb = 2, .sel = 0},
{ .arm = 0, .ahb = 0, .sel = 0},
};
static char hsp_div_532[] = { 4, 8, 3, 0 };
static char hsp_div_400[] = { 3, 6, 3, 0 };
static const char *std_sel[] = {"ppll", "arm"};
static const char *ipg_per_sel[] = {"ahb_per_div", "arm_per_div"};
enum mx35_clks {
ckih, mpll, ppll, mpll_075, arm, hsp, hsp_div, hsp_sel, ahb, ipg,
arm_per_div, ahb_per_div, ipg_per, uart_sel, uart_div, esdhc_sel,
esdhc1_div, esdhc2_div, esdhc3_div, spdif_sel, spdif_div_pre,
spdif_div_post, ssi_sel, ssi1_div_pre, ssi1_div_post, ssi2_div_pre,
ssi2_div_post, usb_sel, usb_div, nfc_div, asrc_gate, pata_gate,
audmux_gate, can1_gate, can2_gate, cspi1_gate, cspi2_gate, ect_gate,
edio_gate, emi_gate, epit1_gate, epit2_gate, esai_gate, esdhc1_gate,
esdhc2_gate, esdhc3_gate, fec_gate, gpio1_gate, gpio2_gate, gpio3_gate,
gpt_gate, i2c1_gate, i2c2_gate, i2c3_gate, iomuxc_gate, ipu_gate,
kpp_gate, mlb_gate, mshc_gate, owire_gate, pwm_gate, rngc_gate,
rtc_gate, rtic_gate, scc_gate, sdma_gate, spba_gate, spdif_gate,
ssi1_gate, ssi2_gate, uart1_gate, uart2_gate, uart3_gate, usbotg_gate,
wdog_gate, max_gate, admux_gate, csi_gate, csi_div, csi_sel, iim_gate,
gpu2d_gate, clk_max
};
static struct clk *clk[clk_max];
int __init mx35_clocks_init(void)
{
void __iomem *base = MX35_IO_ADDRESS(MX35_CCM_BASE_ADDR);
u32 pdr0, consumer_sel, hsp_sel;
struct arm_ahb_div *aad;
unsigned char *hsp_div;
u32 i;
pdr0 = __raw_readl(base + MXC_CCM_PDR0);
consumer_sel = (pdr0 >> 16) & 0xf;
aad = &clk_consumer[consumer_sel];
if (!aad->arm) {
pr_err("i.MX35 clk: illegal consumer mux selection 0x%x\n", consumer_sel);
/*
* We are basically stuck. Continue with a default entry and hope we
* get far enough to actually show the above message
*/
aad = &clk_consumer[0];
}
clk[ckih] = imx_clk_fixed("ckih", 24000000);
clk[mpll] = imx_clk_pllv1("mpll", "ckih", base + MX35_CCM_MPCTL);
clk[ppll] = imx_clk_pllv1("ppll", "ckih", base + MX35_CCM_PPCTL);
clk[mpll] = imx_clk_fixed_factor("mpll_075", "mpll", 3, 4);
if (aad->sel)
clk[arm] = imx_clk_fixed_factor("arm", "mpll_075", 1, aad->arm);
else
clk[arm] = imx_clk_fixed_factor("arm", "mpll", 1, aad->arm);
if (clk_get_rate(clk[arm]) > 400000000)
hsp_div = hsp_div_532;
else
hsp_div = hsp_div_400;
hsp_sel = (pdr0 >> 20) & 0x3;
if (!hsp_div[hsp_sel]) {
pr_err("i.MX35 clk: illegal hsp clk selection 0x%x\n", hsp_sel);
hsp_sel = 0;
}
clk[hsp] = imx_clk_fixed_factor("hsp", "arm", 1, hsp_div[hsp_sel]);
clk[ahb] = imx_clk_fixed_factor("ahb", "arm", 1, aad->ahb);
clk[ipg] = imx_clk_fixed_factor("ipg", "ahb", 1, 2);
clk[arm_per_div] = imx_clk_divider("arm_per_div", "arm", base + MX35_CCM_PDR4, 16, 6);
clk[ahb_per_div] = imx_clk_divider("ahb_per_div", "ahb", base + MXC_CCM_PDR0, 12, 3);
clk[ipg_per] = imx_clk_mux("ipg_per", base + MXC_CCM_PDR0, 26, 1, ipg_per_sel, ARRAY_SIZE(ipg_per_sel));
clk[uart_sel] = imx_clk_mux("uart_sel", base + MX35_CCM_PDR3, 14, 1, std_sel, ARRAY_SIZE(std_sel));
clk[uart_div] = imx_clk_divider("uart_div", "uart_sel", base + MX35_CCM_PDR4, 10, 6);
clk[esdhc_sel] = imx_clk_mux("esdhc_sel", base + MX35_CCM_PDR4, 9, 1, std_sel, ARRAY_SIZE(std_sel));
clk[esdhc1_div] = imx_clk_divider("esdhc1_div", "esdhc_sel", base + MX35_CCM_PDR3, 0, 6);
clk[esdhc2_div] = imx_clk_divider("esdhc2_div", "esdhc_sel", base + MX35_CCM_PDR3, 8, 6);
clk[esdhc3_div] = imx_clk_divider("esdhc3_div", "esdhc_sel", base + MX35_CCM_PDR3, 16, 6);
clk[spdif_sel] = imx_clk_mux("spdif_sel", base + MX35_CCM_PDR3, 22, 1, std_sel, ARRAY_SIZE(std_sel));
clk[spdif_div_pre] = imx_clk_divider("spdif_div_pre", "spdif_sel", base + MX35_CCM_PDR3, 29, 3); /* divide by 1 not allowed */
clk[spdif_div_post] = imx_clk_divider("spdif_div_post", "spdif_div_pre", base + MX35_CCM_PDR3, 23, 6);
clk[ssi_sel] = imx_clk_mux("ssi_sel", base + MX35_CCM_PDR2, 6, 1, std_sel, ARRAY_SIZE(std_sel));
clk[ssi1_div_pre] = imx_clk_divider("ssi1_div_pre", "ssi_sel", base + MX35_CCM_PDR2, 24, 3);
clk[ssi1_div_post] = imx_clk_divider("ssi1_div_post", "ssi1_div_pre", base + MX35_CCM_PDR2, 0, 6);
clk[ssi2_div_pre] = imx_clk_divider("ssi2_div_pre", "ssi_sel", base + MX35_CCM_PDR2, 27, 3);
clk[ssi2_div_post] = imx_clk_divider("ssi2_div_post", "ssi2_div_pre", base + MX35_CCM_PDR2, 8, 6);
clk[usb_sel] = imx_clk_mux("usb_sel", base + MX35_CCM_PDR4, 9
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