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path: root/drivers/staging/greybus/core.c

Age	Commit message (Expand)	Author
2017-01-07	staging: greybus: remove timesync protocol support	Greg Kroah-Hartman
2016-07-21	greybus: pm: add error handling to bundle activation	Bartosz Golaszewski
2016-07-20	greybus: timesync: probe shouldn't complete until FrameTime sync does	Bryan O'Donoghue
2016-07-16	greybus: hd: arche-platform: implement greybus shutdown	David Lin
2016-07-14	greybus: bundle: add runtime pm support	David Lin
2016-07-14	greybus: bundle: add activate and deactivate	David Lin
2016-06-09	greybus: hd: Export host device tracepoint from hd.c	Viresh Kumar
2016-06-09	greybus: core: Make greybus_match_one_id() return bool	Viresh Kumar
2016-06-09	greybus: bootrom: Compile as a separate module	Viresh Kumar
2016-06-09	greybus: fix forced disable of offloaded connections	Johan Hovold
2016-06-06	greybus: timesync: Bind TimeSync into Greybus	Bryan O'Donoghue
2016-05-27	greybus: core: avoid I/O to disconnected interfaces	Johan Hovold
2016-05-26	greybus: tracing: fix hd traces	Alex Elder
2016-05-20	greybus: legacy: remove legacy driver support	David Lin
2016-05-13	greybus: core: Rename greybus_module_match()	Viresh Kumar
2016-05-04	greybus: core: add MODULE uevent var for all control devices	Sandeep Patil
2016-04-25	greybus: core: add module abstraction	Johan Hovold
2016-04-21	greybus: core: make the control object be a device	Johan Hovold
2016-04-04	greybus: firmware: Rename to bootrom protocol	Viresh Kumar
2016-02-26	greybus: expose full 32 bits of vid/pid to userspace	Greg Kroah-Hartman
2016-02-01	greybus: firmware: convert to bundle driver	Johan Hovold
2016-01-21	greybus: core: defer connection creation to driver probe	Johan Hovold
2016-01-21	greybus: add bundle class to the bundle uevent	Greg Kroah-Hartman
2016-01-19	greybus: core: disable bundle connections on hot-unplug	Johan Hovold
2016-01-19	greybus: svc: drop legacy-protocol dependency	Johan Hovold
2016-01-19	greybus: control: drop legacy-protocol dependency	Johan Hovold
2016-01-19	greybus: core: add defensive connection disable post disconnect	Johan Hovold
2016-01-19	greybus: core: disable incoming operations pre disconnect	Johan Hovold
2016-01-19	greybus: legacy: add legacy-protocol bundle driver	Johan Hovold
2016-01-13	greybus: uevent: add GREYBUS_ID to uevent	Greg Kroah-Hartman
2016-01-09	greybus: core: fix greybus device matching	Johan Hovold
2016-01-09	greybus: core: fix greybus driver registration	Johan Hovold
2015-12-04	greybus: core: add bundle id to bundle uevents	Johan Hovold
2015-12-03	greybus: core: add interface id to interface and bundle uevents	Johan Hovold
2015-12-03	greybus: core: add bus id to uevents	Johan Hovold
2015-11-25	greybus: kill the endo	Johan Hovold
2015-11-25	greybus: svc: register svc device at hello	Johan Hovold
2015-11-25	greybus: hd: make host device a device	Johan Hovold
2015-11-25	greybus: interface: rename vendor and product attributes	Johan Hovold
2015-11-21	greybus: move id-matching back to core	Johan Hovold
2015-11-04	greybus: create host-device compilation unit	Johan Hovold
2015-11-04	greybus: connection: kill gb_hd_connections_exit	Johan Hovold
2015-10-21	greybus: endo: move greybus_endo_setup() to endo.c	Viresh Kumar
2015-10-19	greybus: core: remove uevent handling for gb_connection	Greg Kroah-Hartman
2015-09-23	greybus: tracepoints: add tracepoints for host_device tx/rx	Bryan O'Donoghue
2015-09-18	greybus: operation, core: hook tracepoints into message opertions	Bryan O'Donoghue
2015-09-03	greybus: connection: call gb_connection_exit() from gb_connection_destroy()	Viresh Kumar
2015-09-03	greybus: core: fix hd-creation error path	Johan Hovold
2015-09-02	greybus: add num_cports field to greybus hd	Fabien Parent
2015-08-11	greybus: Merge branch 'master' into branch 'svc'.	Greg Kroah-Hartman

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generated by cgit v1.2.3 (git 2.25.1) at 2024-08-27 21:05:49 +0000

// SPDX-License-Identifier: GPL-2.0-or-later
/*
**	DINO manager
**
**	(c) Copyright 1999 Red Hat Software
**	(c) Copyright 1999 SuSE GmbH
**	(c) Copyright 1999,2000 Hewlett-Packard Company
**	(c) Copyright 2000 Grant Grundler
**	(c) Copyright 2006-2019 Helge Deller
**
**
**	This module provides access to Dino PCI bus (config/IOport spaces)
**	and helps manage Dino IRQ lines.
**
**	Dino interrupt handling is a bit complicated.
**	Dino always writes to the broadcast EIR via irr0 for now.
**	(BIG WARNING: using broadcast EIR is a really bad thing for SMP!)
**	Only one processor interrupt is used for the 11 IRQ line 
**	inputs to dino.
**
**	The different between Built-in Dino and Card-Mode
**	dino is in chip initialization and pci device initialization.
**
**	Linux drivers can only use Card-Mode Dino if pci devices I/O port
**	BARs are configured and used by the driver. Programming MMIO address 
**	requires substantial knowledge of available Host I/O address ranges
**	is currently not supported.  Port/Config accessor functions are the
**	same. "BIOS" differences are handled within the existing routines.
*/

/*	Changes :
**	2001-06-14 : Clement Moyroud (moyroudc@esiee.fr)
**		- added support for the integrated RS232. 	
*/

/*
** TODO: create a virtual address for each Dino HPA.
**       GSC code might be able to do this since IODC data tells us
**       how many pages are used. PCI subsystem could (must?) do this
**       for PCI drivers devices which implement/use MMIO registers.
*/

#include <linux/delay.h>
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/pci.h>
#include <linux/init.h>
#include <linux/ioport.h>
#include <linux/slab.h>
#include <linux/interrupt.h>	/* for struct irqaction */
#include <linux/spinlock.h>	/* for spinlock_t and prototypes */

#include <asm/pdc.h>
#include <asm/page.h>
#include <asm/io.h>
#include <asm/hardware.h>

#include "gsc.h"
#include "iommu.h"

#undef DINO_DEBUG

#ifdef DINO_DEBUG
#define DBG(x...) printk(x)
#else
#define DBG(x...)
#endif

/*
** Config accessor functions only pass in the 8-bit bus number
** and not the 8-bit "PCI Segment" number. Each Dino will be
** assigned a PCI bus number based on "when" it's discovered.
**
** The "secondary" bus number is set to this before calling
** pci_scan_bus(). If any PPB's are present, the scan will
** discover them and update the "secondary" and "subordinate"
** fields in Dino's pci_bus structure.
**
** Changes in the configuration *will* result in a different
** bus number for each dino.
*/

#define is_card_dino(id)	((id)->hw_type == HPHW_A_DMA)
#define is_cujo(id)		((id)->hversion == 0x682)

#define DINO_IAR0		0x004
#define DINO_IODC_ADDR		0x008
#define DINO_IODC_DATA_0	0x008
#define DINO_IODC_DATA_1	0x008
#define DINO_IRR0		0x00C
#define DINO_IAR1		0x010
#define DINO_IRR1		0x014
#define DINO_IMR		0x018
#define DINO_IPR		0x01C
#define DINO_TOC_ADDR		0x020
#define DINO_ICR		0x024
#define DINO_ILR		0x028
#define DINO_IO_COMMAND		0x030
#define DINO_IO_STATUS		0x034
#define DINO_IO_CONTROL		0x038
#define DINO_IO_GSC_ERR_RESP	0x040
#define DINO_IO_ERR_INFO	0x044
#define DINO_IO_PCI_ERR_RESP	0x048
#define DINO_IO_FBB_EN		0x05c
#define DINO_IO_ADDR_EN		0x060
#define DINO_PCI_ADDR		0x064
#define DINO_CONFIG_DATA	0x068
#define DINO_IO_DATA		0x06c
#define DINO_MEM_DATA		0x070	/* Dino 3.x only */
#define DINO_GSC2X_CONFIG	0x7b4
#define DINO_GMASK		0x800
#define DINO_PAMR		0x804
#define DINO_PAPR		0x808
#define DINO_DAMODE		0x80c
#define DINO_PCICMD		0x810
#define DINO_PCISTS		0x814
#define DINO_MLTIM		0x81c
#define DINO_BRDG_FEAT		0x820
#define DINO_PCIROR		0x824
#define DINO_PCIWOR		0x828
#define DINO_TLTIM		0x830

#define DINO_IRQS 11		/* bits 0-10 are architected */
#define DINO_IRR_MASK	0x5ff	/* only 10 bits are implemented */
#define DINO_LOCAL_IRQS (DINO_IRQS+1)

#define DINO_MASK_IRQ(x)	(1<<(x))

#define PCIINTA   0x001
#define PCIINTB   0x002
#define PCIINTC   0x004
#define PCIINTD   0x008
#define PCIINTE   0x010
#define PCIINTF   0x020
#define GSCEXTINT 0x040
/* #define xxx       0x080 - bit 7 is "default" */
/* #define xxx    0x100 - bit 8 not used */
/* #define xxx    0x200 - bit 9 not used */
#define RS232INT  0x400

struct dino_device
{
	struct pci_hba_data	hba;	/* 'C' inheritance - must be first */
	spinlock_t		dinosaur_pen;
	unsigned long		txn_addr; /* EIR addr to generate interrupt */ 
	u32			txn_data; /* EIR data assign to each dino */ 
	u32 			imr;	  /* IRQ's which are enabled */ 
	int			global_irq[DINO_LOCAL_IRQS]; /* map IMR bit to global irq */
#ifdef DINO_DEBUG
	unsigned int		dino_irr0; /* save most recent IRQ line stat */
#endif
};

static inline struct dino_device *DINO_DEV(struct pci_hba_data *hba)
{
	return container_of(hba, struct dino_device, hba);
}

/* Check if PCI device is behind a Card-mode Dino. */
static int pci_dev_is_behind_card_dino(struct pci_dev *dev)
{
	struct dino_device *dino_dev;

	dino_dev = DINO_DEV(parisc_walk_tree(dev->bus->bridge));
	return is_card_dino(&dino_dev->hba.dev->id);
}

/*
 * Dino Configuration Space Accessor Functions
 */

#define DINO_CFG_TOK(bus,dfn,pos) ((u32) ((bus)<<16 | (dfn)<<8 | (pos)))

/*
 * keep the current highest bus count to assist in allocating busses.  This
 * tries to keep a global bus count total so that when we discover an 
 * entirely new bus, it can be given a unique bus number.
 */
static int dino_current_bus = 0;

static int dino_cfg_read(struct pci_bus *bus, unsigned int devfn, int where,
		int size, u32 *val)
{
	struct dino_device *d = DINO_DEV(parisc_walk_tree(bus->bridge));
	u32 local_bus = (bus->parent == NULL) ? 0 : bus->busn_res.start;
	u32 v = DINO_CFG_TOK(local_bus, devfn, where & ~3);
	void __iomem *base_addr = d->hba.base_addr;
	unsigned long flags;

	DBG("%s: %p, %d, %d, %d\n", __func__, base_addr, devfn, where,
									size);
	spin_lock_irqsave(&d->dinosaur_pen, flags);

	/* tell HW which CFG address */
	__raw_writel(v, base_addr + DINO_PCI_ADDR);

	/* generate cfg read cycle */
	if (size == 1) {
		*val = readb(base_addr + DINO_CONFIG_DATA + (where & 3));
	} else if (size == 2) {
		*val = readw(base_addr + DINO_CONFIG_DATA + (where & 2));
	} else if (size == 4) {
		*