Age | Commit message (Expand) | Author |
---|---|---|
2019-12-20 | phy: ti-pipe3: make clk operations symmetric in probe and remove | Chuhong Yuan |
2019-05-30 | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157 | Thomas Gleixner |
2019-04-17 | phy: ti-pipe3: Fix PCIe power up sequence | Roger Quadros |
2019-04-17 | phy: ti-pipe3: Fix SATA & USB PHY power up sequence | Roger Quadros |
2019-04-17 | phy: ti-pipe3: improve DPLL stability for SATA & USB | Roger Quadros |
2019-04-17 | phy: ti-pipe3: Introduce mode property in driver data | Roger Quadros |
2019-04-17 | phy: ti-pipe3: fix missing bit-wise or operator when assigning val | Colin Ian King |
2017-10-23 | phy: ti-pipe3: Update pcie phy settings | Kishon Vijay Abraham I |
2017-08-20 | phy: ti-pipe3: Use TRM recommended settings for SATA DPLL | Roger Quadros |
2017-06-01 | phy: Group vendor specific phy drivers | Vivek Gautam |