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path: root/drivers/gpu/drm/nouveau/core/engine
AgeCommit message (Expand)Author
2014-01-23drm/nve0/fifo: recover from mmu faults on bar1/bar3Ben Skeggs
2014-01-23drm/nve0/fifo: keep mmu fault interrupts enabled at all timesBen Skeggs
2014-01-23drm/nve0/fifo: update human-readable mmu fault descriptionsBen Skeggs
2014-01-23drm/nve0/fifo: document more intr status bitsBen Skeggs
2014-01-23drm/nve0/fifo: populate PBDMA status bitfield with more definitionsBen Skeggs
2014-01-23drm/nve0/fifo: s/subfifo/PBDMA/Ben Skeggs
2014-01-23drm/nve0/fifo: s/playlist/runlist/Ben Skeggs
2014-01-23drm/nvf0/gr: enable acceleration with our chsw ucodeBen Skeggs
2014-01-23drm/nv108/gr: enable acceleration with our chsw ucodeBen Skeggs
2014-01-23drm/nvc0-/gr: handle fwmthd interrupts in ucodeBen Skeggs
2014-01-23drm/nvc0-/gr: fiddle some magic around strand initBen Skeggs
2014-01-23drm/nv108/gr: initial support (need external fuc)Ben Skeggs
2014-01-23drm/nv108/ce: enable copy enginesBen Skeggs
2014-01-23drm/nv108/fifo: initial supportBen Skeggs
2014-01-23drm/nvf0/gr: remove a copy+pasto in ctx reglistBen Skeggs
2014-01-23drm/nvc0-/gr: bring in some macros to abstract falcon isa differencesBen Skeggs
2014-01-23drm/nouveau/falcon: use vmalloc to create firwmare copiesIlia Mirkin
2014-01-07drm/nvce/mc: fix msi rearm on GF114Sid Boyce
2014-01-07drm/nvc0/gr: fix mthd data submissionKelly Doran
2014-01-07drm/nouveau: populate master subdev pointer only when fully constructedBen Skeggs
2013-12-03drm/nouveau/sw: fix oops if gpu has its display block disabledBen Skeggs
2013-12-03drm/nouveau/clk: Add support for NVAA/NVACRoy Spliet
2013-12-03drm/nouveau/fifo: Hook up pause and resume for NV50 and NV84+Roy Spliet
2013-11-14drm/nvc0-/gr: shift wrapping bug in nvc0_grctx_generate_r406800Dan Carpenter
2013-11-14drm/nvc0-: remove nasty fifo swmthd hack for flip completion methodBen Skeggs
2013-11-14drm/nvc8/mc: msi rearm is via the nvc0 methodBen Skeggs
2013-11-08drm/nouveau/fb: implement various bits of work towards memory reclockingBen Skeggs
2013-11-08drm/nouveau/device: initial control object class, with pstate control methodsBen Skeggs
2013-11-08drm/nouveau/clk: implement power state and engine clock control in coreBen Skeggs
2013-11-08drm/nouveau/volt: implement voltage control in coreBen Skeggs
2013-11-08drm/nouveau/perfmon: initial infrastructure to expose performance countersBen Skeggs
2013-11-08drm/nouveau/bus: add interfaces/helpers for sequencerBen Skeggs
2013-11-08drm/nouveau/bus: make external class definitions pointersBen Skeggs
2013-11-08drm/nouveau/pwr: initial implementationBen Skeggs
2013-11-08drm/nouveau/fifo: make external class definitions into pointersBen Skeggs
2013-11-08drm/nouveau/device: recognise GK208Ben Skeggs
2013-11-08drm/nvc0-/gr: fix a number of missing explicit array terminators...Ben Skeggs
2013-11-08drm/nouveau/disp: semi-complete link training sequence even if display disapp...Ben Skeggs
2013-11-08drm/nvd0-/disp: reorder writes to lane current control regsBen Skeggs
2013-11-08drm/nv94-nvc0/disp: reorder writes to lane current control regsBen Skeggs
2013-11-08drm/nouveau/disp: log if DP link training failsBen Skeggs
2013-11-08drm/nvd9-/disp: disable display underflow reporting at initBen Skeggs
2013-11-08drm/nv50-nvaf/fb: split the class definitions up a bitBen Skeggs
2013-11-08drm/nouveau/fb: make external class definitions pointersBen Skeggs
2013-11-08drm/nv50-nv86,nv92/mc: rearm msi via pci config space, rather than mmio mirrorBen Skeggs
2013-11-08drm/nvc0,nvc4/mc: handle 0xc0's "special" msi rearmBen Skeggs
2013-11-08drm/nouveau/mc: store static data in nouveau_mc class definitionBen Skeggs
2013-11-08drm/nouveau/device: use an additional bit from NV_PMC_BOOT_0 to identify chipsetBen Skeggs
2013-11-08drm/nv31/mpeg: remove need for separate refcnt on engine useBen Skeggs
2013-11-08drm/nv31/mpeg: split the nv31 and nv40 dma setting implementationsIlia Mirkin
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