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Age	Commit message (Expand)	Author
2020-01-29	Merge branch 'work.openat2' of git://git.kernel.org/pub/scm/linux/kernel/git/...	Linus Torvalds
2020-01-29	Merge tag 'tty-5.6-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/greg...	Linus Torvalds
2020-01-28	Merge branch 'sched-core-for-linus' of git://git.kernel.org/pub/scm/linux/ker...	Linus Torvalds
2020-01-28	Merge branch 'efi-core-for-linus' of git://git.kernel.org/pub/scm/linux/kerne...	Linus Torvalds
2020-01-28	Merge branch 'core-headers-for-linus' of git://git.kernel.org/pub/scm/linux/k...	Linus Torvalds
2020-01-18	open: introduce openat2(2) syscall	Aleksa Sarai
2020-01-14	arch/ia64/setup: Drop dummy_con initialization	Arvind Sankar
2020-01-10	Merge branch 'x86/mm' into efi/core, to pick up dependencies	Ingo Molnar
2020-01-06	remove ioremap_nocache and devm_ioremap_nocache	Christoph Hellwig
2020-01-04	mm/memory_hotplug: shrink zones when offlining memory	David Hildenbrand
2019-12-25	Merge tag 'v5.5-rc3' into sched/core, to pick up fixes	Ingo Molnar
2019-12-10	ACPI/sleep: Convert acpi_wakeup_address into a function	Sean Christopherson
2019-12-10	mm/vmalloc: Add empty <asm/vmalloc.h> headers and use them from <linux/vmallo...	Ingo Molnar
2019-12-08	sched/rt, ia64: Use CONFIG_PREEMPTION	Thomas Gleixner
2019-12-06	Merge tag 'drm-next-2019-12-06' of git://anongit.freedesktop.org/drm/drm	Linus Torvalds
2019-12-04	Merge tag 'please-pull-misc-5.5' of git://git.kernel.org/pub/scm/linux/kernel...	Linus Torvalds
2019-12-04	ia64: agp: Replace empty define with do while	Corentin Labbe
2019-12-02	Merge tag 'kbuild-v5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/masa...	Linus Torvalds
2019-12-02	ia64: remove stale paravirt leftovers	Juergen Gross
2019-12-02	Merge tag 'iommu-updates-v5.5' of git://git.kernel.org/pub/scm/linux/kernel/g...	Linus Torvalds
2019-12-01	Merge tag 'y2038-cleanups-5.5' of git://git.kernel.org:/pub/scm/linux/kernel/...	Linus Torvalds
2019-11-28	Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torval...	Linus Torvalds
2019-11-28	Merge tag 'ioremap-5.5' of git://git.infradead.org/users/hch/ioremap	Linus Torvalds
2019-11-26	Merge branch 'sched-core-for-linus' of git://git.kernel.org/pub/scm/linux/ker...	Linus Torvalds
2019-11-26	Merge branch 'x86-asm-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...	Linus Torvalds
2019-11-25	Merge tag 'printk-for-5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/p...	Linus Torvalds
2019-11-20	dma-mapping: drop the dev argument to arch_sync_dma_for_*	Christoph Hellwig
2019-11-15	y2038: vdso: change timespec to __kernel_old_timespec	Arnd Bergmann
2019-11-11	arch: rely on asm-generic/io.h for default ioremap_* definitions	Christoph Hellwig
2019-11-11	ia64: rename ioremap_nocache to ioremap_uc	Christoph Hellwig
2019-11-11	iommu/vt-d: Check VT-d RMRR region in BIOS is reported as reserved	Yian Chen
2019-11-11	ia64: remove unneeded uapi asm-generic wrappers	Masahiro Yamada
2019-11-11	dma-direct: provide mmap and get_sgtable method overrides	Christoph Hellwig
2019-11-04	ia64: Move EXCEPTION_TABLE to RO_DATA segment	Kees Cook
2019-11-04	vmlinux.lds.h: Replace RODATA with RO_DATA	Kees Cook
2019-11-04	vmlinux.lds.h: Move NOTES into RO_DATA	Kees Cook
2019-11-04	vmlinux.lds.h: Move Program Header restoration into NOTES macro	Kees Cook
2019-11-04	vmlinux.lds.h: Provide EMIT_PT_NOTE to indicate export of .notes	Kees Cook
2019-11-04	ia64: Rename PT_LOAD identifier "code" to "text"	Kees Cook
2019-10-18	ia64: Use pr_warn instead of pr_warning	Kefeng Wang
2019-10-09	sched/cputime: Rename vtime_account_system() to vtime_account_kernel()	Frederic Weisbecker
2019-09-24	Merge branch 'akpm' (patches from Andrew)	Linus Torvalds
2019-09-24	mm: consolidate pgtable_cache_init() and pgd_cache_init()	Mike Rapoport
2019-09-24	ia64: switch to generic version of pte allocation	Mike Rapoport
2019-09-24	mm: remove quicklist page table caches	Nicholas Piggin
2019-09-24	mm: introduce page_size()	Matthew Wilcox (Oracle)
2019-09-24	ia64: Fix some warnings introduced in merge window	Tony Luck
2019-09-20	Merge tag 'kbuild-v5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/masa...	Linus Torvalds
2019-09-19	Merge tag 'dma-mapping-5.4' of git://git.infradead.org/users/hch/dma-mapping	Linus Torvalds
2019-09-17	Merge branch 'for-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/denni...	Linus Torvalds

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generated by cgit v1.2.3 (git 2.25.1) at 2024-08-25 23:52:15 +0000

// SPDX-License-Identifier: GPL-2.0+
/*
 * Rockchip AXI PCIe endpoint controller driver
 *
 * Copyright (c) 2018 Rockchip, Inc.
 *
 * Author: Shawn Lin <shawn.lin@rock-chips.com>
 *         Simon Xue <xxm@rock-chips.com>
 */

#include <linux/configfs.h>
#include <linux/delay.h>
#include <linux/kernel.h>
#include <linux/of.h>
#include <linux/pci-epc.h>
#include <linux/platform_device.h>
#include <linux/pci-epf.h>
#include <linux/sizes.h>

#include "pcie-rockchip.h"

/**
 * struct rockchip_pcie_ep - private data for PCIe endpoint controller driver
 * @rockchip: Rockchip PCIe controller
 * @max_regions: maximum number of regions supported by hardware
 * @ob_region_map: bitmask of mapped outbound regions
 * @ob_addr: base addresses in the AXI bus where the outbound regions start
 * @irq_phys_addr: base address on the AXI bus where the MSI/legacy IRQ
 *		   dedicated outbound regions is mapped.
 * @irq_cpu_addr: base address in the CPU space where a write access triggers
 *		  the sending of a memory write (MSI) / normal message (legacy
 *		  IRQ) TLP through the PCIe bus.
 * @irq_pci_addr: used to save the current mapping of the MSI/legacy IRQ
 *		  dedicated outbound region.
 * @irq_pci_fn: the latest PCI function that has updated the mapping of
 *		the MSI/legacy IRQ dedicated outbound region.
 * @irq_pending: bitmask of asserted legacy IRQs.
 */
struct rockchip_pcie_ep {
	struct rockchip_pcie	rockchip;
	struct pci_epc		*epc;
	u32			max_regions;
	unsigned long		ob_region_map;
	phys_addr_t		*ob_addr;
	phys_addr_t		irq_phys_addr;
	void __iomem		*irq_cpu_addr;
	u64			irq_pci_addr;
	u8			irq_pci_fn;
	u8			irq_pending;
};

static void rockchip_pcie_clear_ep_ob_atu(struct rockchip_pcie *rockchip,
					  u32 region)
{
	rockchip_pcie_write(rockchip, 0,
			    ROCKCHIP_PCIE_AT_OB_REGION_PCI_ADDR0(region));
	rockchip_pcie_write(rockchip, 0,
			    ROCKCHIP_PCIE_AT_OB_REGION_PCI_ADDR1(region));
	rockchip_pcie_write(rockchip, 0,
			    ROCKCHIP_PCIE_AT_OB_REGION_DESC0(region));
	rockchip_pcie_write(rockchip, 0,
			    ROCKCHIP_PCIE_AT_OB_REGION_DESC1(region));
	rockchip_pcie_write(rockchip, 0,
			    ROCKCHIP_PCIE_AT_OB_REGION_CPU_ADDR0(region));
	rockchip_pcie_write(rockchip, 0,
			    ROCKCHIP_PCIE_AT_OB_REGION_CPU_ADDR1(region));
}

static void rockchip_pcie_prog_ep_ob_atu(struct rockchip_pcie *rockchip, u8 fn,
					 u32 r, u32 type, u64 cpu_addr,
					 u64 pci_addr, size_t size)
{
	u64 sz = 1ULL << fls64(size - 1);
	int num_pass_bits = ilog2(sz);
	u32 addr0, addr1, desc0, desc1;
	bool is_nor_msg = (type == AXI_WRAPPER_NOR_MSG);

	/* The minimal region size is 1MB */
	if (num_pass_bits < 8)
		num_pass_bits = 8;

	cpu_addr -= rockchip->mem_res->start;
	addr0 = ((is_nor_msg ? 0x10 : (num_pass_bits - 1)) &
		PCIE_CORE_OB_REGION_ADDR0_NUM_BITS) |
		(lower_32_bits(cpu_addr) & PCIE_CORE_OB_REGION_ADDR0_LO_ADDR);
	addr1 = upper_32_bits(is_nor_msg ? cpu_addr : pci_addr);
	desc0 = ROCKCHIP_PCIE_AT_OB_REGION_DESC0_DEVFN(fn) | type;
	desc1 = 0;

	if (is_nor_msg) {
		rockchip_pcie_write(rockchip, 0,
				    ROCKCHIP_PCIE_AT_OB_REGION_PCI_ADDR0(r));
		rockchip_pcie_write(rockchip, 0,
				    ROCKCHIP_PCIE_AT_OB_REGION_PCI_ADDR1(r));
		rockchip_pcie_write(rockchip, desc0,
				    ROCKCHIP_PCIE_AT_OB_REGION_DESC0(r));
		rockchip_pcie_write(rockchip, desc1,
				    ROCKCHIP_PCIE_AT_OB_REGION_DESC1(r));
	} else {
		/* PCI bus address region */
		rockchip_pcie_write(rockchip, addr0,
				    ROCKCHIP_PCIE_AT_OB_REGION_PCI_ADDR0(r));
		rockchip_pcie_write(rockchip, addr1,
				    ROCKCHIP_PCIE_AT_OB_REGION_PCI_ADDR1(r));
		rockchip_pcie_write(rockchip, desc0,
				    ROCKCHIP_PCIE_AT_OB_REGION_DESC0(r));
		rockchip_pcie_write(rockchip, desc1,
				    ROCKCHIP_PCIE_AT_OB_REGION_DESC1(r));

		addr0 =
		    ((num_pass_bits - 1) & PCIE_CORE_OB_REGION_ADDR0_NUM_BITS) |
		    (lower_32_bits(cpu_addr) &
		     PCIE_CORE_OB_REGION_ADDR0_LO_ADDR);
		addr1 = upper_32_bits(cpu_addr);
	}

	/* CPU bus address region */
	rockchip_pcie_write(rockchip, addr0,
			    ROCKCHIP_PCIE_AT_OB_REGION_CPU_ADDR0(r));
	rockchip_pcie_write(rockchip, addr1,
			    ROCKCHIP_PCIE_AT_OB_REGION_CPU_ADDR1(r));
}

static int rockchip_pcie_ep_write_header(struct pci_epc *epc, u8 fn,
					 struct pci_epf_header *hdr)
{
	struct rockchip_pcie_ep *ep = epc_get_drvdata(epc);
	struct rockchip_pcie *rockchip = &ep->rockchip;

	/* All functions share the same vendor ID with function 0 */
	if (fn == 0) {
		u32 vid_regs = (hdr->vendorid & GENMASK(15, 0)) |
			       (hdr->subsys_vendor_id & GENMASK(31, 16)) << 16;

		rockchip_pcie_write(rockchip, vid_regs,
				    PCIE_CORE_CONFIG_VENDOR);
	}

	rockchip_pcie_write(rockchip, hdr->deviceid << 16,
			    ROCKCHIP_PCIE_EP_FUNC_BASE(fn) + PCI_VENDOR_ID);

	rockchip_pcie_write(rockchip,
			    hdr->revid |
			    hdr->progif_code << 8 |
			    hdr->subclass_code << 16 |
			    hdr->baseclass_code << 24,
			    ROCKCHIP_PCIE_EP_FUNC_BASE(fn) + PCI_REVISION_ID);
	rockchip_pcie_write(rockchip, hdr->cache_line_size,
			    ROCKCHIP_PCIE_EP_FUNC_BASE(fn) +
			    PCI_CACHE_LINE_SIZE);
	rockchip_pcie_write(rockchip, hdr->subsys_id << 16,
			    ROCKCHIP_PCIE_EP_FUNC_BASE(fn) +
			    PCI_SUBSYSTEM_VENDOR_ID);
	rockchip_pcie_write(rockchip, hdr->interrupt_pin << 8,
			    ROCKCHIP_PCIE_EP_FUNC_BASE(fn) +
			    PCI_INTERRUPT_LINE);

	return 0;
}

static int rockchip_pcie_ep_set_bar(struct pci_epc *epc, u8 fn,
				    struct pci_epf_bar *epf_bar)
{
	struct rockchip_pcie_ep *ep = epc_get_drvdata(epc);
	struct rockchip_pcie *rockchip = &ep->rockchip;
	dma_addr_t bar_phys = epf_bar->phys_addr;
	enum pci_barno bar = epf_bar->barno;
	int flags = epf_bar->flags;
	u32 addr0, addr1, reg, cfg, b, aperture, ctrl;
	u64 sz;

	/* BAR size is 2^(aperture + 7) */
	sz = max_t(size_t, epf_bar->size, MIN_EP_APERTURE);

	/*
	 * roundup_pow_of_two() returns an unsigned long, which is not suited
	 * for 64bit values.
	 */
	sz = 1ULL << fls64(sz - 1);
	aperture = ilog2(sz) - 7; /* 128B -> 0, 256B -> 1, 512B -> 2, ... */

	if ((flags & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_IO) {
		ctrl = ROCKCHIP_PCIE_CORE_BAR_CFG_CTRL_IO_32BITS;
	} else {
		bool is_prefetch = !!(flags & PCI_BASE_ADDRESS_MEM_PREFETCH);
		bool is_64bits = sz > SZ_2G;

		if (is_64bits && (bar & 1))
			return -EINVAL;

		if (is_64bits && is_prefetch)
			ctrl =
			    ROCKCHIP_PCIE_CORE_BAR_CFG_CTRL_PREFETCH_MEM_64BITS;
		else if (is_prefetch)
			ctrl =
			    ROCKCHIP_PCIE_CORE_BAR_CFG_CTRL_PREFETCH_MEM_32BITS;
		else if (is_64bits)
			ctrl = ROCKCHIP_PCIE_CORE_BAR_CFG_CTRL_MEM_64BITS;
		else
			ctrl = ROCKCHIP_PCIE_CORE_BAR_CFG_CTRL_MEM_32BITS