linux - Contrib clone of linux

Age	Commit message (Expand)	Author
2008-04-29	doc: replace yet another dev with pdev for consistency in DMA-mapping.txt	Matti Linnanvuori
2008-04-28	doc: fix an incorrect suggestion to pass NULL for PCI like buses	Matti Linnanvuori
2008-04-28	Consistently use pdev as the variable of type struct pci_dev *.	Matti Linnanvuori
2007-10-17	Update DMA-mapping documentation	Matthew Wilcox
2007-10-16	Merge branch 'sglist-arch' into for-linus	Jens Axboe
2007-10-16	use sg helper function in DMA mapping documentation	saeed bishara
2007-10-16	Update Jens Axboe's email in Documentation/*	Rob Landley
2007-07-11	PCI: remove pci_dac_dma_... APIs	Jan Beulich
2006-10-03	Documentation: remove duplicated words	Paolo Ornati
2006-10-03	Fix "can not" in Documentation and Kconfig	Matt LaPlante
2006-07-14	[PATCH] Remove pci_dac_set_dma_mask() from Documentation/DMA-mapping.txt	Rolf Eike Beer
2006-04-14	[PATCH] dma doc updates	David Brownell
2006-04-11	[PATCH] Last DMA_xBIT_MASK cleanups	Tobias Klauser
2006-03-28	[PATCH] Replace 0xff.. with correct DMA_xBIT_MASK	Matthias Gehre
2005-04-18	[PATCH] remove old scsi data direction macros
2005-04-16	Linux-2.6.12-rc2	Linus Torvalds

/* * acard-ahci.c - ACard AHCI SATA support * * Maintained by: Tejun Heo <tj@kernel.org> * Please ALWAYS copy linux-ide@vger.kernel.org * on emails. * * Copyright 2010 Red Hat, Inc. * * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2, or (at your option) * any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; see the file COPYING. If not, write to * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. * * * libata documentation is available via 'make {ps|pdf}docs', * as Documentation/DocBook/libata.* * * AHCI hardware documentation: * http://www.intel.com/technology/serialata/pdf/rev1_0.pdf * http://www.intel.com/technology/serialata/pdf/rev1_1.pdf * */ #include <linux/kernel.h> #include <linux/module.h> #include <linux/pci.h> #include <linux/blkdev.h> #include <linux/delay.h> #include <linux/interrupt.h> #include <linux/dma-mapping.h> #include <linux/device.h> #include <linux/dmi.h> #include <linux/gfp.h> #include <scsi/scsi_host.h> #include <scsi/scsi_cmnd.h> #include <linux/libata.h> #include "ahci.h" #define DRV_NAME "acard-ahci" #define DRV_VERSION "1.0" /* Received FIS structure limited to 80h. */ #define ACARD_AHCI_RX_FIS_SZ 128 enum { AHCI_PCI_BAR = 5, }; enum board_ids { board_acard_ahci, }; struct acard_sg { __le32 addr; __le32 addr_hi; __le32 reserved; __le32 size; /* bit 31 (EOT) max==0x10000 (64k) */ }; static void acard_ahci_qc_prep(struct ata_queued_cmd *qc); static bool acard_ahci_qc_fill_rtf(struct ata_queued_cmd *qc); static int acard_ahci_port_start(struct ata_port *ap); static int acard_ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent); #ifdef CONFIG_PM_SLEEP static int acard_ahci_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg); static int acard_ahci_pci_device_resume(struct pci_dev *pdev); #endif static struct scsi_host_template acard_ahci_sht = { AHCI_SHT("acard-ahci"), }; static struct ata_port_operations acard_ops = { .inherits = &ahci_ops, .qc_prep = acard_ahci_qc_prep, .qc_fill_rtf = acard_ahci_qc_fill_rtf, .port_start = acard_ahci_port_start, }; #define AHCI_HFLAGS(flags) .private_data = (void *)(flags) static const struct ata_port_info acard_ahci_port_info[] = { [board_acard_ahci] = { AHCI_HFLAGS (AHCI_HFLAG_NO_NCQ), .flags = AHCI_FLAG_COMMON, .pio_mask = ATA_PIO4, .udma_mask = ATA_UDMA6, .port_ops = &acard_ops, }, }; static const struct pci_device_id acard_ahci_pci_tbl[] = { /* ACard */ { PCI_VDEVICE(ARTOP, 0x000d), board_acard_ahci }, /* ATP8620 */ { } /* terminate list */ }; static struct pci_driver acard_ahci_pci_driver = { .name = DRV_NAME, .id_table = acard_ahci_pci_tbl, .probe = acard_ahci_init_one, .remove = ata_pci_remove_one, #ifdef CONFIG_PM_SLEEP .suspend = acard_ahci_pci_device_suspend, .resume = acard_ahci_pci_device_resume, #endif }; #ifdef CONFIG_PM_SLEEP static int acard_ahci_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg) { struct ata_host *host = pci_get_drvdata(pdev); struct ahci_host_priv *hpriv = host->private_data; void __iomem *mmio = hpriv->mmio; u32 ctl; if (mesg.event & PM_EVENT_SUSPEND && hpriv->flags & AHCI_HFLAG_NO_SUSPEND) { dev_err(&pdev->dev, "BIOS update required for suspend/resume\n"); return -EIO; } if (mesg.event & PM_EVENT_SLEEP) { /* AHCI spec rev1.1 section 8.3.3: * Software must disable interrupts prior to requesting a * transition of the HBA to D3 state. */ ctl = readl(mmio + HOST_CTL); ctl &= ~HOST_IRQ_EN; writel(ctl, mmio + HOST_CTL); readl(mmio + HOST_CTL); /* flush */ } return ata_pci_device_suspend(pdev, mesg); } static int acard_ahci_pci_device_resume(struct pci_dev *pdev) { struct ata_host *host = pci_get_drvdata(pdev); int rc; rc = ata_pci_device_do_resume(pdev); if (rc) return rc; if (pdev->dev.power.power_state.event == PM_EVENT_SUSPEND) { rc = ahci_reset_controller(host); if (rc) return rc; ahci_init_controller(host); } ata_host_resume(host); return 0; } #endif static int acard_ahci_configure_dma_masks(struct pci_dev *pdev, int using_dac) { int rc; if (using_dac && !pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) { rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)); if (rc) { rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); if (rc) { dev_err(&pdev->dev, "64-bit DMA enable failed\n"); return rc; } } } else { rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); if (rc) { dev_err(&pdev->dev, "32-bit DMA enable failed\n"); return rc; } rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); if (rc) { dev_err(&pdev->dev, "32-bit consistent DMA enable failed\n"); return rc; } } return 0; } static void acard_ahci_pci_print_info(struct ata_host *host) { struct pci_dev *pdev = to_pci_dev(host->dev); u16 cc; const char *scc_s; pci_read_config_word(pdev, 0x0a, &cc); if (cc == PCI_CLASS_STORAGE_IDE) scc_s = "IDE"; else if (cc == PCI_CLASS_STORAGE_SATA) scc_s = "SATA"; else if (cc == PCI_CLASS_STORAGE_RAID) scc_s = "RAID"; else scc_s = "unknown"; ahci_print_info(host, scc_s); } static unsigned int acard_ahci_fill_sg(struct ata_queued_cmd *qc, void *cmd_tbl) { struct scatterlist *sg; struct acard_sg *acard_sg = cmd_tbl + AHCI_CMD_TBL_HDR_SZ; unsigned int si, last_si = 0; VPRINTK("ENTER\n"); /* * Next, the S/G list. */ for_each_sg(qc->sg, sg, qc->n_elem, si) { dma_addr_t addr = sg_dma_address(sg); u32 sg_len = sg_dma_len(sg); /* * ACard note: * We must set an end-of-table (EOT) bit, * and the segment cannot exceed 64k (0x10000) */ acard_sg[si].addr = cpu_to_le32(addr & 0xffffffff); acard_sg[si].addr_hi = cpu_to_le32((addr >> 16) >> 16); acard_sg[si].size = cpu_to_le32(sg_len); last_si = si; } acard_sg[last_si].size |= cpu_to_le32(1 << 31); /* set EOT */ return si; } static void acard_ahci_qc_prep(struct ata_queued_cmd *qc) { struct ata_port *ap = qc->ap; struct ahci_port_priv *pp = ap->private_data; int is_atapi = ata_is_atapi(qc->tf.protocol); void *cmd_tbl; u32 opts; const u32 cmd_fis_len = 5; /* five dwords */ unsigned int n_elem; /* * Fill in command table information. First, the header, * a SATA Register - Host to Device command FIS. */ cmd_tbl = pp->cmd_tbl + qc->tag * AHCI_CMD_TBL_SZ;