diff options
Diffstat (limited to 'drivers/pinctrl/sh-pfc/pfc-r8a7779.c')
| -rw-r--r-- | drivers/pinctrl/sh-pfc/pfc-r8a7779.c | 1648 |
1 files changed, 1433 insertions, 215 deletions
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7779.c b/drivers/pinctrl/sh-pfc/pfc-r8a7779.c index 13feaa0c0eb7..1d7b0dfbbb21 100644 --- a/drivers/pinctrl/sh-pfc/pfc-r8a7779.c +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7779.c @@ -23,11 +23,6 @@ #include "sh_pfc.h" -#define CPU_32_PORT(fn, pfx, sfx) \ - PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \ - PORT_10(fn, pfx##2, sfx), PORT_1(fn, pfx##30, sfx), \ - PORT_1(fn, pfx##31, sfx) - #define CPU_32_PORT6(fn, pfx, sfx) \ PORT_1(fn, pfx##0, sfx), PORT_1(fn, pfx##1, sfx), \ PORT_1(fn, pfx##2, sfx), PORT_1(fn, pfx##3, sfx), \ @@ -36,12 +31,12 @@ PORT_1(fn, pfx##8, sfx) #define CPU_ALL_PORT(fn, pfx, sfx) \ - CPU_32_PORT(fn, pfx##_0_, sfx), \ - CPU_32_PORT(fn, pfx##_1_, sfx), \ - CPU_32_PORT(fn, pfx##_2_, sfx), \ - CPU_32_PORT(fn, pfx##_3_, sfx), \ - CPU_32_PORT(fn, pfx##_4_, sfx), \ - CPU_32_PORT(fn, pfx##_5_, sfx), \ + PORT_32(fn, pfx##_0_, sfx), \ + PORT_32(fn, pfx##_1_, sfx), \ + PORT_32(fn, pfx##_2_, sfx), \ + PORT_32(fn, pfx##_3_, sfx), \ + PORT_32(fn, pfx##_4_, sfx), \ + PORT_32(fn, pfx##_5_, sfx), \ CPU_32_PORT6(fn, pfx##_6_, sfx) #define _GP_GPIO(pfx, sfx) PINMUX_GPIO(GPIO_GP##pfx, GP##pfx##_DATA) @@ -55,21 +50,8 @@ #define PINMUX_GPIO_GP_ALL() CPU_ALL_PORT(_GP_GPIO, , unused) #define PINMUX_DATA_GP_ALL() CPU_ALL_PORT(_GP_DATA, , unused) - -#define PORT_10_REV(fn, pfx, sfx) \ - PORT_1(fn, pfx##9, sfx), PORT_1(fn, pfx##8, sfx), \ - PORT_1(fn, pfx##7, sfx), PORT_1(fn, pfx##6, sfx), \ - PORT_1(fn, pfx##5, sfx), PORT_1(fn, pfx##4, sfx), \ - PORT_1(fn, pfx##3, sfx), PORT_1(fn, pfx##2, sfx), \ - PORT_1(fn, pfx##1, sfx), PORT_1(fn, pfx##0, sfx) - -#define CPU_32_PORT_REV(fn, pfx, sfx) \ - PORT_1(fn, pfx##31, sfx), PORT_1(fn, pfx##30, sfx), \ - PORT_10_REV(fn, pfx##2, sfx), PORT_10_REV(fn, pfx##1, sfx), \ - PORT_10_REV(fn, pfx, sfx) - -#define GP_INOUTSEL(bank) CPU_32_PORT_REV(_GP_INOUTSEL, _##bank##_, unused) -#define GP_INDT(bank) CPU_32_PORT_REV(_GP_INDT, _##bank##_, unused) +#define GP_INOUTSEL(bank) PORT_32_REV(_GP_INOUTSEL, _##bank##_, unused) +#define GP_INDT(bank) PORT_32_REV(_GP_INDT, _##bank##_, unused) #define PINMUX_IPSR_DATA(ipsr, fn) PINMUX_DATA(fn##_MARK, FN_##ipsr, FN_##fn) #define PINMUX_IPSR_MODSEL_DATA(ipsr, fn, ms) PINMUX_DATA(fn##_MARK, FN_##ms, \ @@ -371,7 +353,7 @@ enum { FN_VI1_DATA6_VI1_B6, FN_SD2_CD, FN_MT0_VCXO, FN_SPA_TMS, FN_HSPI_TX1_D, FN_VI1_DATA7_VI1_B7, FN_SD2_WP, FN_MT0_PWM, FN_SPA_TDI, FN_HSPI_RX1_D, FN_VI1_G0, FN_VI3_DATA0, - FN_DU1_DOTCLKOUT1, FN_TS_SCK1, FN_DREQ2_B, FN_TX2, + FN_TS_SCK1, FN_DREQ2_B, FN_TX2, FN_SPA_TDO, FN_HCTS0_B, FN_VI1_G1, FN_VI3_DATA1, FN_SSI_SCK1, FN_TS_SDEN1, FN_DACK2_B, FN_RX2, FN_HRTS0_B, @@ -447,7 +429,8 @@ enum { A0_MARK, SD1_DAT3_MARK, MMC0_D3_MARK, FD3_MARK, BS_MARK, SD1_DAT2_MARK, MMC0_D2_MARK, FD2_MARK, ATADIR0_MARK, SDSELF_MARK, HCTS1_MARK, TX4_C_MARK, - USB_PENC2_MARK, SCK0_MARK, PWM1_MARK, PWMFSW0_MARK, + USB_PENC0_MARK, USB_PENC1_MARK, USB_PENC2_MARK, + SCK0_MARK, PWM1_MARK, PWMFSW0_MARK, SCIF_CLK_MARK, TCLK0_C_MARK, EX_CS0_MARK, RX3_C_IRDA_RX_C_MARK, MMC0_D6_MARK, @@ -632,7 +615,7 @@ enum { HSPI_CS1_D_MARK, ADICHS2_B_MARK, VI1_DATA6_VI1_B6_MARK, SD2_CD_MARK, MT0_VCXO_MARK, SPA_TMS_MARK, HSPI_TX1_D_MARK, VI1_DATA7_VI1_B7_MARK, SD2_WP_MARK, MT0_PWM_MARK, SPA_TDI_MARK, HSPI_RX1_D_MARK, - VI1_G0_MARK, VI3_DATA0_MARK, DU1_DOTCLKOUT1_MARK, TS_SCK1_MARK, + VI1_G0_MARK, VI3_DATA0_MARK, TS_SCK1_MARK, DREQ2_B_MARK, TX2_MARK, SPA_TDO_MARK, HCTS0_B_MARK, VI1_G1_MARK, VI3_DATA1_MARK, SSI_SCK1_MARK, TS_SDEN1_MARK, DACK2_B_MARK, RX2_MARK, HRTS0_B_MARK, @@ -649,7 +632,7 @@ enum { PINMUX_MARK_END, }; -static pinmux_enum_t pinmux_data[] = { +static const pinmux_enum_t pinmux_data[] = { PINMUX_DATA_GP_ALL(), /* PINMUX_DATA(GP_M_N_DATA, GP_M_N_FN...), */ PINMUX_DATA(AVS1_MARK, FN_AVS1), @@ -658,6 +641,9 @@ static pinmux_enum_t pinmux_data[] = { PINMUX_DATA(A18_MARK, FN_A18), PINMUX_DATA(A19_MARK, FN_A19), + PINMUX_DATA(USB_PENC0_MARK, FN_USB_PENC0), + PINMUX_DATA(USB_PENC1_MARK, FN_USB_PENC1), + PINMUX_IPSR_DATA(IP0_2_0, USB_PENC2), PINMUX_IPSR_MODSEL_DATA(IP0_2_0, SCK0, SEL_SCIF0_0), PINMUX_IPSR_DATA(IP0_2_0, PWM1), @@ -1399,7 +1385,6 @@ static pinmux_enum_t pinmux_data[] = { PINMUX_IPSR_MODSEL_DATA(IP11_23_21, HSPI_RX1_D, SEL_HSPI1_3), PINMUX_IPSR_DATA(IP11_26_24, VI1_G0), PINMUX_IPSR_DATA(IP11_26_24, VI3_DATA0), - PINMUX_IPSR_DATA(IP11_26_24, DU1_DOTCLKOUT1), PINMUX_IPSR_DATA(IP11_26_24, TS_SCK1), PINMUX_IPSR_MODSEL_DATA(IP11_26_24, DREQ2_B, SEL_EXBUS2_1), PINMUX_IPSR_DATA(IP11_26_24, TX2), @@ -1450,140 +1435,1372 @@ static pinmux_enum_t pinmux_data[] = { PINMUX_IPSR_MODSEL_DATA(IP12_17_15, SCK4_B, SEL_SCIF4_1), }; -static struct pinmux_gpio pinmux_gpios[] = { +static struct sh_pfc_pin pinmux_pins[] = { PINMUX_GPIO_GP_ALL(), +}; + +/* - DU0 -------------------------------------------------------------------- */ +static const unsigned int du0_rgb666_pins[] = { + /* R[7:2], G[7:2], B[7:2] */ + 188, 187, 186, 185, 184, 183, + 194, 193, 192, 191, 190, 189, + 200, 199, 198, 197, 196, 195, +}; +static const unsigned int du0_rgb666_mux[] = { + DU0_DR7_MARK, DU0_DR6_MARK, DU0_DR5_MARK, DU0_DR4_MARK, + DU0_DR3_MARK, DU0_DR2_MARK, + DU0_DG7_MARK, DU0_DG6_MARK, DU0_DG5_MARK, DU0_DG4_MARK, + DU0_DG3_MARK, DU0_DG2_MARK, + DU0_DB7_MARK, DU0_DB6_MARK, DU0_DB5_MARK, DU0_DB4_MARK, + DU0_DB3_MARK, DU0_DB2_MARK, +}; +static const unsigned int du0_rgb888_pins[] = { + /* R[7:0], G[7:0], B[7:0] */ + 188, 187, 186, 185, 184, 183, 24, 23, + 194, 193, 192, 191, 190, 189, 26, 25, + 200, 199, 198, 197, 196, 195, 28, 27, +}; +static const unsigned int du0_rgb888_mux[] = { + DU0_DR7_MARK, DU0_DR6_MARK, DU0_DR5_MARK, DU0_DR4_MARK, + DU0_DR3_MARK, DU0_DR2_MARK, DU0_DR1_MARK, DU0_DR0_MARK, + DU0_DG7_MARK, DU0_DG6_MARK, DU0_DG5_MARK, DU0_DG4_MARK, + DU0_DG3_MARK, DU0_DG2_MARK, DU0_DG1_MARK, DU0_DG0_MARK, + DU0_DB7_MARK, DU0_DB6_MARK, DU0_DB5_MARK, DU0_DB4_MARK, + DU0_DB3_MARK, DU0_DB2_MARK, DU0_DB1_MARK, DU0_DB0_MARK, +}; +static const unsigned int du0_clk_0_pins[] = { + /* CLKIN, CLKOUT */ + 29, 180, +}; +static const unsigned int du0_clk_0_mux[] = { + DU0_DOTCLKIN_MARK, DU0_DOTCLKOUT0_MARK, +}; +static const unsigned int du0_clk_1_pins[] = { + /* CLKIN, CLKOUT */ + 29, 30, +}; +static const unsigned int du0_clk_1_mux[] = { + DU0_DOTCLKIN_MARK, DU0_DOTCLKOUT1_MARK, +}; +static const unsigned int du0_sync_0_pins[] = { + /* VSYNC, HSYNC, DISP */ + 182, 181, 31, +}; +static const unsigned int du0_sync_0_mux[] = { + DU0_EXHSYNC_DU0_HSYNC_MARK, DU0_EXVSYNC_DU0_VSYNC_MARK, + DU0_EXODDF_DU0_ODDF_DISP_CDE_MARK +}; +static const unsigned int du0_sync_1_pins[] = { + /* VSYNC, HSYNC, DISP */ + 182, 181, 32, +}; +static const unsigned int du0_sync_1_mux[] = { + DU0_EXHSYNC_DU0_HSYNC_MARK, DU0_EXVSYNC_DU0_VSYNC_MARK, + DU0_DISP_MARK +}; +static const unsigned int du0_oddf_pins[] = { + /* ODDF */ + 31, +}; +static const unsigned int du0_oddf_mux[] = { + DU0_EXODDF_DU0_ODDF_DISP_CDE_MARK +}; +static const unsigned int du0_cde_pins[] = { + /* CDE */ + 33, +}; +static const unsigned int du0_cde_mux[] = { + DU0_CDE_MARK +}; +/* - DU1 -------------------------------------------------------------------- */ +static const unsigned int du1_rgb666_pins[] = { + /* R[7:2], G[7:2], B[7:2] */ + 41, 40, 39, 38, 37, 36, + 49, 48, 47, 46, 45, 44, + 57, 56, 55, 54, 53, 52, +}; +static const unsigned int du1_rgb666_mux[] = { + DU1_DR7_MARK, DU1_DR6_MARK, DU1_DR5_MARK, DU1_DR4_MARK, + DU1_DR3_MARK, DU1_DR2_MARK, + DU1_DG7_MARK, DU1_DG6_MARK, DU1_DG5_MARK, DU1_DG4_MARK, + DU1_DG3_MARK, DU1_DG2_MARK, + DU1_DB7_MARK, DU1_DB6_MARK, DU1_DB5_MARK, DU1_DB4_MARK, + DU1_DB3_MARK, DU1_DB2_MARK, +}; +static const unsigned int du1_rgb888_pins[] = { + /* R[7:0], G[7:0], B[7:0] */ + 41, 40, 39, 38, 37, 36, 35, 34, + 49, 48, 47, 46, 45, 44, 43, 32, + 57, 56, 55, 54, 53, 52, 51, 50, +}; +static const unsigned int du1_rgb888_mux[] = { + DU1_DR7_MARK, DU1_DR6_MARK, DU1_DR5_MARK, DU1_DR4_MARK, + DU1_DR3_MARK, DU1_DR2_MARK, DU1_DR1_MARK, DU1_DR0_MARK, + DU1_DG7_MARK, DU1_DG6_MARK, DU1_DG5_MARK, DU1_DG4_MARK, + DU1_DG3_MARK, DU1_DG2_MARK, DU1_DG1_MARK, DU1_DG0_MARK, + DU1_DB7_MARK, DU1_DB6_MARK, DU1_DB5_MARK, DU1_DB4_MARK, + DU1_DB3_MARK, DU1_DB2_MARK, DU1_DB1_MARK, DU1_DB0_MARK, +}; +static const unsigned int du1_clk_pins[] = { + /* CLKIN, CLKOUT */ + 58, 59, +}; +static const unsigned int du1_clk_mux[] = { + DU1_DOTCLKIN_MARK, DU1_DOTCLKOUT_MARK, +}; +static const unsigned int du1_sync_0_pins[] = { + /* VSYNC, HSYNC, DISP */ + 61, 60, 62, +}; +static const unsigned int du1_sync_0_mux[] = { + DU1_EXVSYNC_DU1_VSYNC_MARK, DU1_EXHSYNC_DU1_HSYNC_MARK, + DU1_EXODDF_DU1_ODDF_DISP_CDE_MARK +}; +static const unsigned int du1_sync_1_pins[] = { + /* VSYNC, HSYNC, DISP */ + 61, 60, 63, +}; +static const unsigned int du1_sync_1_mux[] = { + DU1_EXVSYNC_DU1_VSYNC_MARK, DU1_EXHSYNC_DU1_HSYNC_MARK, + DU1_DISP_MARK +}; +static const unsigned int du1_oddf_pins[] = { + /* ODDF */ + 62, +}; +static const unsigned int du1_oddf_mux[] = { + DU1_EXODDF_DU1_ODDF_DISP_CDE_MARK +}; +static const unsigned int du1_cde_pins[] = { + /* CDE */ + 64, +}; +static const unsigned int du1_cde_mux[] = { + DU1_CDE_MARK +}; +/* - HSPI0 ------------------------------------------------------------------ */ +static const unsigned int hspi0_pins[] = { + /* CLK, CS, RX, TX */ + 150, 151, 153, 152, +}; +static const unsigned int hspi0_mux[] = { + HSPI_CLK0_MARK, HSPI_CS0_MARK, HSPI_RX0_MARK, HSPI_TX0_MARK, +}; +/* - HSPI1 ------------------------------------------------------------------ */ +static const unsigned int hspi1_pins[] = { + /* CLK, CS, RX, TX */ + 63, 58, 64, 62, +}; +static const unsigned int hspi1_mux[] = { + HSPI_CLK1_MARK, HSPI_CS1_MARK, HSPI_RX1_MARK, HSPI_TX1_MARK, +}; +static const unsigned int hspi1_b_pins[] = { + /* CLK, CS, RX, TX */ + 90, 91, 93, 92, +}; +static const unsigned int hspi1_b_mux[] = { + HSPI_CLK1_B_MARK, HSPI_CS1_B_MARK, HSPI_RX1_B_MARK, HSPI_TX1_B_MARK, +}; +static const unsigned int hspi1_c_pins[] = { + /* CLK, CS, RX, TX */ + 141, 142, 144, 143, +}; +static const unsigned int hspi1_c_mux[] = { + HSPI_CLK1_C_MARK, HSPI_CS1_C_MARK, HSPI_RX1_C_MARK, HSPI_TX1_C_MARK, +}; +static const unsigned int hspi1_d_pins[] = { + /* CLK, CS, RX, TX */ + 101, 102, 104, 103, +}; +static const unsigned int hspi1_d_mux[] = { + HSPI_CLK1_D_MARK, HSPI_CS1_D_MARK, HSPI_RX1_D_MARK, HSPI_TX1_D_MARK, +}; +/* - HSPI2 ------------------------------------------------------------------ */ +static const unsigned int hspi2_pins[] = { + /* CLK, CS, RX, TX */ + 9, 10, 11, 14, +}; +static const unsigned int hspi2_mux[] = { + HSPI_CLK2_MARK, HSPI_CS2_MARK, HSPI_RX2_MARK, HSPI_TX2_MARK, +}; +static const unsigned int hspi2_b_pins[] = { + /* CLK, CS, RX, TX */ + 7, 13, 8, 6, +}; +static const unsigned int hspi2_b_mux[] = { + HSPI_CLK2_B_MARK, HSPI_CS2_B_MARK, HSPI_RX2_B_MARK, HSPI_TX2_B_MARK, +}; +/* - INTC ------------------------------------------------------------------- */ +static const unsigned int intc_irq0_pins[] = { + /* IRQ */ + 78, +}; +static const unsigned int intc_irq0_mux[] = { + IRQ0_MARK, +}; +static const unsigned int intc_irq0_b_pins[] = { + /* IRQ */ + 141, +}; +static const unsigned int intc_irq0_b_mux[] = { + IRQ0_B_MARK, +}; +static const unsigned int intc_irq1_pins[] = { + /* IRQ */ + 79, +}; +static const unsigned int intc_irq1_mux[] = { + IRQ1_MARK, +}; +static const unsigned int intc_irq1_b_pins[] = { + /* IRQ */ + 142, +}; +static const unsigned int intc_irq1_b_mux[] = { + IRQ1_B_MARK, +}; +static const unsigned int intc_irq2_pins[] = { + /* IRQ */ + 88, +}; +static const unsigned int intc_irq2_mux[] = { + IRQ2_MARK, +}; +static const unsigned int intc_irq2_b_pins[] = { + /* IRQ */ + 143, +}; +static const unsigned int intc_irq2_b_mux[] = { + IRQ2_B_MARK, +}; +static const unsigned int intc_irq3_pins[] = { + /* IRQ */ + 89, +}; +static const unsigned int intc_irq3_mux[] = { + IRQ3_MARK, +}; +static const unsigned int intc_irq3_b_pins[] = { + /* IRQ */ + 144, +}; +static const unsigned int intc_irq3_b_mux[] = { + IRQ3_B_MARK, +}; +/* - LSBC ------------------------------------------------------------------- */ +static const unsigned int lbsc_cs0_pins[] = { + /* CS */ + 13, +}; +static const unsigned int lbsc_cs0_mux[] = { + CS0_MARK, +}; +static const unsigned int lbsc_cs1_pins[] = { + /* CS */ + 14, +}; +static const unsigned int lbsc_cs1_mux[] = { + CS1_A26_MARK, +}; +static const unsigned int lbsc_ex_cs0_pins[] = { + /* CS */ + 15, +}; +static const unsigned int lbsc_ex_cs0_mux[] = { + EX_CS0_MARK, +}; +static const unsigned int lbsc_ex_cs1_pins[] = { + /* CS */ + 16, +}; +static const unsigned int lbsc_ex_cs1_mux[] = { + EX_CS1_MARK, +}; +static const unsigned int lbsc_ex_cs2_pins[] = { + /* CS */ + 17, +}; +static const unsigned int lbsc_ex_cs2_mux[] = { + EX_CS2_MARK, +}; +static const unsigned int lbsc_ex_cs3_pins[] = { + /* CS */ + 18, +}; +static const unsigned int lbsc_ex_cs3_mux[] = { + EX_CS3_MARK, +}; +static const unsigned int lbsc_ex_cs4_pins[] = { + /* CS */ + 19, +}; +static const unsigned int lbsc_ex_cs4_mux[] = { + EX_CS4_MARK, +}; +static const unsigned int lbsc_ex_cs5_pins[] = { + /* CS */ + 20, +}; +static const unsigned int lbsc_ex_cs5_mux[] = { + EX_CS5_MARK, +}; +/* - MMCIF ------------------------------------------------------------------ */ +static const unsigned int mmc0_data1_pins[] = { + /* D[0] */ + 19, +}; +static const unsigned int mmc0_data1_mux[] = { + MMC0_D0_MARK, +}; +static const unsigned int mmc0_data4_pins[] = { + /* D[0:3] */ + 19, 20, 21, 2, +}; +static const unsigned int mmc0_data4_mux[] = { + MMC0_D0_MARK, MMC0_D1_MARK, MMC0_D2_MARK, MMC0_D3_MARK, +}; +static const unsigned int mmc0_data8_pins[] = { + /* D[0:7] */ + 19, 20, 21, 2, 10, 11, 15, 16, +}; +static const unsigned int mmc0_data8_mux[] = { + MMC0_D0_MARK, MMC0_D1_MARK, MMC0_D2_MARK, MMC0_D3_MARK, + MMC0_D4_MARK, MMC0_D5_MARK, MMC0_D6_MARK, MMC0_D7_MARK, +}; +static const unsigned int mmc0_ctrl_pins[] = { + /* CMD, CLK */ + 18, 17, +}; +static const unsigned int mmc0_ctrl_mux[] = { + MMC0_CMD_MARK, MMC0_CLK_MARK, +}; +static const unsigned int mmc1_data1_pins[] = { + /* D[0] */ + 72, +}; +static const unsigned int mmc1_data1_mux[] = { + MMC1_D0_MARK, +}; +static const unsigned int mmc1_data4_pins[] = { + /* D[0:3] */ + 72, 73, 74, 75, +}; +static const unsigned int mmc1_data4_mux[] = { + MMC1_D0_MARK, MMC1_D1_MARK, MMC1_D2_MARK, MMC1_D3_MARK, +}; +static const unsigned int mmc1_data8_pins[] = { + /* D[0:7] */ + 72, 73, 74, 75, 76, 77, 80, 81, +}; +static const unsigned int mmc1_data8_mux[] = { + MMC1_D0_MARK, MMC1_D1_MARK, MMC1_D2_MARK, MMC1_D3_MARK, + MMC1_D4_MARK, MMC1_D5_MARK, MMC1_D6_MARK, MMC1_D7_MARK, +}; +static const unsigned int mmc1_ctrl_pins[] = { + /* CMD, CLK */ + 68, 65, +}; +static const unsigned int mmc1_ctrl_mux[] = { + MMC1_CMD_MARK, MMC1_CLK_MARK, +}; +/* - SCIF0 ------------------------------------------------------------------ */ +static const unsigned int scif0_data_pins[] = { + /* RXD, TXD */ + 153, 152, +}; +static const unsigned int scif0_data_mux[] = { + RX0_MARK, TX0_MARK, +}; +static const unsigned int scif0_clk_pins[] = { + /* SCK */ + 156, +}; +static const unsigned int scif0_clk_mux[] = { + SCK0_MARK, +}; +static const unsigned int scif0_ctrl_pins[] = { + /* RTS, CTS */ + 151, 150, +}; +static const unsigned int scif0_ctrl_mux[] = { + RTS0_TANS_MARK, CTS0_MARK, +}; +static const unsigned int scif0_data_b_pins[] = { + /* RXD, TXD */ + 20, 19, +}; +static const unsigned int scif0_data_b_mux[] = { + RX0_B_MARK, TX0_B_MARK, +}; +static const unsigned int scif0_clk_b_pins[] = { + /* SCK */ + 33, +}; +static const unsigned int scif0_clk_b_mux[] = { + SCK0_B_MARK, +}; +static const unsigned int scif0_ctrl_b_pins[] = { + /* RTS, CTS */ + 18, 11, +}; +static const unsigned int scif0_ctrl_b_mux[] = { + RTS0_B_TANS_B_MARK, CTS0_B_MARK, +}; +static const unsigned int scif0_data_c_pins[] = { + /* RXD, TXD */ + 146, 147, +}; +static const unsigned int scif0_data_c_mux[] = { + RX0_C_MARK, TX0_C_MARK, +}; +static const unsigned int scif0_clk_c_pins[] = { + /* SCK */ + 145, +}; +static const unsigned int scif0_clk_c_mux[] = { + SCK0_C_MARK, +}; +static const unsigned int scif0_ctrl_c_pins[] = { + /* RTS, CTS */ + 149, 148, +}; +static const unsigned int scif0_ctrl_c_mux[] = { + RTS0_C_TANS_C_MARK, CTS0_C_MARK, +}; +static const unsigned int scif0_data_d_pins[] = { + /* RXD, TXD */ + 43, 42, +}; +static const unsigned int scif0_data_d_mux[] = { + RX0_D_MARK, TX0_D_MARK, +}; +static const unsigned int scif0_clk_d_pins[] = { + /* SCK */ + 50, +}; +static const unsigned int scif0_clk_d_mux[] = { + SCK0_D_MARK, +}; +static const unsigned int scif0_ctrl_d_pins[] = { + /* RTS, CTS */ + 51, 35, +}; +static const unsigned int scif0_ctrl_d_mux[] = { + RTS0_D_TANS_D_MARK, CTS0_D_MARK, +}; +/* - SCIF1 ------------------------------------------------------------------ */ +static const unsigned int scif1_data_pins[] = { + /* RXD, TXD */ + 149, 148, +}; +static const unsigned int scif1_data_mux[] = { + RX1_MARK, TX1_MARK, +}; +static const unsigned int scif1_clk_pins[] = { + /* SCK */ + 145, +}; +static const unsigned int scif1_clk_mux[] = { + SCK1_MARK, +}; +static const unsigned int scif1_ctrl_pins[] = { + /* RTS, CTS */ + 147, 146, +}; +static const unsigned int scif1_ctrl_mux[] = { + RTS1_TANS_MARK, CTS1_MARK, +}; +static const unsigned int scif1_data_b_pins[] = { + /* RXD, TXD */ + 117, 114, +}; +static const unsigned int scif1_data_b_mux[] = { + RX1_B_MARK, TX1_B_MARK, +}; +static const unsigned int scif1_clk_b_pins[] = { + /* SCK */ + 113, +}; +static const unsigned int scif1_clk_b_mux[] = { + SCK1_B_MARK, +}; +static const unsigned int scif1_ctrl_b_pins[] = { + /* RTS, CTS */ + 115, 116, +}; +static const unsigned int scif1_ctrl_b_mux[] = { + RTS1_B_TANS_B_MARK, CTS1_B_MARK, +}; +static const unsigned int scif1_data_c_pins[] = { + /* RXD, TXD */ + 67, 66, +}; +static const unsigned int scif1_data_c_mux[] = { + RX1_C_MARK, TX1_C_MARK, +}; +static const unsigned int scif1_clk_c_pins[] = { + /* SCK */ + 86, +}; +static const unsigned int scif1_clk_c_mux[] = { + SCK1_C_MARK, +}; +static const unsigned int scif1_ctrl_c_pins[] = { + /* RTS, CTS */ + 69, 68, +}; +static const unsigned int scif1_ctrl_c_mux[] = { + RTS1_C_TANS_C_MARK, CTS1_C_MARK, +}; +/* - SCIF2 ------------------------------------------------------------------ */ +static const unsigned int scif2_data_pins[] = { + /* RXD, TXD */ + 106, 105, +}; +static const unsigned int scif2_data_mux[] = { + RX2_MARK, TX2_MARK, +}; +static const unsigned int scif2_clk_pins[] = { + /* SCK */ + 107, +}; +static const unsigned int scif2_clk_mux[] = { + SCK2_MARK, +}; +static const unsigned int scif2_data_b_pins[] = { + /* RXD, TXD */ + 120, 119, +}; +static const unsigned int scif2_data_b_mux[] = { + RX2_B_MARK, TX2_B_MARK, +}; +static const unsigned int scif2_clk_b_pins[] = { + /* SCK */ + 118, +}; +static const unsigned int scif2_clk_b_mux[] = { + SCK2_B_MARK, +}; +static const unsigned int scif2_data_c_pins[] = { + /* RXD, TXD */ + 33, 31, +}; +static const unsigned int scif2_data_c_mux[] = { + RX2_C_MARK, TX2_C_MARK, +}; +static const unsigned int scif2_clk_c_pins[] = { + /* SCK */ + 32, +}; +static const unsigned int scif2_clk_c_mux[] = { + SCK2_C_MARK, +}; +static const unsigned int scif2_data_d_pins[] = { + /* RXD, TXD */ + 64, 62, +}; +static const unsigned int scif2_data_d_mux[] = { + RX2_D_MARK, TX2_D_MARK, +}; +static const unsigned int scif2_clk_d_pins[] = { + /* SCK */ + 63, +}; +static const unsigned int scif2_clk_d_mux[] = { + SCK2_D_MARK, +}; +static const unsigned int scif2_data_e_pins[] = { + /* RXD, TXD */ + 20, 19, +}; +static const unsigned int scif2_data_e_mux[] = { + RX2_E_MARK, TX2_E_MARK, +}; +/* - SCIF3 ------------------------------------------------------------------ */ +static const unsigned int scif3_data_pins[] = { + /* RXD, TXD */ + 137, 136, +}; +static const unsigned int scif3_data_mux[] = { + RX3_IRDA_RX_MARK, TX3_IRDA_TX_MARK, +}; +static const unsigned int scif3_clk_pins[] = { + /* SCK */ + 135, +}; +static const unsigned int scif3_clk_mux[] = { + SCK3_MARK, +}; + +static const unsigned int scif3_data_b_pins[] = { + /* RXD, TXD */ + 64, 62, +}; +static const unsigned int scif3_data_b_mux[] = { + RX3_B_IRDA_RX_B_MARK, TX3_B_IRDA_TX_B_MARK, +}; +static const unsigned int scif3_data_c_pins[] = { + /* RXD, TXD */ + 15, 12, +}; +static const unsigned int scif3_data_c_mux[] = { + RX3_C_IRDA_RX_C_MARK, TX3C_IRDA_TX_C_MARK, +}; +static const unsigned int scif3_data_d_pins[] = { + /* RXD, TXD */ + 30, 29, +}; +static const unsigned int scif3_data_d_mux[] = { + RX3_D_IRDA_RX_D_MARK, TX3_D_IRDA_TX_D_MARK, +}; +static const unsigned int scif3_data_e_pins[] = { + /* RXD, TXD */ + 35, 34, +}; +static const unsigned int scif3_data_e_mux[] = { + RX3_E_IRDA_RX_E_MARK, TX3_E_IRDA_TX_E_MARK, +}; +static const unsigned int scif3_clk_e_pins[] = { + /* SCK */ + 42, +}; +static const unsigned int scif3_clk_e_mux[] = { + SCK3_E_MARK, +}; +/* - SCIF4 ------------------------------------------------------------------ */ +static const unsigned int scif4_data_pins[] = { + /* RXD, TXD */ + 123, 122, +}; +static const unsigned int scif4_data_mux[] = { + RX4_MARK, TX4_MARK, +}; +static const unsigned int scif4_clk_pins[] = { + /* SCK */ + 121, +}; +static const unsigned int scif4_clk_mux[] = { + SCK4_MARK, +}; +static const unsigned int scif4_data_b_pins[] = { + /* RXD, TXD */ + 111, 110, +}; +static const unsigned int scif4_data_b_mux[] = { + RX4_B_MARK, TX4_B_MARK, +}; +static const unsigned int scif4_clk_b_pins[] = { + /* SCK */ + 112, +}; +static const unsigned int scif4_clk_b_mux[] = { + SCK4_B_MARK, +}; +static const unsigned int scif4_data_c_pins[] = { + /* RXD, TXD */ + 22, 21, +}; +static const unsigned int scif4_data_c_mux[] = { + RX4_C_MARK, TX4_C_MARK, +}; +static const unsigned int scif4_data_d_pins[] = { + /* RXD, TXD */ + 69, 68, +}; +static const unsigned int scif4_data_d_mux[] = { + RX4_D_MARK, TX4_D_MARK, +}; +/* - SCIF5 ------------------------------------------------------------------ */ +static const unsigned int scif5_data_pins[] = { + /* RXD, TXD */ + 51, 50, +}; +static const unsigned int scif5_data_mux[] = { + RX5_MARK, TX5_MARK, +}; +static const unsigned int scif5_clk_pins[] = { + /* SCK */ + 43, +}; +static const unsigned int scif5_clk_mux[] = { + SCK5_MARK, +}; +static const unsigned int scif5_data_b_pins[] = { + /* RXD, TXD */ + 18, 11, +}; +static const unsigned int scif5_data_b_mux[] = { + RX5_B_MARK, TX5_B_MARK, +}; +static const unsigned int scif5_clk_b_pins[] = { + /* SCK */ + 19, +}; +static const unsigned int scif5_clk_b_mux[] = { + SCK5_B_MARK, +}; +static const unsigned int scif5_data_c_pins[] = { + /* RXD, TXD */ + 24, 23, +}; +static const unsigned int scif5_data_c_mux[] = { + RX5_C_MARK, TX5_C_MARK, +}; +static const unsigned int scif5_clk_c_pins[] = { + /* SCK */ + 28, +}; +static const unsigned int scif5_clk_c_mux[] = { + SCK5_C_MARK, +}; +static const unsigned int scif5_data_d_pins[] = { + /* RXD, TXD */ + 8, 6, +}; +static const unsigned int scif5_data_d_mux[] = { + RX5_D_MARK, TX5_D_MARK, +}; +static const unsigned int scif5_clk_d_pins[] = { + /* SCK */ + 7, +}; +static const unsigned int scif5_clk_d_mux[] = { + SCK5_D_MARK, +}; +/* - SDHI0 ------------------------------------------------------------------ */ +static const unsigned int sdhi0_data1_pins[] = { + /* D0 */ + 117, +}; +static const unsigned int sdhi0_data1_mux[] = { + SD0_DAT0_MARK, +}; +static const unsigned int sdhi0_data4_pins[] = { + /* D[0:3] */ + 117, 118, 119, 120, +}; +static const unsigned int sdhi0_data4_mux[] = { + SD0_DAT0_MARK, SD0_DAT1_MARK, SD0_DAT2_MARK, SD0_DAT3_MARK, +}; +static const unsigned int sdhi0_ctrl_pins[] = { + /* CMD, CLK */ + 114, 113, +}; +static const unsigned int sdhi0_ctrl_mux[] = { + SD0_CMD_MARK, SD0_CLK_MARK, +}; +static const unsigned int sdhi0_cd_pins[] = { + /* CD */ + 115, +}; +static const unsigned int sdhi0_cd_mux[] = { + SD0_CD_MARK, +}; +static const unsigned int sdhi0_wp_pins[] = { + /* WP */ + 116, +}; +static const unsigned int sdhi0_wp_mux[] = { + SD0_WP_MARK, +}; +/* - SDHI1 ------------------------------------------------------------------ */ +static const unsigned int sdhi1_data1_pins[] = { + /* D0 */ + 19, +}; +static const unsigned int sdhi1_data1_mux[] = { + SD1_DAT0_MARK, +}; +static const unsigned int sdhi1_data4_pins[] = { + /* D[0:3] */ + 19, 20, 21, 2, +}; +static const unsigned int sdhi1_data4_mux[] = { + SD1_DAT0_MARK, SD1_DAT1_MARK, SD1_DAT2_MARK, SD1_DAT3_MARK, +}; +static const unsigned int sdhi1_ctrl_pins[] = { + /* CMD, CLK */ + 18, 17, +}; +static const unsigned int sdhi1_ctrl_mux[] = { + SD1_CMD_MARK, SD1_CLK_MARK, +}; +static const unsigned int sdhi1_cd_pins[] = { + /* CD */ + 10, +}; +static const unsigned int sdhi1_cd_mux[] = { + SD1_CD_MARK, +}; +static const unsigned int sdhi1_wp_pins[] = { + /* WP */ + 11, +}; +static const unsigned int sdhi1_wp_mux[] = { + SD1_WP_MARK, +}; +/* - SDHI2 ------------------------------------------------------------------ */ +static const unsigned int sdhi2_data1_pins[] = { + /* D0 */ + 97, +}; +static const unsigned int sdhi2_data1_mux[] = { + SD2_DAT0_MARK, +}; +static const unsigned int sdhi2_data4_pins[] = { + /* D[0:3] */ + 97, 98, 99, 100, +}; +static const unsigned int sdhi2_data4_mux[] = { + SD2_DAT0_MARK, SD2_DAT1_MARK, SD2_DAT2_MARK, SD2_DAT3_MARK, +}; +static const unsigned int sdhi2_ctrl_pins[] = { + /* CMD, CLK */ + 102, 101, +}; +static const unsigned int sdhi2_ctrl_mux[] = { + SD2_CMD_MARK, SD2_CLK_MARK, +}; +static const unsigned int sdhi2_cd_pins[] = { + /* CD */ + 103, +}; +static const unsigned int sdhi2_cd_mux[] = { + SD2_CD_MARK, +}; +static const unsigned int sdhi2_wp_pins[] = { + /* WP */ + 104, +}; +static const unsigned int sdhi2_wp_mux[] = { + SD2_WP_MARK, +}; +/* - SDHI3 ------------------------------------------------------------------ */ +static const unsigned int sdhi3_data1_pins[] = { + /* D0 */ + 50, +}; +static const unsigned int sdhi3_data1_mux[] = { + SD3_DAT0_MARK, +}; +static const unsigned int sdhi3_data4_pins[] = { + /* D[0:3] */ + 50, 51, 52, 53, +}; +static const unsigned int sdhi3_data4_mux[] = { + SD3_DAT0_MARK, SD3_DAT1_MARK, SD3_DAT2_MARK, SD3_DAT3_MARK, +}; +static const unsigned int sdhi3_ctrl_pins[] = { + /* CMD, CLK */ + 35, 34, +}; +static const unsigned int sdhi3_ctrl_mux[] = { + SD3_CMD_MARK, SD3_CLK_MARK, +}; +static const unsigned int sdhi3_cd_pins[] = { + /* CD */ + 62, +}; +static const unsigned int sdhi3_cd_mux[] = { + SD3_CD_MARK, +}; +static const unsigned int sdhi3_wp_pins[] = { + /* WP */ + 64, +}; +static const unsigned int sdhi3_wp_mux[] = { + SD3_WP_MARK, +}; +/* - USB0 ------------------------------------------------------------------- */ +static const unsigned int usb0_pins[] = { + /* OVC */ + 150, 154, +}; +static const unsigned int usb0_mux[] = { + USB_OVC0_MARK, USB_PENC0_MARK, +}; +/* - USB1 ------------------------------------------------------------------- */ +static const unsigned int usb1_pins[] = { + /* OVC */ + 152, 155, +}; +static const unsigned int usb1_mux[] = { + USB_OVC1_MARK, USB_PENC1_MARK, +}; +/* - USB2 ------------------------------------------------------------------- */ +static const unsigned int usb2_pins[] = { + /* OVC, PENC */ + 125, 156, +}; +static const unsigned int usb2_mux[] = { + USB_OVC2_MARK, USB_PENC2_MARK, +}; + +static const struct sh_pfc_pin_group pinmux_groups[] = { + SH_PFC_PIN_GROUP(du0_rgb666), + SH_PFC_PIN_GROUP(du0_rgb888), + SH_PFC_PIN_GROUP(du0_clk_0), + SH_PFC_PIN_GROUP(du0_clk_1), + SH_PFC_PIN_GROUP(du0_sync_0), + SH_PFC_PIN_GROUP(du0_sync_1), + SH_PFC_PIN_GROUP(du0_oddf), + SH_PFC_PIN_GROUP(du0_cde), + SH_PFC_PIN_GROUP(du1_rgb666), + SH_PFC_PIN_GROUP(du1_rgb888), + SH_PFC_PIN_GROUP(du1_clk), + SH_PFC_PIN_GROUP(du1_sync_0), + SH_PFC_PIN_GROUP(du1_sync_1), + SH_PFC_PIN_GROUP(du1_oddf), + SH_PFC_PIN_GROUP(du1_cde), + SH_PFC_PIN_GROUP(hspi0), + SH_PFC_PIN_GROUP(hspi1), + SH_PFC_PIN_GROUP(hspi1_b), + SH_PFC_PIN_GROUP(hspi1_c), + SH_PFC_PIN_GROUP(hspi1_d), + SH_PFC_PIN_GROUP(hspi2), + SH_PFC_PIN_GROUP(hspi2_b), + SH_PFC_PIN_GROUP(intc_irq0), + SH_PFC_PIN_GROUP(intc_irq0_b), + SH_PFC_PIN_GROUP(intc_irq1), + SH_PFC_PIN_GROUP(intc_irq1_b), + SH_PFC_PIN_GROUP(intc_irq2), + SH_PFC_PIN_GROUP(intc_irq2_b), + SH_PFC_PIN_GROUP(intc_irq3), + SH_PFC_PIN_GROUP(intc_irq3_b), + SH_PFC_PIN_GROUP(lbsc_cs0), + SH_PFC_PIN_GROUP(lbsc_cs1), + SH_PFC_PIN_GROUP(lbsc_ex_cs0), + SH_PFC_PIN_GROUP(lbsc_ex_cs1), + SH_PFC_PIN_GROUP(lbsc_ex_cs2), + SH_PFC_PIN_GROUP(lbsc_ex_cs3), + SH_PFC_PIN_GROUP(lbsc_ex_cs4), + SH_PFC_PIN_GROUP(lbsc_ex_cs5), + SH_PFC_PIN_GROUP(mmc0_data1), + SH_PFC_PIN_GROUP(mmc0_data4), + SH_PFC_PIN_GROUP(mmc0_data8), + SH_PFC_PIN_GROUP(mmc0_ctrl), + SH_PFC_PIN_GROUP(mmc1_data1), + SH_PFC_PIN_GROUP(mmc1_data4), + SH_PFC_PIN_GROUP(mmc1_data8), + SH_PFC_PIN_GROUP(mmc1_ctrl), + SH_PFC_PIN_GROUP(scif0_data), + SH_PFC_PIN_GROUP(scif0_clk), + SH_PFC_PIN_GROUP(scif0_ctrl), + SH_PFC_PIN_GROUP(scif0_data_b), + SH_PFC_PIN_GROUP(scif0_clk_b), + SH_PFC_PIN_GROUP(scif0_ctrl_b), + SH_PFC_PIN_GROUP(scif0_data_c), + SH_PFC_PIN_GROUP(scif0_clk_c), + SH_PFC_PIN_GROUP(scif0_ctrl_c), + SH_PFC_PIN_GROUP(scif0_data_d), + SH_PFC_PIN_GROUP(scif0_clk_d), + SH_PFC_PIN_GROUP(scif0_ctrl_d), + SH_PFC_PIN_GROUP(scif1_data), + SH_PFC_PIN_GROUP(scif1_clk), + SH_PFC_PIN_GROUP(scif1_ctrl), + SH_PFC_PIN_GROUP(scif1_data_b), + SH_PFC_PIN_GROUP(scif1_clk_b), + SH_PFC_PIN_GROUP(scif1_ctrl_b), + SH_PFC_PIN_GROUP(scif1_data_c), + SH_PFC_PIN_GROUP(scif1_clk_c), + SH_PFC_PIN_GROUP(scif1_ctrl_c), + SH_PFC_PIN_GROUP(scif2_data), + SH_PFC_PIN_GROUP(scif2_clk), + SH_PFC_PIN_GROUP(scif2_data_b), + SH_PFC_PIN_GROUP(scif2_clk_b), + SH_PFC_PIN_GROUP(scif2_data_c), + SH_PFC_PIN_GROUP(scif2_clk_c), + SH_PFC_PIN_GROUP(scif2_data_d), + SH_PFC_PIN_GROUP(scif2_clk_d), + SH_PFC_PIN_GROUP(scif2_data_e), + SH_PFC_PIN_GROUP(scif3_data), + SH_PFC_PIN_GROUP(scif3_clk), + SH_PFC_PIN_GROUP(scif3_data_b), + SH_PFC_PIN_GROUP(scif3_data_c), + SH_PFC_PIN_GROUP(scif3_data_d), + SH_PFC_PIN_GROUP(scif3_data_e), + SH_PFC_PIN_GROUP(scif3_clk_e), + SH_PFC_PIN_GROUP(scif4_data), + SH_PFC_PIN_GROUP(scif4_clk), + SH_PFC_PIN_GROUP(scif4_data_b), + SH_PFC_PIN_GROUP(scif4_clk_b), + SH_PFC_PIN_GROUP(scif4_data_c), + SH_PFC_PIN_GROUP(scif4_data_d), + SH_PFC_PIN_GROUP(scif5_data), + SH_PFC_PIN_GROUP(scif5_clk), + SH_PFC_PIN_GROUP(scif5_data_b), + SH_PFC_PIN_GROUP(scif5_clk_b), + SH_PFC_PIN_GROUP(scif5_data_c), + SH_PFC_PIN_GROUP(scif5_clk_c), + SH_PFC_PIN_GROUP(scif5_data_d), + SH_PFC_PIN_GROUP(scif5_clk_d), + SH_PFC_PIN_GROUP(sdhi0_data1), + SH_PFC_PIN_GROUP(sdhi0_data4), + SH_PFC_PIN_GROUP(sdhi0_ctrl), + SH_PFC_PIN_GROUP(sdhi0_cd), + SH_PFC_PIN_GROUP(sdhi0_wp), + SH_PFC_PIN_GROUP(sdhi1_data1), + SH_PFC_PIN_GROUP(sdhi1_data4), + SH_PFC_PIN_GROUP(sdhi1_ctrl), + SH_PFC_PIN_GROUP(sdhi1_cd), + SH_PFC_PIN_GROUP(sdhi1_wp), + SH_PFC_PIN_GROUP(sdhi2_data1), + SH_PFC_PIN_GROUP(sdhi2_data4), + SH_PFC_PIN_GROUP(sdhi2_ctrl), + SH_PFC_PIN_GROUP(sdhi2_cd), + SH_PFC_PIN_GROUP(sdhi2_wp), + SH_PFC_PIN_GROUP(sdhi3_data1), + SH_PFC_PIN_GROUP(sdhi3_data4), + SH_PFC_PIN_GROUP(sdhi3_ctrl), + SH_PFC_PIN_GROUP(sdhi3_cd), + SH_PFC_PIN_GROUP(sdhi3_wp), + SH_PFC_PIN_GROUP(usb0), + SH_PFC_PIN_GROUP(usb1), + SH_PFC_PIN_GROUP(usb2), +}; + +static const char * const du0_groups[] = { + "du0_rgb666", + "du0_rgb888", + "du0_clk_0", + "du0_clk_1", + "du0_sync_0", + "du0_sync_1", + "du0_oddf", + "du0_cde", +}; + +static const char * const du1_groups[] = { + "du1_rgb666", + "du1_rgb888", + "du1_clk", + "du1_sync_0", + "du1_sync_1", + "du1_oddf", + "du1_cde", +}; + +static const char * const hspi0_groups[] = { + "hspi0", +}; + +static const char * const hspi1_groups[] = { + "hspi1", + "hspi1_b", + "hspi1_c", + "hspi1_d", +}; + +static const char * const hspi2_groups[] = { + "hspi2", + "hspi2_b", +}; + +static const char * const intc_groups[] = { + "intc_irq0", + "intc_irq0_b", + "intc_irq1", + "intc_irq1_b", + "intc_irq2", + "intc_irq2_b", + "intc_irq3", + "intc_irq4_b", +}; + +static const char * const lbsc_groups[] = { + "lbsc_cs0", + "lbsc_cs1", + "lbsc_ex_cs0", + "lbsc_ex_cs1", + "lbsc_ex_cs2", + "lbsc_ex_cs3", + "lbsc_ex_cs4", + "lbsc_ex_cs5", +}; + +static const char * const mmc0_groups[] = { + "mmc0_data1", + "mmc0_data4", + "mmc0_data8", + "mmc0_ctrl", +}; + +static const char * const mmc1_groups[] = { + "mmc1_data1", + "mmc1_data4", + "mmc1_data8", + "mmc1_ctrl", +}; + +static const char * const scif0_groups[] = { + "scif0_data", + "scif0_clk", + "scif0_ctrl", + "scif0_data_b", + "scif0_clk_b", + "scif0_ctrl_b", + "scif0_data_c", + "scif0_clk_c", + "scif0_ctrl_c", + "scif0_data_d", + "scif0_clk_d", + "scif0_ctrl_d", +}; + +static const char * const scif |