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path: root/drivers/interconnect/qcom/osm-l3.c
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Diffstat (limited to 'drivers/interconnect/qcom/osm-l3.c')
-rw-r--r--drivers/interconnect/qcom/osm-l3.c91
1 files changed, 73 insertions, 18 deletions
diff --git a/drivers/interconnect/qcom/osm-l3.c b/drivers/interconnect/qcom/osm-l3.c
index 96fb9ff5ff2e..695f28789e98 100644
--- a/drivers/interconnect/qcom/osm-l3.c
+++ b/drivers/interconnect/qcom/osm-l3.c
@@ -16,17 +16,24 @@
#include "sc7180.h"
#include "sdm845.h"
+#include "sm8150.h"
+#include "sm8250.h"
#define LUT_MAX_ENTRIES 40U
#define LUT_SRC GENMASK(31, 30)
#define LUT_L_VAL GENMASK(7, 0)
-#define LUT_ROW_SIZE 32
#define CLK_HW_DIV 2
-/* Register offsets */
+/* OSM Register offsets */
#define REG_ENABLE 0x0
-#define REG_FREQ_LUT 0x110
-#define REG_PERF_STATE 0x920
+#define OSM_LUT_ROW_SIZE 32
+#define OSM_REG_FREQ_LUT 0x110
+#define OSM_REG_PERF_STATE 0x920
+
+/* EPSS Register offsets */
+#define EPSS_LUT_ROW_SIZE 4
+#define EPSS_REG_FREQ_LUT 0x100
+#define EPSS_REG_PERF_STATE 0x320
#define OSM_L3_MAX_LINKS 1
@@ -36,6 +43,7 @@
struct qcom_osm_l3_icc_provider {
void __iomem *base;
unsigned int max_state;
+ unsigned int reg_perf_state;
unsigned long lut_tables[LUT_MAX_ENTRIES];
struct icc_provider provider;
};
@@ -57,12 +65,15 @@ struct qcom_icc_node {
};
struct qcom_icc_desc {
- struct qcom_icc_node **nodes;
+ const struct qcom_icc_node **nodes;
size_t num_nodes;
+ unsigned int lut_row_size;
+ unsigned int reg_freq_lut;
+ unsigned int reg_perf_state;
};
#define DEFINE_QNODE(_name, _id, _buswidth, ...) \
- static struct qcom_icc_node _name = { \
+ static const struct qcom_icc_node _name = { \
.name = #_name, \
.id = _id, \
.buswidth = _buswidth, \
@@ -73,7 +84,7 @@ struct qcom_icc_desc {
DEFINE_QNODE(sdm845_osm_apps_l3, SDM845_MASTER_OSM_L3_APPS, 16, SDM845_SLAVE_OSM_L3);
DEFINE_QNODE(sdm845_osm_l3, SDM845_SLAVE_OSM_L3, 16);
-static struct qcom_icc_node *sdm845_osm_l3_nodes[] = {
+static const struct qcom_icc_node *sdm845_osm_l3_nodes[] = {
[MASTER_OSM_L3_APPS] = &sdm845_osm_apps_l3,
[SLAVE_OSM_L3] = &sdm845_osm_l3,
};
@@ -81,12 +92,15 @@ static struct qcom_icc_node *sdm845_osm_l3_nodes[] = {
static const struct qcom_icc_desc sdm845_icc_osm_l3 = {
.nodes = sdm845_osm_l3_nodes,
.num_nodes = ARRAY_SIZE(sdm845_osm_l3_nodes),
+ .lut_row_size = OSM_LUT_ROW_SIZE,
+ .reg_freq_lut = OSM_REG_FREQ_LUT,
+ .reg_perf_state = OSM_REG_PERF_STATE,
};
DEFINE_QNODE(sc7180_osm_apps_l3, SC7180_MASTER_OSM_L3_APPS, 16, SC7180_SLAVE_OSM_L3);
DEFINE_QNODE(sc7180_osm_l3, SC7180_SLAVE_OSM_L3, 16);
-static struct qcom_icc_node *sc7180_osm_l3_nodes[] = {
+static const struct qcom_icc_node *sc7180_osm_l3_nodes[] = {
[MASTER_OSM_L3_APPS] = &sc7180_osm_apps_l3,
[SLAVE_OSM_L3] = &sc7180_osm_l3,
};
@@ -94,13 +108,48 @@ static struct qcom_icc_node *sc7180_osm_l3_nodes[] = {
static const struct qcom_icc_desc sc7180_icc_osm_l3 = {
.nodes = sc7180_osm_l3_nodes,
.num_nodes = ARRAY_SIZE(sc7180_osm_l3_nodes),
+ .lut_row_size = OSM_LUT_ROW_SIZE,
+ .reg_freq_lut = OSM_REG_FREQ_LUT,
+ .reg_perf_state = OSM_REG_PERF_STATE,
+};
+
+DEFINE_QNODE(sm8150_osm_apps_l3, SM8150_MASTER_OSM_L3_APPS, 32, SM8150_SLAVE_OSM_L3);
+DEFINE_QNODE(sm8150_osm_l3, SM8150_SLAVE_OSM_L3, 32);
+
+static const struct qcom_icc_node *sm8150_osm_l3_nodes[] = {
+ [MASTER_OSM_L3_APPS] = &sm8150_osm_apps_l3,
+ [SLAVE_OSM_L3] = &sm8150_osm_l3,
+};
+
+static const struct qcom_icc_desc sm8150_icc_osm_l3 = {
+ .nodes = sm8150_osm_l3_nodes,
+ .num_nodes = ARRAY_SIZE(sm8150_osm_l3_nodes),
+ .lut_row_size = OSM_LUT_ROW_SIZE,
+ .reg_freq_lut = OSM_REG_FREQ_LUT,
+ .reg_perf_state = OSM_REG_PERF_STATE,
+};
+
+DEFINE_QNODE(sm8250_epss_apps_l3, SM8250_MASTER_EPSS_L3_APPS, 32, SM8250_SLAVE_EPSS_L3);
+DEFINE_QNODE(sm8250_epss_l3, SM8250_SLAVE_EPSS_L3, 32);
+
+static const struct qcom_icc_node *sm8250_epss_l3_nodes[] = {
+ [MASTER_EPSS_L3_APPS] = &sm8250_epss_apps_l3,
+ [SLAVE_EPSS_L3_SHARED] = &sm8250_epss_l3,
+};
+
+static const struct qcom_icc_desc sm8250_icc_epss_l3 = {
+ .nodes = sm8250_epss_l3_nodes,
+ .num_nodes = ARRAY_SIZE(sm8250_epss_l3_nodes),
+ .lut_row_size = EPSS_LUT_ROW_SIZE,
+ .reg_freq_lut = EPSS_REG_FREQ_LUT,
+ .reg_perf_state = EPSS_REG_PERF_STATE,
};
static int qcom_icc_set(struct icc_node *src, struct icc_node *dst)
{
struct qcom_osm_l3_icc_provider *qp;
struct icc_provider *provider;
- struct qcom_icc_node *qn;
+ const struct qcom_icc_node *qn;
struct icc_node *n;
unsigned int index;
u32 agg_peak = 0;
@@ -124,7 +173,7 @@ static int qcom_icc_set(struct icc_node *src, struct icc_node *dst)
break;
}
- writel_relaxed(index, qp->base + REG_PERF_STATE);
+ writel_relaxed(index, qp->base + qp->reg_perf_state);
return 0;
}
@@ -145,7 +194,7 @@ static int qcom_osm_l3_probe(struct platform_device *pdev)
const struct qcom_icc_desc *desc;
struct icc_onecell_data *data;
struct icc_provider *provider;
- struct qcom_icc_node **qnodes;
+ const struct qcom_icc_node **qnodes;
struct icc_node *node;
size_t num_nodes;
struct clk *clk;
@@ -179,9 +228,15 @@ static int qcom_osm_l3_probe(struct platform_device *pdev)
return -ENODEV;
}
+ desc = device_get_match_data(&pdev->dev);
+ if (!desc)
+ return -EINVAL;
+
+ qp->reg_perf_state = desc->reg_perf_state;
+
for (i = 0; i < LUT_MAX_ENTRIES; i++) {
- info = readl_relaxed(qp->base + REG_FREQ_LUT +
- i * LUT_ROW_SIZE);
+ info = readl_relaxed(qp->base + desc->reg_freq_lut +
+ i * desc->lut_row_size);
src = FIELD_GET(LUT_SRC, info);
lval = FIELD_GET(LUT_L_VAL, info);
if (src)
@@ -200,10 +255,6 @@ static int qcom_osm_l3_probe(struct platform_device *pdev)
}
qp->max_state = i;
- desc = device_get_match_data(&pdev->dev);
- if (!desc)
- return -EINVAL;
-
qnodes = desc->nodes;
num_nodes = desc->num_nodes;
@@ -235,7 +286,8 @@ static int qcom_osm_l3_probe(struct platform_device *pdev)
}
node->name = qnodes[i]->name;
- node->data = qnodes[i];
+ /* Cast away const and add it back in qcom_icc_set() */
+ node->data = (void *)qnodes[i];
icc_node_add(node, provider);
for (j = 0; j < qnodes[i]->num_links; j++)
@@ -258,6 +310,8 @@ err:
static const struct of_device_id osm_l3_of_match[] = {
{ .compatible = "qcom,sc7180-osm-l3", .data = &sc7180_icc_osm_l3 },
{ .compatible = "qcom,sdm845-osm-l3", .data = &sdm845_icc_osm_l3 },
+ { .compatible = "qcom,sm8150-osm-l3", .data = &sm8150_icc_osm_l3 },
+ { .compatible = "qcom,sm8250-epss-l3", .data = &sm8250_icc_epss_l3 },
{ }
};
MODULE_DEVICE_TABLE(of, osm_l3_of_match);
@@ -268,6 +322,7 @@ static struct platform_driver osm_l3_driver = {
.driver = {
.name = "osm-l3",
.of_match_table = osm_l3_of_match,
+ .sync_state = icc_sync_state,
},
};
module_platform_driver(osm_l3_driver);