diff options
Diffstat (limited to 'drivers/hwtracing/coresight')
25 files changed, 858 insertions, 269 deletions
diff --git a/drivers/hwtracing/coresight/Kconfig b/drivers/hwtracing/coresight/Kconfig index 02dbb5ca3bcf..c1198245461d 100644 --- a/drivers/hwtracing/coresight/Kconfig +++ b/drivers/hwtracing/coresight/Kconfig @@ -3,7 +3,7 @@ # Coresight configuration # menuconfig CORESIGHT - bool "CoreSight Tracing Support" + tristate "CoreSight Tracing Support" depends on ARM || ARM64 depends on OF || ACPI select ARM_AMBA @@ -15,17 +15,24 @@ menuconfig CORESIGHT specification and configure the right series of components when a trace source gets enabled. + To compile this driver as a module, choose M here: the + module will be called coresight. + if CORESIGHT config CORESIGHT_LINKS_AND_SINKS - bool "CoreSight Link and Sink drivers" + tristate "CoreSight Link and Sink drivers" help This enables support for CoreSight link and sink drivers that are responsible for transporting and collecting the trace data respectively. Link and sinks are dynamically aggregated with a trace entity at run time to form a complete trace path. + To compile these drivers as modules, choose M here: the + modules will be called coresight-funnel and coresight-replicator. + config CORESIGHT_LINK_AND_SINK_TMC - bool "Coresight generic TMC driver" + tristate "Coresight generic TMC driver" + depends on CORESIGHT_LINKS_AND_SINKS help This enables support for the Trace Memory Controller driver. @@ -34,8 +41,11 @@ config CORESIGHT_LINK_AND_SINK_TMC complies with the generic implementation of the component without special enhancement or added features. + To compile this driver as a module, choose M here: the + module will be called coresight-tmc. + config CORESIGHT_CATU - bool "Coresight Address Translation Unit (CATU) driver" + tristate "Coresight Address Translation Unit (CATU) driver" depends on CORESIGHT_LINK_AND_SINK_TMC help Enable support for the Coresight Address Translation Unit (CATU). @@ -45,8 +55,11 @@ config CORESIGHT_CATU by looking up the provided table. CATU can also be used in pass-through mode where the address is not translated. + To compile this driver as a module, choose M here: the + module will be called coresight-catu. + config CORESIGHT_SINK_TPIU - bool "Coresight generic TPIU driver" + tristate "Coresight generic TPIU driver" depends on CORESIGHT_LINKS_AND_SINKS help This enables support for the Trace Port Interface Unit driver, @@ -56,16 +69,22 @@ config CORESIGHT_SINK_TPIU connected to an external host for use case capturing more traces than the on-board coresight memory can handle. + To compile this driver as a module, choose M here: the + module will be called coresight-tpiu. + config CORESIGHT_SINK_ETBV10 - bool "Coresight ETBv1.0 driver" + tristate "Coresight ETBv1.0 driver" depends on CORESIGHT_LINKS_AND_SINKS help This enables support for the Embedded Trace Buffer version 1.0 driver that complies with the generic implementation of the component without special enhancement or added features. + To compile this driver as a module, choose M here: the + module will be called coresight-etb10. + config CORESIGHT_SOURCE_ETM3X - bool "CoreSight Embedded Trace Macrocell 3.x driver" + tristate "CoreSight Embedded Trace Macrocell 3.x driver" depends on !ARM64 select CORESIGHT_LINKS_AND_SINKS help @@ -74,8 +93,11 @@ config CORESIGHT_SOURCE_ETM3X This is primarily useful for instruction level tracing. Depending the ETM version data tracing may also be available. + To compile this driver as a module, choose M here: the + module will be called coresight-etm3x. + config CORESIGHT_SOURCE_ETM4X - bool "CoreSight Embedded Trace Macrocell 4.x driver" + tristate "CoreSight Embedded Trace Macrocell 4.x driver" depends on ARM64 select CORESIGHT_LINKS_AND_SINKS select PID_IN_CONTEXTIDR @@ -85,8 +107,11 @@ config CORESIGHT_SOURCE_ETM4X for instruction level tracing. Depending on the implemented version data tracing may also be available. + To compile this driver as a module, choose M here: the + module will be called coresight-etm4x. + config CORESIGHT_STM - bool "CoreSight System Trace Macrocell driver" + tristate "CoreSight System Trace Macrocell driver" depends on (ARM && !(CPU_32v3 || CPU_32v4 || CPU_32v4T)) || ARM64 select CORESIGHT_LINKS_AND_SINKS select STM @@ -96,6 +121,9 @@ config CORESIGHT_STM logging useful software events or data coming from various entities in the system, possibly running different OSs + To compile this driver as a module, choose M here: the + module will be called coresight-stm. + config CORESIGHT_CPU_DEBUG tristate "CoreSight CPU Debug driver" depends on ARM || ARM64 @@ -110,8 +138,11 @@ config CORESIGHT_CPU_DEBUG properly, please refer Documentation/trace/coresight/coresight-cpu-debug.rst for detailed description and the example for usage. + To compile this driver as a module, choose M here: the + module will be called coresight-cpu-debug. + config CORESIGHT_CTI - bool "CoreSight Cross Trigger Interface (CTI) driver" + tristate "CoreSight Cross Trigger Interface (CTI) driver" depends on ARM || ARM64 help This driver provides support for CoreSight CTI and CTM components. @@ -122,6 +153,9 @@ config CORESIGHT_CTI halt compared to disabling sources and sinks normally in driver software. + To compile this driver as a module, choose M here: the + module will be called coresight-cti. + config CORESIGHT_CTI_INTEGRATION_REGS bool "Access CTI CoreSight Integration Registers" depends on CORESIGHT_CTI diff --git a/drivers/hwtracing/coresight/Makefile b/drivers/hwtracing/coresight/Makefile index 19497d1d92bf..f20e357758d1 100644 --- a/drivers/hwtracing/coresight/Makefile +++ b/drivers/hwtracing/coresight/Makefile @@ -2,22 +2,24 @@ # # Makefile for CoreSight drivers. # -obj-$(CONFIG_CORESIGHT) += coresight.o coresight-etm-perf.o \ - coresight-platform.o coresight-sysfs.o -obj-$(CONFIG_CORESIGHT_LINK_AND_SINK_TMC) += coresight-tmc.o \ - coresight-tmc-etf.o \ - coresight-tmc-etr.o +obj-$(CONFIG_CORESIGHT) += coresight.o +coresight-y := coresight-core.o coresight-etm-perf.o coresight-platform.o \ + coresight-sysfs.o +obj-$(CONFIG_CORESIGHT_LINK_AND_SINK_TMC) += coresight-tmc.o +coresight-tmc-y := coresight-tmc-core.o coresight-tmc-etf.o \ + coresight-tmc-etr.o obj-$(CONFIG_CORESIGHT_SINK_TPIU) += coresight-tpiu.o obj-$(CONFIG_CORESIGHT_SINK_ETBV10) += coresight-etb10.o obj-$(CONFIG_CORESIGHT_LINKS_AND_SINKS) += coresight-funnel.o \ coresight-replicator.o -obj-$(CONFIG_CORESIGHT_SOURCE_ETM3X) += coresight-etm3x.o coresight-etm-cp14.o \ - coresight-etm3x-sysfs.o -obj-$(CONFIG_CORESIGHT_SOURCE_ETM4X) += coresight-etm4x.o \ - coresight-etm4x-sysfs.o +obj-$(CONFIG_CORESIGHT_SOURCE_ETM3X) += coresight-etm3x.o +coresight-etm3x-y := coresight-etm3x-core.o coresight-etm-cp14.o \ + coresight-etm3x-sysfs.o +obj-$(CONFIG_CORESIGHT_SOURCE_ETM4X) += coresight-etm4x.o +coresight-etm4x-y := coresight-etm4x-core.o coresight-etm4x-sysfs.o obj-$(CONFIG_CORESIGHT_STM) += coresight-stm.o obj-$(CONFIG_CORESIGHT_CPU_DEBUG) += coresight-cpu-debug.o obj-$(CONFIG_CORESIGHT_CATU) += coresight-catu.o -obj-$(CONFIG_CORESIGHT_CTI) += coresight-cti.o \ - coresight-cti-platform.o \ - coresight-cti-sysfs.o +obj-$(CONFIG_CORESIGHT_CTI) += coresight-cti.o +coresight-cti-y := coresight-cti-core.o coresight-cti-platform.o \ + coresight-cti-sysfs.o diff --git a/drivers/hwtracing/coresight/coresight-catu.c b/drivers/hwtracing/coresight/coresight-catu.c index 1801804a7762..99430f6cf5a5 100644 --- a/drivers/hwtracing/coresight/coresight-catu.c +++ b/drivers/hwtracing/coresight/coresight-catu.c @@ -358,7 +358,7 @@ static int catu_alloc_etr_buf(struct tmc_drvdata *tmc_drvdata, return 0; } -const struct etr_buf_operations etr_catu_buf_ops = { +static const struct etr_buf_operations etr_catu_buf_ops = { .alloc = catu_alloc_etr_buf, .free = catu_free_etr_buf, .sync = catu_sync_etr_buf, @@ -567,11 +567,21 @@ out: return ret; } +static int __exit catu_remove(struct amba_device *adev) +{ + struct catu_drvdata *drvdata = dev_get_drvdata(&adev->dev); + + coresight_unregister(drvdata->csdev); + return 0; +} + static struct amba_id catu_ids[] = { CS_AMBA_ID(0x000bb9ee), {}, }; +MODULE_DEVICE_TABLE(amba, catu_ids); + static struct amba_driver catu_driver = { .drv = { .name = "coresight-catu", @@ -579,7 +589,30 @@ static struct amba_driver catu_driver = { .suppress_bind_attrs = true, }, .probe = catu_probe, + .remove = catu_remove, .id_table = catu_ids, }; -builtin_amba_driver(catu_driver); +static int __init catu_init(void) +{ + int ret; + + ret = amba_driver_register(&catu_driver); + if (ret) + pr_info("Error registering catu driver\n"); + tmc_etr_set_catu_ops(&etr_catu_buf_ops); + return ret; +} + +static void __exit catu_exit(void) +{ + tmc_etr_remove_catu_ops(); + amba_driver_unregister(&catu_driver); +} + +module_init(catu_init); +module_exit(catu_exit); + +MODULE_AUTHOR("Suzuki K Poulose <suzuki.poulose@arm.com>"); +MODULE_DESCRIPTION("Arm CoreSight Address Translation Unit (CATU) Driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/hwtracing/coresight/coresight-catu.h b/drivers/hwtracing/coresight/coresight-catu.h index 80ceee3c739c..6160c2d75a56 100644 --- a/drivers/hwtracing/coresight/coresight-catu.h +++ b/drivers/hwtracing/coresight/coresight-catu.h @@ -108,6 +108,4 @@ static inline bool coresight_is_catu_device(struct coresight_device *csdev) return true; } -extern const struct etr_buf_operations etr_catu_buf_ops; - #endif diff --git a/drivers/hwtracing/coresight/coresight.c b/drivers/hwtracing/coresight/coresight-core.c index e9c90f2de34a..6994c1309b2b 100644 --- a/drivers/hwtracing/coresight/coresight.c +++ b/drivers/hwtracing/coresight/coresight-core.c @@ -53,7 +53,22 @@ static struct list_head *stm_path; * beginning of the data collected in a buffer. That way the decoder knows that * it needs to look for another sync sequence. */ -const u32 barrier_pkt[4] = {0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff}; +const u32 coresight_barrier_pkt[4] = {0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff}; +EXPORT_SYMBOL_GPL(coresight_barrier_pkt); + +static const struct cti_assoc_op *cti_assoc_ops; + +void coresight_set_cti_ops(const struct cti_assoc_op *cti_op) +{ + cti_assoc_ops = cti_op; +} +EXPORT_SYMBOL_GPL(coresight_set_cti_ops); + +void coresight_remove_cti_ops(void) +{ + cti_assoc_ops = NULL; +} +EXPORT_SYMBOL_GPL(coresight_remove_cti_ops); static int coresight_id_match(struct device *dev, void *data) { @@ -179,6 +194,7 @@ int coresight_claim_device_unlocked(void __iomem *base) coresight_clear_claim_tags(base); return -EBUSY; } +EXPORT_SYMBOL_GPL(coresight_claim_device_unlocked); int coresight_claim_device(void __iomem *base) { @@ -190,6 +206,7 @@ int coresight_claim_device(void __iomem *base) return rc; } +EXPORT_SYMBOL_GPL(coresight_claim_device); /* * coresight_disclaim_device_unlocked : Clear the claim tags for the device. @@ -208,6 +225,7 @@ void coresight_disclaim_device_unlocked(void __iomem *base) */ WARN_ON_ONCE(1); } +EXPORT_SYMBOL_GPL(coresight_disclaim_device_unlocked); void coresight_disclaim_device(void __iomem *base) { @@ -215,6 +233,7 @@ void coresight_disclaim_device(void __iomem *base) coresight_disclaim_device_unlocked(base); CS_LOCK(base); } +EXPORT_SYMBOL_GPL(coresight_disclaim_device); /* enable or disable an associated CTI device of the supplied CS device */ static int @@ -222,16 +241,32 @@ coresight_control_assoc_ectdev(struct coresight_device *csdev, bool enable) { int ect_ret = 0; struct coresight_device *ect_csdev = csdev->ect_dev; + struct module *mod; if (!ect_csdev) return 0; + if ((!ect_ops(ect_csdev)->enable) || (!ect_ops(ect_csdev)->disable)) + return 0; + mod = ect_csdev->dev.parent->driver->owner; if (enable) { - if (ect_ops(ect_csdev)->enable) + if (try_module_get(mod)) { ect_ret = ect_ops(ect_csdev)->enable(ect_csdev); + if (ect_ret) { + module_put(mod); + } else { + get_device(ect_csdev->dev.parent); + csdev->ect_enabled = true; + } + } else + ect_ret = -ENODEV; } else { - if (ect_ops(ect_csdev)->disable) + if (csdev->ect_enabled) { ect_ret = ect_ops(ect_csdev)->disable(ect_csdev); + put_device(ect_csdev->dev.parent); + module_put(mod); + csdev->ect_enabled = false; + } } /* output warning if ECT enable is preventing trace operation */ @@ -253,6 +288,7 @@ void coresight_set_assoc_ectdev_mutex(struct coresight_device *csdev, csdev->ect_dev = ect_csdev; mutex_unlock(&coresight_mutex); } +EXPORT_SYMBOL_GPL(coresight_set_assoc_ectdev_mutex); static int coresight_enable_sink(struct coresight_device *csdev, u32 mode, void *data) @@ -467,6 +503,7 @@ void coresight_disable_path(struct list_head *path) { coresight_disable_path_from(path, NULL); } +EXPORT_SYMBOL_GPL(coresight_disable_path); int coresight_enable_path(struct list_head *path, u32 mode, void *sink_data) { @@ -540,50 +577,46 @@ struct coresight_device *coresight_get_sink(struct list_head *path) return csdev; } -static int coresight_enabled_sink(struct device *dev, const void *data) +static struct coresight_device * +coresight_find_enabled_sink(struct coresight_device *csdev) { - const bool *reset = data; - struct coresight_device *csdev = to_coresight_device(dev); + int i; + struct coresight_device *sink; if ((csdev->type == CORESIGHT_DEV_TYPE_SINK || csdev->type == CORESIGHT_DEV_TYPE_LINKSINK) && - csdev->activated) { - /* - * Now that we have a handle on the sink for this session, - * disable the sysFS "enable_sink" flag so that possible - * concurrent perf session that wish to use another sink don't - * trip on it. Doing so has no ramification for the current - * session. - */ - if (*reset) - csdev->activated = false; + csdev->activated) + return csdev; - return 1; + /* + * Recursively explore each port found on this element. + */ + for (i = 0; i < csdev->pdata->nr_outport; i++) { + struct coresight_device *child_dev; + + child_dev = csdev->pdata->conns[i].child_dev; + if (child_dev) + sink = coresight_find_enabled_sink(child_dev); + if (sink) + return sink; } - return 0; + return NULL; } /** - * coresight_get_enabled_sink - returns the first enabled sink found on the bus - * @deactivate: Whether the 'enable_sink' flag should be reset - * - * When operated from perf the deactivate parameter should be set to 'true'. - * That way the "enabled_sink" flag of the sink that was selected can be reset, - * allowing for other concurrent perf sessions to choose a different sink. + * coresight_get_enabled_sink - returns the first enabled sink using + * connection based search starting from the source reference * - * When operated from sysFS users have full control and as such the deactivate - * parameter should be set to 'false', hence mandating users to explicitly - * clear the flag. + * @source: Coresight source device reference */ -struct coresight_device *coresight_get_enabled_sink(bool deactivate) +struct coresight_device * +coresight_get_enabled_sink(struct coresight_device *source) { - struct device *dev = NULL; - - dev = bus_find_device(&coresight_bustype, NULL, &deactivate, - coresight_enabled_sink); + if (!source) + return NULL; - return dev ? to_coresight_device(dev) : NULL; + return coresight_find_enabled_sink(source); } static int coresight_sink_by_id(struct device *dev, const void *data) @@ -627,13 +660,45 @@ struct coresight_device *coresight_get_sink_by_id(u32 id) return dev ? to_coresight_device(dev) : NULL; } +/** + * coresight_get_ref- Helper function to increase reference count to module + * and device. + * Return true in successful case and power up the device. + * Return false when failed to get reference of module. + */ +static inline bool coresight_get_ref(struct coresight_device *csdev) +{ + struct device *dev = csdev->dev.parent; + + /* Make sure the driver can't be removed */ + if (!try_module_get(dev->driver->owner)) + return false; + /* Make sure the device can't go away */ + get_device(dev); + pm_runtime_get_sync(dev); + return true; +} + +/** + * coresight_put_ref- Helper function to decrease reference count to module + * and device. Power off the device. + */ +static inline void coresight_put_ref(struct coresight_device *csdev) +{ + struct device *dev = csdev->dev.parent; + + pm_runtime_put(dev); + put_device(dev); + module_put(dev->driver->owner); +} + /* * coresight_grab_device - Power up this device and any of the helper * devices connected to it for trace operation. Since the helper devices * don't appear on the trace path, they should be handled along with the * the master device. */ -static void coresight_grab_device(struct coresight_device *csdev) +static int coresight_grab_device(struct coresight_device *csdev) { int i; @@ -642,9 +707,20 @@ static void coresight_grab_device(struct coresight_device *csdev) child = csdev->pdata->conns[i].child_dev; if (child && child->type == CORESIGHT_DEV_TYPE_HELPER) - pm_runtime_get_sync(child->dev.parent); + if (!coresight_get_ref(child)) + goto err; } - pm_runtime_get_sync(csdev->dev.parent); + if (coresight_get_ref(csdev)) + return 0; +err: + for (i--; i >= 0; i--) { + struct coresight_device *child; + + child = csdev->pdata->conns[i].child_dev; + if (child && child->type == CORESIGHT_DEV_TYPE_HELPER) + coresight_put_ref(child); + } + return -ENODEV; } /* @@ -655,13 +731,13 @@ static void coresight_drop_device(struct coresight_device *csdev) { int i; - pm_runtime_put(csdev->dev.parent); + coresight_put_ref(csdev); for (i = 0; i < csdev->pdata->nr_outport; i++) { struct coresight_device *child; child = csdev->pdata->conns[i].child_dev; if (child && child->type == CORESIGHT_DEV_TYPE_HELPER) - pm_runtime_put(child->dev.parent); + coresight_put_ref(child); } } @@ -680,7 +756,7 @@ static int _coresight_build_path(struct coresight_device *csdev, struct coresight_device *sink, struct list_head *path) { - int i; + int i, ret; bool found = false; struct coresight_node *node; @@ -710,11 +786,14 @@ out: * is tell the PM runtime core we need this element and add a node * for it. */ + ret = coresight_grab_device(csdev); + if (ret) + return ret; + node = kzalloc(sizeof(struct coresight_node), GFP_KERNEL); if (!node) return -ENOMEM; - coresight_grab_device(csdev); node->csdev = csdev; list_add(&node->link, path); @@ -988,11 +1067,7 @@ int coresight_enable(struct coresight_device *csdev) goto out; } - /* - * Search for a valid sink for this session but don't reset the - * "enable_sink" flag in sysFS. Users get to do that explicitly. - */ - sink = coresight_get_enabled_sink(false); + sink = coresight_get_enabled_sink(csdev); if (!sink) { ret = -EINVAL; goto out; @@ -1188,7 +1263,6 @@ static void coresight_device_release(struct device *dev) { struct coresight_device *csdev = to_coresight_device(dev); - cti_remove_assoc_from_csdev(csdev); fwnode_handle_put(csdev->dev.fwnode); kfree(csdev->refcnt); kfree(csdev); @@ -1376,16 +1450,7 @@ int coresight_timeout(void __iomem *addr, u32 offset, int position, int value) return -EAGAIN; } - -struct bus_type coresight_bustype = { - .name = "coresight", -}; - -static int __init coresight_init(void) -{ - return bus_register(&coresight_bustype); -} -postcore_initcall(coresight_init); +EXPORT_SYMBOL_GPL(coresight_timeout); /* * coresight_release_platform_data: Release references to the devices connected @@ -1498,8 +1563,8 @@ struct coresight_device *coresight_register(struct coresight_desc *desc) ret = coresight_fixup_device_conns(csdev); if (!ret) ret = coresight_fixup_orphan_conns(csdev); - if (!ret) - cti_add_assoc_to_csdev(csdev); + if (!ret && cti_assoc_ops && cti_assoc_ops->add) + cti_assoc_ops->add(csdev); mutex_unlock(&coresight_mutex); if (ret) { @@ -1522,6 +1587,8 @@ void coresight_unregister(struct coresight_device *csdev) { etm_perf_del_symlink_sink(csdev); /* Remove references of that device in the topology */ + if (cti_assoc_ops && cti_assoc_ops->remove) + cti_assoc_ops->remove(csdev); coresight_remove_conns(csdev); coresight_clear_default_sink(csdev); coresight_release_platform_data(csdev, csdev->pdata); @@ -1552,6 +1619,7 @@ bool coresight_loses_context_with_cpu(struct device *dev) return fwnode_property_present(dev_fwnode(dev), "arm,coresight-loses-context-with-cpu"); } +EXPORT_SYMBOL_GPL(coresight_loses_context_with_cpu); /* * coresight_alloc_device_name - Get an index for a given device in the @@ -1592,3 +1660,35 @@ done: return name; } EXPORT_SYMBOL_GPL(coresight_alloc_device_name); + +struct bus_type coresight_bustype = { + .name = "coresight", +}; + +static int __init coresight_init(void) +{ + int ret; + + ret = bus_register(&coresight_bustype); + if (ret) + return ret; + + ret = etm_perf_init(); + if (ret) + bus_unregister(&coresight_bustype); + + return ret; +} + +static void __exit coresight_exit(void) +{ + etm_perf_exit(); + bus_unregister(&coresight_bustype); +} + +module_init(coresight_init); +module_exit(coresight_exit); + +MODULE_AUTHOR("Pratik Patel <pratikp@codeaurora.org>"); +MODULE_AUTHOR("Mathieu Poirier <mathieu.poirier@linaro.org>"); +MODULE_DESCRIPTION("Arm CoreSight tracer driver"); diff --git a/drivers/hwtracing/coresight/coresight-cpu-debug.c b/drivers/hwtracing/coresight/coresight-cpu-debug.c index 7e642fb3ed15..e1d232411d8d 100644 --- a/drivers/hwtracing/coresight/coresight-cpu-debug.c +++ b/drivers/hwtracing/coresight/coresight-cpu-debug.c @@ -665,6 +665,8 @@ static const struct amba_id debug_ids[] = { {}, }; +MODULE_DEVICE_TABLE(amba, debug_ids); + static struct amba_driver debug_driver = { .drv = { .name = "coresight-cpu-debug", diff --git a/drivers/hwtracing/coresight/coresight-cti.c b/drivers/hwtracing/coresight/coresight-cti-core.c index 3ccc703dc940..d28eae93e55c 100644 --- a/drivers/hwtracing/coresight/coresight-cti.c +++ b/drivers/hwtracing/coresight/coresight-cti-core.c @@ -86,22 +86,16 @@ void cti_write_all_hw_regs(struct cti_drvdata *drvdata) CS_LOCK(drvdata->base); } -static void cti_enable_hw_smp_call(void *info) -{ - struct cti_drvdata *drvdata = info; - - cti_write_all_hw_regs(drvdata); -} - /* write regs to hardware and enable */ static int cti_enable_hw(struct cti_drvdata *drvdata) { struct cti_config *config = &drvdata->config; struct device *dev = &drvdata->csdev->dev; + unsigned long flags; int rc = 0; pm_runtime_get_sync(dev->parent); - spin_lock(&drvdata->spinlock); + spin_lock_irqsave(&drvdata->spinlock, flags); /* no need to do anything if enabled or unpowered*/ if (config->hw_enabled || !config->hw_powered) @@ -112,19 +106,11 @@ static int cti_enable_hw(struct cti_drvdata *drvdata) if (rc) goto cti_err_not_enabled; - if (drvdata->ctidev.cpu >= 0) { - rc = smp_call_function_single(drvdata->ctidev.cpu, - cti_enable_hw_smp_call, - drvdata, 1); - if (rc) - goto cti_err_not_enabled; - } else { - cti_write_all_hw_regs(drvdata); - } + cti_write_all_hw_regs(drvdata); config->hw_enabled = true; atomic_inc(&drvdata->config.enable_req_count); - spin_unlock(&drvdata->spinlock); + spin_unlock_irqrestore(&drvdata->spinlock, flags); return rc; cti_state_unchanged: @@ -132,7 +118,7 @@ cti_state_unchanged: /* cannot enable due to error */ cti_err_not_enabled: - spin_unlock(&drvdata->spinlock); + spin_unlock_irqrestore(&drvdata->spinlock, flags); pm_runtime_put(dev->parent); return rc; } @@ -141,9 +127,7 @@ cti_err_not_enabled: static void cti_cpuhp_enable_hw(struct cti_drvdata *drvdata) { struct cti_config *config = &drvdata->config; - struct device *dev = &drvdata->csdev->dev; - pm_runtime_get_sync(dev->parent); spin_lock(&drvdata->spinlock); config->hw_powered = true; @@ -163,7 +147,6 @@ static void cti_cpuhp_enable_hw(struct cti_drvdata *drvdata) /* did not re-enable due to no claim / no request */ cti_hp_not_enabled: spin_unlock(&drvdata->spinlock); - pm_runtime_put(dev->parent); } /* disable hardware */ @@ -511,12 +494,15 @@ static bool cti_add_sysfs_link(struct cti_drvdata *drvdata, return !link_err; } -static void cti_remove_sysfs_link(struct cti_trig_con *tc) +static void cti_remove_sysfs_link(struct cti_drvdata *drvdata, + struct cti_trig_con *tc) { struct coresight_sysfs_link link_info; + link_info.orig = drvdata->csdev; link_info.orig_name = tc->con_dev_name; link_info.target = tc->con_dev; + link_info.target_name = dev_name(&drvdata->csdev->dev); coresight_remove_sysfs_link(&link_info); } @@ -556,7 +542,7 @@ cti_match_fixup_csdev(struct cti_device *ctidev, const char *node_name, * This will set the association if CTI declared before the CS device. * (called from coresight_register() with coresight_mutex locked). */ -void cti_add_assoc_to_csdev(struct coresight_device *csdev) +static void cti_add_assoc_to_csdev(struct coresight_device *csdev) { struct cti_drvdata *ect_item; struct cti_device *ctidev; @@ -589,13 +575,12 @@ void cti_add_assoc_to_csdev(struct coresight_device *csdev) cti_add_done: mutex_unlock(&ect_mutex); } -EXPORT_SYMBOL_GPL(cti_add_assoc_to_csdev); /* * Removing the associated devices is easier. * A CTI will not have a value for csdev->ect_dev. */ -void cti_remove_assoc_from_csdev(struct coresight_device *csdev) +static void cti_remove_assoc_from_csdev(struct coresight_device *csdev) { struct cti_drvdata *ctidrv; struct cti_trig_con *tc; @@ -606,8 +591,8 @@ void cti_remove_assoc_from_csdev(struct coresight_device *csdev) ctidrv = csdev_to_cti_drvdata(csdev->ect_dev); ctidev = &ctidrv->ctidev; list_for_each_entry(tc, &ctidev->trig_cons, node) { - if (tc->con_dev == csdev->ect_dev) { - cti_remove_sysfs_link(tc); + if (tc->con_dev == csdev) { + cti_remove_sysfs_link(ctidrv, tc); tc->con_dev = NULL; break; } @@ -616,7 +601,15 @@ void cti_remove_assoc_from_csdev(struct coresight_device *csdev) } mutex_unlock(&ect_mutex); } -EXPORT_SYMBOL_GPL(cti_remove_assoc_from_csdev); + +/* + * Operations to add and remove associated CTI. + * Register to coresight core driver as call back function. + */ +static struct cti_assoc_op cti_assoc_ops = { + .add = cti_add_assoc_to_csdev, + .remove = cti_remove_assoc_from_csdev +}; /* * Update the cross references where the associated device was found @@ -651,7 +644,7 @@ static void cti_remove_conn_xrefs(struct cti_drvdata *drvdata) if (tc->con_dev) { coresight_set_assoc_ectdev_mutex(tc->con_dev, NULL); - cti_remove_sysfs_link(tc); + cti_remove_sysfs_link(drvdata, tc); tc->con_dev = NULL; } } @@ -742,7 +735,8 @@ static int cti_dying_cpu(unsigned int cpu) spin_lock(&drvdata->spinlock); drvdata->config.hw_powered = false; - coresight_disclaim_device(drvdata->base); + if (drvdata->config.hw_enabled) + coresight_disclaim_device(drvdata->base); spin_unlock(&drvdata->spinlock); return 0; } @@ -828,7 +822,6 @@ static void cti_device_release(struct device *dev) struct cti_drvdata *ect_item, *ect_tmp; mutex_lock(&ect_mutex); - cti_remove_conn_xrefs(drvdata); cti_pm_release(drvdata); /* remove from the list */ @@ -843,6 +836,18 @@ static void cti_device_release(struct device *dev) if (drvdata->csdev_release) drvdata->csdev_release(dev); } +static int __exit cti_remove(struct amba_device *adev) +{ + struct cti_drvdata *drvdata = dev_get_drvdata(&adev->dev); + + mutex_lock(&ect_mutex); + cti_remove_conn_xrefs(drvdata); + mutex_unlock(&ect_mutex); + + coresight_unregister(drvdata->csdev); + + return 0; +} |