diff options
Diffstat (limited to 'arch/sh/include')
57 files changed, 18 insertions, 2157 deletions
diff --git a/arch/sh/include/asm/barrier.h b/arch/sh/include/asm/barrier.h index 66faae19d254..0d58a0159aa6 100644 --- a/arch/sh/include/asm/barrier.h +++ b/arch/sh/include/asm/barrier.h @@ -6,7 +6,7 @@ #ifndef __ASM_SH_BARRIER_H #define __ASM_SH_BARRIER_H -#if defined(CONFIG_CPU_SH4A) || defined(CONFIG_CPU_SH5) +#if defined(CONFIG_CPU_SH4A) #include <asm/cache_insns.h> #endif @@ -24,7 +24,7 @@ * Historically we have only done this type of barrier for the MMUCR, but * it's also necessary for the CCR, so we make it generic here instead. */ -#if defined(CONFIG_CPU_SH4A) || defined(CONFIG_CPU_SH5) +#if defined(CONFIG_CPU_SH4A) #define mb() __asm__ __volatile__ ("synco": : :"memory") #define rmb() mb() #define wmb() mb() diff --git a/arch/sh/include/asm/bitops.h b/arch/sh/include/asm/bitops.h index 8c3578288db5..445dd14c448a 100644 --- a/arch/sh/include/asm/bitops.h +++ b/arch/sh/include/asm/bitops.h @@ -26,7 +26,6 @@ #include <asm-generic/bitops/non-atomic.h> #endif -#ifdef CONFIG_SUPERH32 static inline unsigned long ffz(unsigned long word) { unsigned long result; @@ -60,31 +59,6 @@ static inline unsigned long __ffs(unsigned long word) : "t"); return result; } -#else -static inline unsigned long ffz(unsigned long word) -{ - unsigned long result, __d2, __d3; - - __asm__("gettr tr0, %2\n\t" - "pta $+32, tr0\n\t" - "andi %1, 1, %3\n\t" - "beq %3, r63, tr0\n\t" - "pta $+4, tr0\n" - "0:\n\t" - "shlri.l %1, 1, %1\n\t" - "addi %0, 1, %0\n\t" - "andi %1, 1, %3\n\t" - "beqi %3, 1, tr0\n" - "1:\n\t" - "ptabs %2, tr0\n\t" - : "=r" (result), "=r" (word), "=r" (__d2), "=r" (__d3) - : "0" (0L), "1" (word)); - - return result; -} - -#include <asm-generic/bitops/__ffs.h> -#endif #include <asm-generic/bitops/find.h> #include <asm-generic/bitops/ffs.h> diff --git a/arch/sh/include/asm/bl_bit.h b/arch/sh/include/asm/bl_bit.h index 7e3d81691ad5..5d04f2c62563 100644 --- a/arch/sh/include/asm/bl_bit.h +++ b/arch/sh/include/asm/bl_bit.h @@ -1,11 +1,2 @@ /* SPDX-License-Identifier: GPL-2.0 */ -#ifndef __ASM_SH_BL_BIT_H -#define __ASM_SH_BL_BIT_H - -#ifdef CONFIG_SUPERH32 -# include <asm/bl_bit_32.h> -#else -# include <asm/bl_bit_64.h> -#endif - -#endif /* __ASM_SH_BL_BIT_H */ +#include <asm/bl_bit_32.h> diff --git a/arch/sh/include/asm/bl_bit_64.h b/arch/sh/include/asm/bl_bit_64.h deleted file mode 100644 index aac9780fe864..000000000000 --- a/arch/sh/include/asm/bl_bit_64.h +++ /dev/null @@ -1,37 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 - * - * Copyright (C) 2000, 2001 Paolo Alberelli - * Copyright (C) 2003 Paul Mundt - * Copyright (C) 2004 Richard Curnow - */ -#ifndef __ASM_SH_BL_BIT_64_H -#define __ASM_SH_BL_BIT_64_H - -#include <asm/processor.h> - -#define SR_BL_LL 0x0000000010000000LL - -static inline void set_bl_bit(void) -{ - unsigned long long __dummy0, __dummy1 = SR_BL_LL; - - __asm__ __volatile__("getcon " __SR ", %0\n\t" - "or %0, %1, %0\n\t" - "putcon %0, " __SR "\n\t" - : "=&r" (__dummy0) - : "r" (__dummy1)); - -} - -static inline void clear_bl_bit(void) -{ - unsigned long long __dummy0, __dummy1 = ~SR_BL_LL; - - __asm__ __volatile__("getcon " __SR ", %0\n\t" - "and %0, %1, %0\n\t" - "putcon %0, " __SR "\n\t" - : "=&r" (__dummy0) - : "r" (__dummy1)); -} - -#endif /* __ASM_SH_BL_BIT_64_H */ diff --git a/arch/sh/include/asm/bugs.h b/arch/sh/include/asm/bugs.h index 030df56bfdb2..fe52abb69cea 100644 --- a/arch/sh/include/asm/bugs.h +++ b/arch/sh/include/asm/bugs.h @@ -53,10 +53,6 @@ static void __init check_bugs(void) *p++ = 's'; *p++ = 'p'; break; - case CPU_FAMILY_SH5: - *p++ = '6'; - *p++ = '4'; - break; case CPU_FAMILY_UNKNOWN: /* * Specifically use CPU_FAMILY_UNKNOWN rather than diff --git a/arch/sh/include/asm/cache_insns.h b/arch/sh/include/asm/cache_insns.h index c5a4acdc53f9..d7edd5297bd0 100644 --- a/arch/sh/include/asm/cache_insns.h +++ b/arch/sh/include/asm/cache_insns.h @@ -1,12 +1,2 @@ /* SPDX-License-Identifier: GPL-2.0 */ -#ifndef __ASM_SH_CACHE_INSNS_H -#define __ASM_SH_CACHE_INSNS_H - - -#ifdef CONFIG_SUPERH32 -# include <asm/cache_insns_32.h> -#else -# include <asm/cache_insns_64.h> -#endif - -#endif /* __ASM_SH_CACHE_INSNS_H */ +#include <asm/cache_insns_32.h> diff --git a/arch/sh/include/asm/cache_insns_64.h b/arch/sh/include/asm/cache_insns_64.h deleted file mode 100644 index ed682b987b0d..000000000000 --- a/arch/sh/include/asm/cache_insns_64.h +++ /dev/null @@ -1,20 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 - * - * Copyright (C) 2000, 2001 Paolo Alberelli - * Copyright (C) 2003 Paul Mundt - * Copyright (C) 2004 Richard Curnow - */ -#ifndef __ASM_SH_CACHE_INSNS_64_H -#define __ASM_SH_CACHE_INSNS_64_H - -#define __icbi(addr) __asm__ __volatile__ ( "icbi %0, 0\n\t" : : "r" (addr)) -#define __ocbp(addr) __asm__ __volatile__ ( "ocbp %0, 0\n\t" : : "r" (addr)) -#define __ocbi(addr) __asm__ __volatile__ ( "ocbi %0, 0\n\t" : : "r" (addr)) -#define __ocbwb(addr) __asm__ __volatile__ ( "ocbwb %0, 0\n\t" : : "r" (addr)) - -static inline reg_size_t register_align(void *val) -{ - return (unsigned long long)(signed long long)(signed long)val; -} - -#endif /* __ASM_SH_CACHE_INSNS_64_H */ diff --git a/arch/sh/include/asm/checksum.h b/arch/sh/include/asm/checksum.h index a460a108969d..00e39dd0d146 100644 --- a/arch/sh/include/asm/checksum.h +++ b/arch/sh/include/asm/checksum.h @@ -1,6 +1,2 @@ /* SPDX-License-Identifier: GPL-2.0 */ -#ifdef CONFIG_SUPERH32 -# include <asm/checksum_32.h> -#else -# include <asm-generic/checksum.h> -#endif +#include <asm/checksum_32.h> diff --git a/arch/sh/include/asm/elf.h b/arch/sh/include/asm/elf.h index 5ec8db1ddc20..7661fb5d548a 100644 --- a/arch/sh/include/asm/elf.h +++ b/arch/sh/include/asm/elf.h @@ -133,28 +133,6 @@ typedef struct user_fpu_struct elf_fpregset_t; #define ELF_PLATFORM (utsname()->machine) -#ifdef __SH5__ -#define ELF_PLAT_INIT(_r, load_addr) \ - do { _r->regs[0]=0; _r->regs[1]=0; _r->regs[2]=0; _r->regs[3]=0; \ - _r->regs[4]=0; _r->regs[5]=0; _r->regs[6]=0; _r->regs[7]=0; \ - _r->regs[8]=0; _r->regs[9]=0; _r->regs[10]=0; _r->regs[11]=0; \ - _r->regs[12]=0; _r->regs[13]=0; _r->regs[14]=0; _r->regs[15]=0; \ - _r->regs[16]=0; _r->regs[17]=0; _r->regs[18]=0; _r->regs[19]=0; \ - _r->regs[20]=0; _r->regs[21]=0; _r->regs[22]=0; _r->regs[23]=0; \ - _r->regs[24]=0; _r->regs[25]=0; _r->regs[26]=0; _r->regs[27]=0; \ - _r->regs[28]=0; _r->regs[29]=0; _r->regs[30]=0; _r->regs[31]=0; \ - _r->regs[32]=0; _r->regs[33]=0; _r->regs[34]=0; _r->regs[35]=0; \ - _r->regs[36]=0; _r->regs[37]=0; _r->regs[38]=0; _r->regs[39]=0; \ - _r->regs[40]=0; _r->regs[41]=0; _r->regs[42]=0; _r->regs[43]=0; \ - _r->regs[44]=0; _r->regs[45]=0; _r->regs[46]=0; _r->regs[47]=0; \ - _r->regs[48]=0; _r->regs[49]=0; _r->regs[50]=0; _r->regs[51]=0; \ - _r->regs[52]=0; _r->regs[53]=0; _r->regs[54]=0; _r->regs[55]=0; \ - _r->regs[56]=0; _r->regs[57]=0; _r->regs[58]=0; _r->regs[59]=0; \ - _r->regs[60]=0; _r->regs[61]=0; _r->regs[62]=0; \ - _r->tregs[0]=0; _r->tregs[1]=0; _r->tregs[2]=0; _r->tregs[3]=0; \ - _r->tregs[4]=0; _r->tregs[5]=0; _r->tregs[6]=0; _r->tregs[7]=0; \ - _r->sr = SR_FD | SR_MMU; } while (0) -#else #define ELF_PLAT_INIT(_r, load_addr) \ do { _r->regs[0]=0; _r->regs[1]=0; _r->regs[2]=0; _r->regs[3]=0; \ _r->regs[4]=0; _r->regs[5]=0; _r->regs[6]=0; _r->regs[7]=0; \ @@ -182,7 +160,6 @@ do { \ _r->regs[14] = 0; \ _r->sr = SR_FD; \ } while (0) -#endif #define SET_PERSONALITY(ex) \ set_personality(PER_LINUX_32BIT | (current->personality & (~PER_MASK))) diff --git a/arch/sh/include/asm/extable.h b/arch/sh/include/asm/extable.h index ed46f8bebb9f..5658d2bae372 100644 --- a/arch/sh/include/asm/extable.h +++ b/arch/sh/include/asm/extable.h @@ -4,8 +4,4 @@ #include <asm-generic/extable.h> -#if defined(CONFIG_SUPERH64) && defined(CONFIG_MMU) -#define ARCH_HAS_SEARCH_EXTABLE -#endif - #endif diff --git a/arch/sh/include/asm/fixmap.h b/arch/sh/include/asm/fixmap.h index e30348c58073..f38adc189b83 100644 --- a/arch/sh/include/asm/fixmap.h +++ b/arch/sh/include/asm/fixmap.h @@ -83,11 +83,7 @@ extern void __clear_fixmap(enum fixed_addresses idx, pgprot_t flags); * the start of the fixmap, and leave one page empty * at the top of mem.. */ -#ifdef CONFIG_SUPERH32 #define FIXADDR_TOP (P4SEG - PAGE_SIZE) -#else -#define FIXADDR_TOP ((unsigned long)(-PAGE_SIZE)) -#endif #define FIXADDR_SIZE (__end_of_fixed_addresses << PAGE_SHIFT) #define FIXADDR_START (FIXADDR_TOP - FIXADDR_SIZE) diff --git a/arch/sh/include/asm/io.h b/arch/sh/include/asm/io.h index b42228906eaf..3924d91e0fa0 100644 --- a/arch/sh/include/asm/io.h +++ b/arch/sh/include/asm/io.h @@ -115,12 +115,8 @@ static inline void pfx##reads##bwlq(volatile void __iomem *mem, \ __BUILD_MEMORY_STRING(__raw_, b, u8) __BUILD_MEMORY_STRING(__raw_, w, u16) -#ifdef CONFIG_SUPERH32 void __raw_writesl(void __iomem *addr, const void *data, int longlen); void __raw_readsl(const void __iomem *addr, void *data, int longlen); -#else -__BUILD_MEMORY_STRING(__raw_, l, u32) -#endif __BUILD_MEMORY_STRING(__raw_, q, u64) diff --git a/arch/sh/include/asm/irq.h b/arch/sh/include/asm/irq.h index 8065a3222e19..6d44c32ef047 100644 --- a/arch/sh/include/asm/irq.h +++ b/arch/sh/include/asm/irq.h @@ -66,8 +66,5 @@ extern void irq_finish(unsigned int irq); #endif #include <asm-generic/irq.h> -#ifdef CONFIG_CPU_SH5 -#include <cpu/irq.h> -#endif #endif /* __ASM_SH_IRQ_H */ diff --git a/arch/sh/include/asm/mmu_context.h b/arch/sh/include/asm/mmu_context.h index 2d09650093c7..48e67d544d53 100644 --- a/arch/sh/include/asm/mmu_context.h +++ b/arch/sh/include/asm/mmu_context.h @@ -48,11 +48,7 @@ */ #define MMU_VPN_MASK 0xfffff000 -#if defined(CONFIG_SUPERH32) #include <asm/mmu_context_32.h> -#else -#include <asm/mmu_context_64.h> -#endif /* * Get MMU context if needed. @@ -74,14 +70,6 @@ static inline void get_mmu_context(struct mm_struct *mm, unsigned int cpu) */ local_flush_tlb_all(); -#ifdef CONFIG_SUPERH64 - /* - * The SH-5 cache uses the ASIDs, requiring both the I and D - * cache to be flushed when the ASID is exhausted. Weak. - */ - flush_cache_all(); -#endif - /* * Fix version; Note that we avoid version #0 * to distinguish NO_CONTEXT. diff --git a/arch/sh/include/asm/mmu_context_64.h b/arch/sh/include/asm/mmu_context_64.h deleted file mode 100644 index bacafe0b887d..000000000000 --- a/arch/sh/include/asm/mmu_context_64.h +++ /dev/null @@ -1,75 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -#ifndef __ASM_SH_MMU_CONTEXT_64_H -#define __ASM_SH_MMU_CONTEXT_64_H - -/* - * sh64-specific mmu_context interface. - * - * Copyright (C) 2000, 2001 Paolo Alberelli - * Copyright (C) 2003 - 2007 Paul Mundt - */ -#include <cpu/registers.h> -#include <asm/cacheflush.h> - -#define SR_ASID_MASK 0xffffffffff00ffffULL -#define SR_ASID_SHIFT 16 - -/* - * Destroy context related info for an mm_struct that is about - * to be put to rest. - */ -static inline void destroy_context(struct mm_struct *mm) -{ - /* Well, at least free TLB entries */ - flush_tlb_mm(mm); -} - -static inline unsigned long get_asid(void) -{ - unsigned long long sr; - - asm volatile ("getcon " __SR ", %0\n\t" - : "=r" (sr)); - - sr = (sr >> SR_ASID_SHIFT) & MMU_CONTEXT_ASID_MASK; - return (unsigned long) sr; -} - -/* Set ASID into SR */ -static inline void set_asid(unsigned long asid) -{ - unsigned long long sr, pc; - - asm volatile ("getcon " __SR ", %0" : "=r" (sr)); - - sr = (sr & SR_ASID_MASK) | (asid << SR_ASID_SHIFT); - - /* - * It is possible that this function may be inlined and so to avoid - * the assembler reporting duplicate symbols we make use of the - * gas trick of generating symbols using numerics and forward - * reference. - */ - asm volatile ("movi 1, %1\n\t" - "shlli %1, 28, %1\n\t" - "or %0, %1, %1\n\t" - "putcon %1, " __SR "\n\t" - "putcon %0, " __SSR "\n\t" - "movi 1f, %1\n\t" - "ori %1, 1 , %1\n\t" - "putcon %1, " __SPC "\n\t" - "rte\n" - "1:\n\t" - : "=r" (sr), "=r" (pc) : "0" (sr)); -} - -/* arch/sh/kernel/cpu/sh5/entry.S */ -extern unsigned long switch_and_save_asid(unsigned long new_asid); - -/* No spare register to twiddle, so use a software cache */ -extern pgd_t *mmu_pdtp_cache; - -#define set_TTB(pgd) (mmu_pdtp_cache = (pgd)) -#define get_TTB() (mmu_pdtp_cache) - -#endif /* __ASM_SH_MMU_CONTEXT_64_H */ diff --git a/arch/sh/include/asm/page.h b/arch/sh/include/asm/page.h index ea8d68f58e39..eca5daa43b93 100644 --- a/arch/sh/include/asm/page.h +++ b/arch/sh/include/asm/page.h @@ -35,8 +35,6 @@ #define HPAGE_SHIFT 22 #elif defined(CONFIG_HUGETLB_PAGE_SIZE_64MB) #define HPAGE_SHIFT 26 -#elif defined(CONFIG_HUGETLB_PAGE_SIZE_512MB) -#define HPAGE_SHIFT 29 #endif #ifdef CONFIG_HUGETLB_PAGE @@ -82,18 +80,12 @@ typedef struct { unsigned long long pgd; } pgd_t; ((x).pte_low | ((unsigned long long)(x).pte_high << 32)) #define __pte(x) \ ({ pte_t __pte = {(x), ((unsigned long long)(x)) >> 32}; __pte; }) -#elif defined(CONFIG_SUPERH32) +#else typedef struct { unsigned long pte_low; } pte_t; typedef struct { unsigned long pgprot; } pgprot_t; typedef struct { unsigned long pgd; } pgd_t; #define pte_val(x) ((x).pte_low) #define __pte(x) ((pte_t) { (x) } ) -#else -typedef struct { unsigned long long pte_low; } pte_t; -typedef struct { unsigned long long pgprot; } pgprot_t; -typedef struct { unsigned long pgd; } pgd_t; -#define pte_val(x) ((x).pte_low) -#define __pte(x) ((pte_t) { (x) } ) #endif #define pgd_val(x) ((x).pgd) @@ -191,15 +183,4 @@ typedef struct page *pgtable_t; */ #define ARCH_DMA_MINALIGN L1_CACHE_BYTES -#ifdef CONFIG_SUPERH64 -/* - * While BYTES_PER_WORD == 4 on the current sh64 ABI, GCC will still - * happily generate {ld/st}.q pairs, requiring us to have 8-byte - * alignment to avoid traps. The kmalloc alignment is guaranteed by - * virtue of L1_CACHE_BYTES, requiring this to only be special cased - * for slab caches. - */ -#define ARCH_SLAB_MINALIGN 8 -#endif - #endif /* __ASM_SH_PAGE_H */ diff --git a/arch/sh/include/asm/pgtable.h b/arch/sh/include/asm/pgtable.h index cbd0f3c55a0c..02d936406c6e 100644 --- a/arch/sh/include/asm/pgtable.h +++ b/arch/sh/include/asm/pgtable.h @@ -76,18 +76,10 @@ static inline unsigned long phys_addr_mask(void) #define PTE_PHYS_MASK (phys_addr_mask() & PAGE_MASK) #define PTE_FLAGS_MASK (~(PTE_PHYS_MASK) << PAGE_SHIFT) -#ifdef CONFIG_SUPERH32 #define VMALLOC_START (P3SEG) -#else -#define VMALLOC_START (0xf0000000) -#endif #define VMALLOC_END (FIXADDR_START-2*PAGE_SIZE) -#if defined(CONFIG_SUPERH32) #include <asm/pgtable_32.h> -#else -#include <asm/pgtable_64.h> -#endif /* * SH-X and lower (legacy) SuperH parts (SH-3, SH-4, some SH-4A) can't do page @@ -159,15 +151,6 @@ static inline bool pte_access_permitted(pte_t pte, bool write) prot |= _PAGE_EXT(_PAGE_EXT_KERN_WRITE | _PAGE_EXT_USER_WRITE); return __pte_access_permitted(pte, prot); } -#elif defined(CONFIG_SUPERH64) -static inline bool pte_access_permitted(pte_t pte, bool write) -{ - u64 prot = _PAGE_PRESENT | _PAGE_USER | _PAGE_READ; - - if (write) - prot |= _PAGE_WRITE; - return __pte_access_permitted(pte, prot); -} #else static inline bool pte_access_permitted(pte_t pte, bool write) { diff --git a/arch/sh/include/asm/pgtable_64.h b/arch/sh/include/asm/pgtable_64.h deleted file mode 100644 index 1778bc5971e7..000000000000 --- a/arch/sh/include/asm/pgtable_64.h +++ /dev/null @@ -1,307 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -#ifndef __ASM_SH_PGTABLE_64_H -#define __ASM_SH_PGTABLE_64_H - -/* - * include/asm-sh/pgtable_64.h - * - * This file contains the functions and defines necessary to modify and use - * the SuperH page table tree. - * - * Copyright (C) 2000, 2001 Paolo Alberelli - * Copyright (C) 2003, 2004 Paul Mundt - * Copyright (C) 2003, 2004 Richard Curnow - */ -#include <linux/threads.h> -#include <asm/processor.h> -#include <asm/page.h> - -/* - * Error outputs. - */ -#define pte_ERROR(e) \ - printk("%s:%d: bad pte %016Lx.\n", __FILE__, __LINE__, pte_val(e)) -#define pgd_ERROR(e) \ - printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e)) - -/* - * Table setting routines. Used within arch/mm only. - */ -#define set_pmd(pmdptr, pmdval) (*(pmdptr) = pmdval) - -static __inline__ void set_pte(pte_t *pteptr, pte_t pteval) -{ - unsigned long long x = ((unsigned long long) pteval.pte_low); - unsigned long long *xp = (unsigned long long *) pteptr; - /* - * Sign-extend based on NPHYS. - */ - *(xp) = (x & NPHYS_SIGN) ? (x | NPHYS_MASK) : x; -} -#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval) - -/* - * PGD defines. Top level. - */ - -/* To find an entry in a generic PGD. */ -#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1)) -#define __pgd_offset(address) pgd_index(address) -#define pgd_offset(mm, address) ((mm)->pgd+pgd_index(address)) - -/* To find an entry in a kernel PGD. */ -#define pgd_offset_k(address) pgd_offset(&init_mm, address) - -#define __pud_offset(address) (((address) >> PUD_SHIFT) & (PTRS_PER_PUD-1)) -#define __pmd_offset(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1)) - -/* - * PMD level access routines. Same notes as above. - */ -#define _PMD_EMPTY 0x0 -/* Either the PMD is empty or present, it's not paged out */ -#define pmd_present(pmd_entry) (pmd_val(pmd_entry) & _PAGE_PRESENT) -#define pmd_clear(pmd_entry_p) (set_pmd((pmd_entry_p), __pmd(_PMD_EMPTY))) -#define pmd_none(pmd_entry) (pmd_val((pmd_entry)) == _PMD_EMPTY) -#define pmd_bad(pmd_entry) ((pmd_val(pmd_entry) & (~PAGE_MASK & ~_PAGE_USER)) != _KERNPG_TABLE) - -#define pmd_page_vaddr(pmd_entry) \ - ((unsigned long) __va(pmd_val(pmd_entry) & PAGE_MASK)) - -#define pmd_page(pmd) \ - (virt_to_page(pmd_val(pmd))) - -/* PMD to PTE dereferencing */ -#define pte_index(address) \ - ((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)) - -#define __pte_offset(address) pte_index(address) - -#define pte_offset_kernel(dir, addr) \ - ((pte_t *) ((pmd_val(*(dir))) & PAGE_MASK) + pte_index((addr))) - -#define pte_offset_map(dir,addr) pte_offset_kernel(dir, addr) -#define pte_unmap(pte) do { } while (0) - -#ifndef __ASSEMBLY__ -/* - * PTEL coherent flags. - * See Chapter 17 ST50 CPU Core Volume 1, Architecture. - */ -/* The bits that are required in the SH-5 TLB are placed in the h/w-defined - positions, to avoid expensive bit shuffling on every refill. The remaining - bits are used for s/w purposes and masked out on each refill. - - Note, the PTE slots are used to hold data of type swp_entry_t when a page is - swapped out. Only the _PAGE_PRESENT flag is significant when the page is - swapped out, and it must be placed so that it doesn't overlap either the - type or offset fields of swp_entry_t. For x86, offset is at [31:8] and type - at [6:1], with _PAGE_PRESENT at bit 0 for both pte_t and swp_entry_t. This - scheme doesn't map to SH-5 because bit [0] controls cacheability. So bit - [2] is used for _PAGE_PRESENT and the type field of swp_entry_t is split - into 2 pieces. That is handled by SWP_ENTRY and SWP_TYPE below. */ -#define _PAGE_WT 0x001 /* CB0: if cacheable, 1->write-thru, 0->write-back */ -#define _PAGE_DEVICE 0x001 /* CB0: if uncacheable, 1->device (i.e. no write-combining or reordering at bus level) */ -#define _PAGE_CACHABLE 0x002 /* CB1: uncachable/cachable */ -#define _PAGE_PRESENT 0x004 /* software: page referenced */ -#define _PAGE_SIZE0 0x008 /* SZ0-bit : size of page */ -#define _PAGE_SIZE1 0x010 /* SZ1-bit : size of page */ -#define _PAGE_SHARED 0x020 /* software: reflects PTEH's SH */ -#define _PAGE_READ 0x040 /* PR0-bit : read access allowed */ -#define _PAGE_EXECUTE 0x080 /* PR1-bit : execute access allowed */ -#define _PAGE_WRITE 0x100 /* PR2-bit : write access allowed */ -#define _PAGE_USER 0x200 /* PR3-bit : user space access allowed */ -#define _PAGE_DIRTY 0x400 /* software: page accessed in write */ -#define _PAGE_ACCESSED 0x800 /* software: page referenced */ |