diff options
Diffstat (limited to 'arch/mips')
121 files changed, 739 insertions, 1147 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 66e94278bd10..f8f3dbdd7ad5 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -486,9 +486,11 @@ config MACH_LOONGSON64 select SYS_SUPPORTS_HIGHMEM select SYS_SUPPORTS_LITTLE_ENDIAN select SYS_SUPPORTS_ZBOOT - select LOONGSON_MC146818 select ZONE_DMA32 select NUMA + select COMMON_CLK + select USE_OF + select BUILTIN_DTB help This enables the support of Loongson-2/3 family of machines. @@ -973,6 +975,9 @@ config CAVIUM_OCTEON_SOC select SYS_HAS_EARLY_PRINTK select SYS_HAS_CPU_CAVIUM_OCTEON select HAVE_PCI + select HAVE_PLAT_DELAY + select HAVE_PLAT_FW_INIT_CMDLINE + select HAVE_PLAT_MEMCPY select ZONE_DMA32 select HOLES_IN_ZONE select GPIOLIB @@ -1229,6 +1234,15 @@ config GENERIC_ISA_DMA_SUPPORT_BROKEN bool select GENERIC_ISA_DMA +config HAVE_PLAT_DELAY + bool + +config HAVE_PLAT_FW_INIT_CMDLINE + bool + +config HAVE_PLAT_MEMCPY + bool + config ISA_DMA_API bool @@ -2676,7 +2690,7 @@ config NUMA Say Y to compile the kernel to support NUMA (Non-Uniform Memory Access). This option improves performance on systems with more than two nodes; on two node systems it is generally better to - leave it disabled; on single node systems disable this option + leave it disabled; on single node systems leave this option disabled. config SYS_SUPPORTS_NUMA @@ -2758,6 +2772,17 @@ config HW_PERF_EVENTS Enable hardware performance counter support for perf events. If disabled, perf events will use software events only. +config DMI + bool "Enable DMI scanning" + depends on MACH_LOONGSON64 + select DMI_SCAN_MACHINE_NON_EFI_FALLBACK + default y + help + Enabled scanning of DMI to identify machine quirks. Say Y + here unless you have verified that your setup is not + affected by entries in the DMI blacklist. Required by PNP + BIOS code. + config SMP bool "Multi-Processing support" depends on SYS_SUPPORTS_SMP @@ -3070,7 +3095,7 @@ endchoice choice prompt "Kernel command line type" if !CMDLINE_OVERRIDE default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \ - !MIPS_MALTA && \ + !MACH_LOONGSON64 && !MIPS_MALTA && \ !CAVIUM_OCTEON_SOC default MIPS_CMDLINE_FROM_BOOTLOADER diff --git a/arch/mips/alchemy/common/time.c b/arch/mips/alchemy/common/time.c index 3a21a6a18da7..d794ffb67412 100644 --- a/arch/mips/alchemy/common/time.c +++ b/arch/mips/alchemy/common/time.c @@ -72,13 +72,6 @@ static struct clock_event_device au1x_rtcmatch2_clockdev = { .cpumask = cpu_possible_mask, }; -static struct irqaction au1x_rtcmatch2_irqaction = { - .handler = au1x_rtcmatch2_irq, - .flags = IRQF_TIMER, - .name = "timer", - .dev_id = &au1x_rtcmatch2_clockdev, -}; - static int __init alchemy_time_init(unsigned int m2int) { struct clock_event_device *cd = &au1x_rtcmatch2_clockdev; @@ -130,7 +123,9 @@ static int __init alchemy_time_init(unsigned int m2int) cd->min_delta_ns = clockevent_delta2ns(9, cd); cd->min_delta_ticks = 9; /* ~0.28ms */ clockevents_register_device(cd); - setup_irq(m2int, &au1x_rtcmatch2_irqaction); + if (request_irq(m2int, au1x_rtcmatch2_irq, IRQF_TIMER, "timer", + &au1x_rtcmatch2_clockdev)) + pr_err("Failed to register timer interrupt\n"); printk(KERN_INFO "Alchemy clocksource installed\n"); diff --git a/arch/mips/ar7/irq.c b/arch/mips/ar7/irq.c index 93a331fe0641..f0a7942d393e 100644 --- a/arch/mips/ar7/irq.c +++ b/arch/mips/ar7/irq.c @@ -83,12 +83,6 @@ static struct irq_chip ar7_sec_irq_type = { .irq_ack = ar7_ack_sec_irq, }; -static struct irqaction ar7_cascade_action = { - .handler = no_action, - .name = "AR7 cascade interrupt", - .flags = IRQF_NO_THREAD, -}; - static void __init ar7_irq_init(int base) { int i; @@ -116,8 +110,14 @@ static void __init ar7_irq_init(int base) handle_level_irq); } - setup_irq(2, &ar7_cascade_action); - setup_irq(ar7_irq_base, &ar7_cascade_action); + if (request_irq(2, no_action, IRQF_NO_THREAD, "AR7 cascade interrupt", + NULL)) + pr_err("Failed to request irq 2 (AR7 cascade interrupt)\n"); + if (request_irq(ar7_irq_base, no_action, IRQF_NO_THREAD, + "AR7 cascade interrupt", NULL)) { + pr_err("Failed to request irq %d (AR7 cascade interrupt)\n", + ar7_irq_base); + } set_c0_status(IE_IRQ0); } diff --git a/arch/mips/ath25/ar2315.c b/arch/mips/ath25/ar2315.c index 24f619199ee7..e7b53e3960c8 100644 --- a/arch/mips/ath25/ar2315.c +++ b/arch/mips/ath25/ar2315.c @@ -64,11 +64,6 @@ static irqreturn_t ar2315_ahb_err_handler(int cpl, void *dev_id) return IRQ_HANDLED; } -static struct irqaction ar2315_ahb_err_interrupt = { - .handler = ar2315_ahb_err_handler, - .name = "ar2315-ahb-error", -}; - static void ar2315_misc_irq_handler(struct irq_desc *desc) { u32 pending = ar2315_rst_reg_read(AR2315_ISR) & @@ -159,7 +154,9 @@ void __init ar2315_arch_init_irq(void) panic("Failed to add IRQ domain"); irq = irq_create_mapping(domain, AR2315_MISC_IRQ_AHB); - setup_irq(irq, &ar2315_ahb_err_interrupt); + if (request_irq(irq, ar2315_ahb_err_handler, 0, "ar2315-ahb-error", + NULL)) + pr_err("Failed to register ar2315-ahb-error interrupt\n"); irq_set_chained_handler_and_data(AR2315_IRQ_MISC, ar2315_misc_irq_handler, domain); diff --git a/arch/mips/ath25/ar5312.c b/arch/mips/ath25/ar5312.c index 47f3e98974fc..42bf2afb4765 100644 --- a/arch/mips/ath25/ar5312.c +++ b/ |