diff options
Diffstat (limited to 'arch/blackfin/mach-bf537')
19 files changed, 506 insertions, 325 deletions
diff --git a/arch/blackfin/mach-bf537/boards/Kconfig b/arch/blackfin/mach-bf537/boards/Kconfig index 44132fda63be..a44bf3a1816e 100644 --- a/arch/blackfin/mach-bf537/boards/Kconfig +++ b/arch/blackfin/mach-bf537/boards/Kconfig @@ -39,4 +39,10 @@ config CAMSIG_MINOTAUR help Board supply package for CSP Minotaur +config DNP5370 + bool "SSV Dil/NetPC DNP/5370" + depends on (BF537) + help + Board supply package for DNP/5370 DIL64 module + endchoice diff --git a/arch/blackfin/mach-bf537/boards/Makefile b/arch/blackfin/mach-bf537/boards/Makefile index 7e6aa4e5b205..fe42258fe1f4 100644 --- a/arch/blackfin/mach-bf537/boards/Makefile +++ b/arch/blackfin/mach-bf537/boards/Makefile @@ -8,3 +8,4 @@ obj-$(CONFIG_BFIN537_BLUETECHNIX_CM_U) += cm_bf537u.o obj-$(CONFIG_BFIN537_BLUETECHNIX_TCM) += tcm_bf537.o obj-$(CONFIG_PNAV10) += pnav10.o obj-$(CONFIG_CAMSIG_MINOTAUR) += minotaur.o +obj-$(CONFIG_DNP5370) += dnp5370.o diff --git a/arch/blackfin/mach-bf537/boards/cm_bf537e.c b/arch/blackfin/mach-bf537/boards/cm_bf537e.c index 836698c4ee54..2c776e188a94 100644 --- a/arch/blackfin/mach-bf537/boards/cm_bf537e.c +++ b/arch/blackfin/mach-bf537/boards/cm_bf537e.c @@ -373,7 +373,7 @@ static struct resource bfin_uart0_resources[] = { #endif }; -unsigned short bfin_uart0_peripherals[] = { +static unsigned short bfin_uart0_peripherals[] = { P_UART0_TX, P_UART0_RX, 0 }; @@ -434,7 +434,7 @@ static struct resource bfin_uart1_resources[] = { #endif }; -unsigned short bfin_uart1_peripherals[] = { +static unsigned short bfin_uart1_peripherals[] = { P_UART1_TX, P_UART1_RX, 0 }; @@ -545,9 +545,9 @@ static struct resource bfin_sport0_uart_resources[] = { }, }; -unsigned short bfin_sport0_peripherals[] = { +static unsigned short bfin_sport0_peripherals[] = { P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS, - P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0 + P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0 }; static struct platform_device bfin_sport0_uart_device = { @@ -579,9 +579,9 @@ static struct resource bfin_sport1_uart_resources[] = { }, }; -unsigned short bfin_sport1_peripherals[] = { +static unsigned short bfin_sport1_peripherals[] = { P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS, - P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0 + P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0 }; static struct platform_device bfin_sport1_uart_device = { diff --git a/arch/blackfin/mach-bf537/boards/cm_bf537u.c b/arch/blackfin/mach-bf537/boards/cm_bf537u.c index 2a85670273cb..085661175ec7 100644 --- a/arch/blackfin/mach-bf537/boards/cm_bf537u.c +++ b/arch/blackfin/mach-bf537/boards/cm_bf537u.c @@ -356,7 +356,7 @@ static struct resource bfin_uart0_resources[] = { }, }; -unsigned short bfin_uart0_peripherals[] = { +static unsigned short bfin_uart0_peripherals[] = { P_UART0_TX, P_UART0_RX, 0 }; @@ -399,7 +399,7 @@ static struct resource bfin_uart1_resources[] = { }, }; -unsigned short bfin_uart1_peripherals[] = { +static unsigned short bfin_uart1_peripherals[] = { P_UART1_TX, P_UART1_RX, 0 }; @@ -510,9 +510,9 @@ static struct resource bfin_sport0_uart_resources[] = { }, }; -unsigned short bfin_sport0_peripherals[] = { +static unsigned short bfin_sport0_peripherals[] = { P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS, - P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0 + P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0 }; static struct platform_device bfin_sport0_uart_device = { @@ -544,9 +544,9 @@ static struct resource bfin_sport1_uart_resources[] = { }, }; -unsigned short bfin_sport1_peripherals[] = { +static unsigned short bfin_sport1_peripherals[] = { P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS, - P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0 + P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0 }; static struct platform_device bfin_sport1_uart_device = { diff --git a/arch/blackfin/mach-bf537/boards/dnp5370.c b/arch/blackfin/mach-bf537/boards/dnp5370.c new file mode 100644 index 000000000000..e1e9ea02ad89 --- /dev/null +++ b/arch/blackfin/mach-bf537/boards/dnp5370.c @@ -0,0 +1,418 @@ +/* + * This is the configuration for SSV Dil/NetPC DNP/5370 board. + * + * DIL module: http://www.dilnetpc.com/dnp0086.htm + * SK28 (starter kit): http://www.dilnetpc.com/dnp0088.htm + * + * Copyright 2010 3ality Digital Systems + * Copyright 2005 National ICT Australia (NICTA) + * Copyright 2004-2006 Analog Devices Inc. + * + * Licensed under the GPL-2 or later. + */ + +#include <linux/device.h> +#include <linux/kernel.h> +#include <linux/platform_device.h> +#include <linux/io.h> +#include <linux/mtd/mtd.h> +#include <linux/mtd/nand.h> +#include <linux/mtd/partitions.h> +#include <linux/mtd/plat-ram.h> +#include <linux/mtd/physmap.h> +#include <linux/spi/spi.h> +#include <linux/spi/flash.h> +#include <linux/irq.h> +#include <linux/interrupt.h> +#include <linux/i2c.h> +#include <linux/spi/mmc_spi.h> +#include <linux/phy.h> +#include <asm/dma.h> +#include <asm/bfin5xx_spi.h> +#include <asm/reboot.h> +#include <asm/portmux.h> +#include <asm/dpmc.h> + +/* + * Name the Board for the /proc/cpuinfo + */ +const char bfin_board_name[] = "DNP/5370"; +#define FLASH_MAC 0x202f0000 +#define CONFIG_MTD_PHYSMAP_LEN 0x300000 + +#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) +static struct platform_device rtc_device = { + .name = "rtc-bfin", + .id = -1, +}; +#endif + +#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) +#include <linux/bfin_mac.h> +static const unsigned short bfin_mac_peripherals[] = P_RMII0; + +static struct bfin_phydev_platform_data bfin_phydev_data[] = { + { + .addr = 1, + .irq = PHY_POLL, /* IRQ_MAC_PHYINT */ + }, +}; + +static struct bfin_mii_bus_platform_data bfin_mii_bus_data = { + .phydev_number = 1, + .phydev_data = bfin_phydev_data, + .phy_mode = PHY_INTERFACE_MODE_RMII, + .mac_peripherals = bfin_mac_peripherals, +}; + +static struct platform_device bfin_mii_bus = { + .name = "bfin_mii_bus", + .dev = { + .platform_data = &bfin_mii_bus_data, + } +}; + +static struct platform_device bfin_mac_device = { + .name = "bfin_mac", + .dev = { + .platform_data = &bfin_mii_bus, + } +}; +#endif + +#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE) +static struct mtd_partition asmb_flash_partitions[] = { + { + .name = "bootloader(nor)", + .size = 0x30000, + .offset = 0, + }, { + .name = "linux kernel and rootfs(nor)", + .size = 0x300000 - 0x30000 - 0x10000, + .offset = MTDPART_OFS_APPEND, + }, { + .name = "MAC address(nor)", + .size = 0x10000, + .offset = MTDPART_OFS_APPEND, + .mask_flags = MTD_WRITEABLE, + } +}; + +static struct physmap_flash_data asmb_flash_data = { + .width = 1, + .parts = asmb_flash_partitions, + .nr_parts = ARRAY_SIZE(asmb_flash_partitions), +}; + +static struct resource asmb_flash_resource = { + .start = 0x20000000, + .end = 0x202fffff, + .flags = IORESOURCE_MEM, +}; + +/* 4 MB NOR flash attached to async memory banks 0-2, + * therefore only 3 MB visible. + */ +static struct platform_device asmb_flash_device = { + .name = "physmap-flash", + .id = 0, + .dev = { + .platform_data = &asmb_flash_data, + }, + .num_resources = 1, + .resource = &asmb_flash_resource, +}; +#endif + +#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) + +#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) + +#define MMC_SPI_CARD_DETECT_INT IRQ_PF5 + +static int bfin_mmc_spi_init(struct device *dev, + irqreturn_t (*detect_int)(int, void *), void *data) +{ + return request_irq(MMC_SPI_CARD_DETECT_INT, detect_int, + IRQF_TRIGGER_FALLING, "mmc-spi-detect", data); +} + +static void bfin_mmc_spi_exit(struct device *dev, void *data) +{ + free_irq(MMC_SPI_CARD_DETECT_INT, data); +} + +static struct bfin5xx_spi_chip mmc_spi_chip_info = { + .enable_dma = 0, /* use no dma transfer with this chip*/ + .bits_per_word = 8, +}; + +static struct mmc_spi_platform_data bfin_mmc_spi_pdata = { + .init = bfin_mmc_spi_init, + .exit = bfin_mmc_spi_exit, + .detect_delay = 100, /* msecs */ +}; +#endif + +#if defined(CONFIG_MTD_DATAFLASH) || defined(CONFIG_MTD_DATAFLASH_MODULE) +/* This mapping is for at45db642 it has 1056 page size, + * partition size and offset should be page aligned + */ +static struct mtd_partition bfin_spi_dataflash_partitions[] = { + { + .name = "JFFS2 dataflash(nor)", +#ifdef CONFIG_MTD_PAGESIZE_1024 + .offset = 0x40000, + .size = 0x7C0000, +#else + .offset = 0x0, + .size = 0x840000, +#endif + } +}; + +static struct flash_platform_data bfin_spi_dataflash_data = { + .name = "mtd_dataflash", + .parts = bfin_spi_dataflash_partitions, + .nr_parts = ARRAY_SIZE(bfin_spi_dataflash_partitions), + .type = "mtd_dataflash", +}; + +static struct bfin5xx_spi_chip spi_dataflash_chip_info = { + .enable_dma = 0, /* use no dma transfer with this chip*/ + .bits_per_word = 8, +}; +#endif + +static struct spi_board_info bfin_spi_board_info[] __initdata = { +/* SD/MMC card reader at SPI bus */ +#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE) + { + .modalias = "mmc_spi", + .max_speed_hz = 20000000, + .bus_num = 0, + .chip_select = 1, + .platform_data = &bfin_mmc_spi_pdata, + .controller_data = &mmc_spi_chip_info, + .mode = SPI_MODE_3, + }, +#endif + +/* 8 Megabyte Atmel NOR flash chip at SPI bus */ +#if defined(CONFIG_MTD_DATAFLASH) || defined(CONFIG_MTD_DATAFLASH_MODULE) + { + .modalias = "mtd_dataflash", + .max_speed_hz = 16700000, + .bus_num = 0, + .chip_select = 2, + .platform_data = &bfin_spi_dataflash_data, + .controller_data = &spi_dataflash_chip_info, + .mode = SPI_MODE_3, /* SPI_CPHA and SPI_CPOL */ + }, +#endif +}; + +/* SPI controller data */ +/* SPI (0) */ +static struct resource bfin_spi0_resource[] = { + [0] = { + .start = SPI0_REGBASE, + .end = SPI0_REGBASE + 0xFF, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = CH_SPI, + .end = CH_SPI, + .flags = IORESOURCE_DMA, + }, + [2] = { + .start = IRQ_SPI, + .end = IRQ_SPI, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct bfin5xx_spi_master spi_bfin_master_info = { + .num_chipselect = 8, + .enable_dma = 1, /* master has the ability to do dma transfer */ + .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0}, +}; + +static struct platform_device spi_bfin_master_device = { + .name = "bfin-spi", + .id = 0, /* Bus number */ + .num_resources = ARRAY_SIZE(bfin_spi0_resource), + .resource = bfin_spi0_resource, + .dev = { + .platform_data = &spi_bfin_master_info, /* Passed to driver */ + }, +}; +#endif + +#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) +#ifdef CONFIG_SERIAL_BFIN_UART0 +static struct resource bfin_uart0_resources[] = { + { + .start = UART0_THR, + .end = UART0_GCTL+2, + .flags = IORESOURCE_MEM, + }, + { + .start = IRQ_UART0_RX, + .end = IRQ_UART0_RX+1, + .flags = IORESOURCE_IRQ, + }, + { + .start = IRQ_UART0_ERROR, + .end = IRQ_UART0_ERROR, + .flags = IORESOURCE_IRQ, + }, + { + .start = CH_UART0_TX, + .end = CH_UART0_TX, + .flags = IORESOURCE_DMA, + }, + { + .start = CH_UART0_RX, + .end = CH_UART0_RX, + .flags = IORESOURCE_DMA, + }, +}; + +static unsigned short bfin_uart0_peripherals[] = { + P_UART0_TX, P_UART0_RX, 0 +}; + +static struct platform_device bfin_uart0_device = { + .name = "bfin-uart", + .id = 0, + .num_resources = ARRAY_SIZE(bfin_uart0_resources), + .resource = bfin_uart0_resources, + .dev = { + .platform_data = &bfin_uart0_peripherals, /* Passed to driver */ + }, +}; +#endif + +#ifdef CONFIG_SERIAL_BFIN_UART1 +static struct resource bfin_uart1_resources[] = { + { + .start = UART1_THR, + .end = UART1_GCTL+2, + .flags = IORESOURCE_MEM, + }, + { + .start = IRQ_UART1_RX, + .end = IRQ_UART1_RX+1, + .flags = IORESOURCE_IRQ, + }, + { + .start = IRQ_UART1_ERROR, + .end = IRQ_UART1_ERROR, + .flags = IORESOURCE_IRQ, + }, + { + .start = CH_UART1_TX, + .end = CH_UART1_TX, + .flags = IORESOURCE_DMA, + }, + { + .start = CH_UART1_RX, + .end = CH_UART1_RX, + .flags = IORESOURCE_DMA, + }, +}; + +static unsigned short bfin_uart1_peripherals[] = { + P_UART1_TX, P_UART1_RX, 0 +}; + +static struct platform_device bfin_uart1_device = { + .name = "bfin-uart", + .id = 1, + .num_resources = ARRAY_SIZE(bfin_uart1_resources), + .resource = bfin_uart1_resources, + .dev = { + .platform_data = &bfin_uart1_peripherals, /* Passed to driver */ + }, +}; +#endif +#endif + +#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE) +static struct resource bfin_twi0_resource[] = { + [0] = { + .start = TWI0_REGBASE, + .end = TWI0_REGBASE + 0xff, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = IRQ_TWI, + .end = IRQ_TWI, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device i2c_bfin_twi_device = { + .name = "i2c-bfin-twi", + .id = 0, + .num_resources = ARRAY_SIZE(bfin_twi0_resource), + .resource = bfin_twi0_resource, +}; +#endif + +static struct platform_device *dnp5370_devices[] __initdata = { + +#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) +#ifdef CONFIG_SERIAL_BFIN_UART0 + &bfin_uart0_device, +#endif +#ifdef CONFIG_SERIAL_BFIN_UART1 + &bfin_uart1_device, +#endif +#endif + +#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE) + &asmb_flash_device, +#endif + +#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE) + &bfin_mii_bus, + &bfin_mac_device, +#endif + +#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) + &spi_bfin_master_device, +#endif + +#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE) + &i2c_bfin_twi_device, +#endif + +#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE) + &rtc_device, +#endif + +}; + +static int __init dnp5370_init(void) +{ + printk(KERN_INFO "DNP/5370: registering device resources\n"); + platform_add_devices(dnp5370_devices, ARRAY_SIZE(dnp5370_devices)); + printk(KERN_INFO "DNP/5370: registering %zu SPI slave devices\n", + ARRAY_SIZE(bfin_spi_board_info)); + spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info)); + printk(KERN_INFO "DNP/5370: MAC %pM\n", (void *)FLASH_MAC); + return 0; +} +arch_initcall(dnp5370_init); + +/* + * Currently the MAC address is saved in Flash by U-Boot + */ +void bfin_get_ether_addr(char *addr) +{ + *(u32 *)(&(addr[0])) = bfin_read32(FLASH_MAC); + *(u16 *)(&(addr[4])) = bfin_read16(FLASH_MAC + 4); +} +EXPORT_SYMBOL(bfin_get_ether_addr); diff --git a/arch/blackfin/mach-bf537/boards/minotaur.c b/arch/blackfin/mach-bf537/boards/minotaur.c index 49800518412c..bfb3671a78da 100644 --- a/arch/blackfin/mach-bf537/boards/minotaur.c +++ b/arch/blackfin/mach-bf537/boards/minotaur.c @@ -263,7 +263,7 @@ static struct resource bfin_uart0_resources[] = { }, }; -unsigned short bfin_uart0_peripherals[] = { +static unsigned short bfin_uart0_peripherals[] = { P_UART0_TX, P_UART0_RX, 0 }; @@ -306,7 +306,7 @@ static struct resource bfin_uart1_resources[] = { }, }; -unsigned short bfin_uart1_peripherals[] = { +static unsigned short bfin_uart1_peripherals[] = { P_UART1_TX, P_UART1_RX, 0 }; @@ -419,9 +419,9 @@ static struct resource bfin_sport0_uart_resources[] = { }, }; -unsigned short bfin_sport0_peripherals[] = { +static unsigned short bfin_sport0_peripherals[] = { P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS, - P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0 + P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0 }; static struct platform_device bfin_sport0_uart_device = { @@ -453,9 +453,9 @@ static struct resource bfin_sport1_uart_resources[] = { }, }; -unsigned short bfin_sport1_peripherals[] = { +static unsigned short bfin_sport1_peripherals[] = { P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS, - P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0 + P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0 }; static struct platform_device bfin_sport1_uart_device = { diff --git a/arch/blackfin/mach-bf537/boards/pnav10.c b/arch/blackfin/mach-bf537/boards/pnav10.c index b95807894e25..9389f03e3b0a 100644 --- a/arch/blackfin/mach-bf537/boards/pnav10.c +++ b/arch/blackfin/mach-bf537/boards/pnav10.c @@ -367,7 +367,7 @@ static struct resource bfin_uart0_resources[] = { }, }; -unsigned short bfin_uart0_peripherals[] = { +static unsigned short bfin_uart0_peripherals[] = { P_UART0_TX, P_UART0_RX, 0 }; @@ -410,7 +410,7 @@ static struct resource bfin_uart1_resources[] = { }, }; -unsigned short bfin_uart1_peripherals[] = { +static unsigned short bfin_uart1_peripherals[] = { P_UART1_TX, P_UART1_RX, 0 }; diff --git a/arch/blackfin/mach-bf537/boards/stamp.c b/arch/blackfin/mach-bf537/boards/stamp.c index 3aa344ce8e52..2c69785a7bbe 100644 --- a/arch/blackfin/mach-bf537/boards/stamp.c +++ b/arch/blackfin/mach-bf537/boards/stamp.c @@ -289,7 +289,7 @@ static struct platform_device isp1362_hcd_device = { #endif #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE) -unsigned short bfin_can_peripherals[] = { +static unsigned short bfin_can_peripherals[] = { P_CAN0_RX, P_CAN0_TX, 0 }; @@ -693,7 +693,7 @@ static struct bfin5xx_spi_chip ad2s90_spi_chip_info = { #endif #if defined(CONFIG_AD2S120X) || defined(CONFIG_AD2S120X_MODULE) -unsigned short ad2s120x_platform_data[] = { +static unsigned short ad2s120x_platform_data[] = { /* used as SAMPLE and RDVEL */ GPIO_PF5, GPIO_PF6, 0 }; @@ -705,7 +705,7 @@ static struct bfin5xx_spi_chip ad2s120x_spi_chip_info = { #endif #if defined(CONFIG_AD2S1210) || defined(CONFIG_AD2S1210_MODULE) -unsigned short ad2s1210_platform_data[] = { +static unsigned short ad2s1210_platform_data[] = { /* use as SAMPLE, A0, A1 */ GPIO_PF7, GPIO_PF8, GPIO_PF9, # if defined(CONFIG_AD2S1210_GPIO_INPUT) || defined(CONFIG_AD2S1210_GPIO_OUTPUT) @@ -1717,7 +1717,7 @@ static struct resource bfin_uart0_resources[] = { #endif }; -unsigned short bfin_uart0_peripherals[] = { +static unsigned short bfin_uart0_peripherals[] = { P_UART0_TX, P_UART0_RX, 0 }; @@ -1760,7 +1760,7 @@ static struct resource bfin_uart1_resources[] = { }, }; -unsigned short bfin_uart1_peripherals[] = { +static unsigned short bfin_uart1_peripherals[] = { P_UART1_TX, P_UART1_RX, 0 }; @@ -2447,9 +2447,9 @@ static struct resource bfin_sport0_uart_resources[] = { }, }; -unsigned short bfin_sport0_peripherals[] = { +static unsigned short bfin_sport0_peripherals[] = { P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS, - P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0 + P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0 }; static struct platform_device bfin_sport0_uart_device = { @@ -2481,9 +2481,9 @@ static struct resource bfin_sport1_uart_resources[] = { }, }; -unsigned short bfin_sport1_peripherals[] = { +static unsigned short bfin_sport1_peripherals[] = { P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS, - P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0 + P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0 }; static struct platform_device bfin_sport1_uart_device = { diff --git a/arch/blackfin/mach-bf537/boards/tcm_bf537.c b/arch/blackfin/mach-bf537/boards/tcm_bf537.c index 31498add1a42..0761b201abca 100644 --- a/arch/blackfin/mach-bf537/boards/tcm_bf537.c +++ b/arch/blackfin/mach-bf537/boards/tcm_bf537.c @@ -356,7 +356,7 @@ static struct resource bfin_uart0_resources[] = { }, }; -unsigned short bfin_uart0_peripherals[] = { +static unsigned short bfin_uart0_peripherals[] = { P_UART0_TX, P_UART0_RX, 0 }; @@ -399,7 +399,7 @@ static struct resource bfin_uart1_resources[] = { }, }; -unsigned short bfin_uart1_peripherals[] = { +static unsigned short bfin_uart1_peripherals[] = { P_UART1_TX, P_UART1_RX, 0 }; @@ -512,9 +512,9 @@ static struct resource bfin_sport0_uart_resources[] = { }, }; -unsigned short bfin_sport0_peripherals[] = { +static unsigned short bfin_sport0_peripherals[] = { P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS, - P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0 + P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0 }; static struct platform_device bfin_sport0_uart_device = { @@ -546,9 +546,9 @@ static struct resource bfin_sport1_uart_resources[] = { }, }; -unsigned short bfin_sport1_peripherals[] = { +static unsigned short bfin_sport1_peripherals[] = { P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS, - P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0 + P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0 }; static struct platform_device bfin_sport1_uart_device = { diff --git a/arch/blackfin/mach-bf537/dma.c b/arch/blackfin/mach-bf537/dma.c index 5c8c4ed517bb..5c62e99c9fac 100644 --- a/arch/blackfin/mach-bf537/dma.c +++ b/arch/blackfin/mach-bf537/dma.c @@ -11,7 +11,7 @@ #include <asm/blackfin.h> #include <asm/dma.h> -struct dma_register *dma_io_base_addr[MAX_DMA_CHANNELS] = { +struct dma_register * const dma_io_base_addr[MAX_DMA_CHANNELS] = { (struct dma_register *) DMA0_NEXT_DESC_PTR, (struct dma_register *) DMA1_NEXT_DESC_PTR, (struct dma_register *) DMA2_NEXT_DESC_PTR, diff --git a/arch/blackfin/mach-bf537/include/mach/bfin_serial.h b/arch/blackfin/mach-bf537/include/mach/bfin_serial.h new file mode 100644 index 000000000000..00c603fe8218 --- /dev/null +++ b/arch/blackfin/mach-bf537/include/mach/bfin_serial.h @@ -0,0 +1,14 @@ +/* + * mach/bfin_serial.h - Blackfin UART/Serial definitions + * + * Copyright 2006-2010 Analog Devices Inc. + * + * Licensed under the GPL-2 or later. + */ + +#ifndef __BFIN_MACH_SERIAL_H__ +#define __BFIN_MACH_SERIAL_H__ + +#define BFIN_UART_NR_PORTS 2 + +#endif diff --git a/arch/blackfin/mach-bf537/include/mach/bfin_serial_5xx.h b/arch/blackfin/mach-bf537/include/mach/bfin_serial_5xx.h index 635c91c526a3..3e955dba8951 100644 --- a/arch/blackfin/mach-bf537/include/mach/bfin_serial_5xx.h +++ b/arch/blackfin/mach-bf537/include/mach/bfin_serial_5xx.h @@ -4,36 +4,9 @@ * Licensed under the GPL-2 or later */ -#include <linux/serial.h> #include <asm/dma.h> #include <asm/portmux.h> -#define UART_GET_CHAR(uart) bfin_read16(((uart)->port.membase + OFFSET_RBR)) -#define UART_GET_DLL(uart) bfin_read16(((uart)->port.membase + OFFSET_DLL)) -#define UART_GET_IER(uart) bfin_read16(((uart)->port.membase + OFFSET_IER)) -#define UART_GET_DLH(uart) bfin_read16(((uart)->port.membase + OFFSET_DLH)) -#define UART_GET_IIR(uart) bfin_read16(((uart)->port.membase + OFFSET_IIR)) -#define UART_GET_LCR(uart) bfin_read16(((uart)->port.membase + OFFSET_LCR)) -#define UART_GET_GCTL(uart) bfin_read16(((uart)->port.membase + OFFSET_GCTL)) - -#define UART_PUT_CHAR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_THR),v) -#define UART_PUT_DLL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_DLL),v) -#define UART_PUT_IER(uart,v) bfin_write16(((uart)->port.membase + OFFSET_IER),v) -#define UART_SET_IER(uart,v) UART_PUT_IER(uart, UART_GET_IER(uart) | (v)) -#define UART_CLEAR_IER(uart,v) UART_PUT_IER(uart, UART_GET_IER(uart) & ~(v)) -#define UART_PUT_DLH(uart,v) bfin_write16(((uart)->port.membase + OFFSET_DLH),v) -#define UART_PUT_LCR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_LCR),v) -#define UART_PUT_GCTL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_GCTL),v) - -#define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0) -#define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0) - -#define UART_GET_CTS(x) gpio_get_value(x->cts_pin) -#define UART_DISABLE_RTS(x) gpio_set_value(x->rts_pin, 1) -#define UART_ENABLE_RTS(x) gpio_set_value(x->rts_pin, 0) -#define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v) -#define UART_DISABLE_INTS(x) UART_PUT_IER(x, 0) - #if defined(CONFIG_BFIN_UART0_CTSRTS) || defined(CONFIG_BFIN_UART1_CTSRTS) # define CONFIG_SERIAL_BFIN_CTSRTS @@ -54,49 +27,6 @@ # endif #endif -#define BFIN_UART_TX_FIFO_SIZE 2 - -/* - * The pin configuration is different from schematic - */ -struct bfin_serial_port { - struct uart_port port; - unsigned int old_status; - int status_irq; - unsigned int lsr; -#ifdef CONFIG_SERIAL_BFIN_DMA - int tx_done; - int tx_count; - struct circ_buf rx_dma_buf; - struct timer_list rx_dma_timer; - int rx_dma_nrows; - unsigned int tx_dma_channel; - unsigned int rx_dma_channel; - struct work_struct tx_dma_workqueue; -#endif -#ifdef CONFIG_SERIAL_BFIN_CTSRTS - int cts_pin; - int rts_pin; -#endif -}; - -/* The hardware clears the LSR bits upon read, so we need to cache - * some of the more fun bits in software so they don't get lost - * when checking the LSR in other code paths (TX). - */ -static inline unsigned int UART_GET_LSR(struct bfin_serial_port *uart) -{ - unsigned int lsr = bfin_read16(uart->port.membase + OFFSET_LSR); - uart->lsr |= (lsr & (BI|FE|PE|OE)); - return lsr | uart->lsr; -} - -static inline void UART_CLEAR_LSR(struct bfin_serial_port *uart) -{ - uart->lsr = 0; - bfin_write16(uart->port.membase + OFFSET_LSR, -1); -} - struct bfin_serial_res { unsigned long uart_base_addr; int uart_irq; @@ -145,3 +75,5 @@ struct bfin_serial_res bfin_serial_resource[] = { }; #define DRIVER_NAME "bfin-uart" + +#include <asm/bfin_serial.h> diff --git a/arch/blackfin/mach-bf537/include/mach/blackfin.h b/arch/blackfin/mach-bf537/include/mach/blackfin.h index a12d4b6a221d..baa096fc724a 100644 --- a/arch/blackfin/mach-bf537/include/mach/blackfin.h +++ b/arch/blackfin/mach-bf537/include/mach/blackfin.h @@ -1,7 +1,7 @@ /* - * Copyright 2005-2009 Analog Devices Inc. + * Copyright 2005-2010 Analog Devices Inc. * - * Licensed under the GPL-2 or later + * Licensed under the GPL-2 or later. */ #ifndef _MACH_BLACKFIN_H_ @@ -10,34 +10,24 @@ #define BF537_FAMILY #include "bf537.h" -#include "defBF534.h" #include "anomaly.h" +#include <asm/def_LPBlackfin.h> +#ifdef CONFIG_BF534 +# include "defBF534.h" +#endif #if defined(CONFIG_BF537) || defined(CONFIG_BF536) -#include "defBF537.h" +# include "defBF537.h" #endif #if !defined(__ASSEMBLY__) -#include "cdefBF534.h" - -#if defined(CONFIG_BF537) || defined(CONFIG_BF536) -#include "cdefBF537.h" +# include <asm/cdef_LPBlackfin.h> +# ifdef CONFIG_BF534 +# include "cdefBF534.h" +# endif +# if defined(CONFIG_BF537) || defined(CONFIG_BF536) +# include "cdefBF537.h" +# endif #endif -#endif - -#define BFIN_UART_NR_PORTS 2 - -#define OFFSET_THR 0x00 /* Transmit Holding register */ -#define OFFSET_RBR 0x00 /* Receive Buffer register */ -#define OFFSET_DLL 0x00 /* Divisor Latch (Low-Byte) */ -#define OFFSET_IER 0x04 /* Interrupt Enable Register */ -#define OFFSET_DLH 0x04 /* Divisor Latch (High-Byte) */ -#define OFFSET_IIR 0x08 /* Interrupt Identification Register */ -#define OFFSET_LCR 0x0C /* Line Control Register */ -#define OFFSET_MCR 0x10 /* Modem Control Register */ -#define OFFSET_LSR 0x14 /* Line Status Register */ -#define OFFSET_MSR 0x18 /* Modem Status Register */ -#define OFFSET_SCR 0x1C /* SCR Scratch Register */ -#define OFFSET_GCTL 0x24 /* Global Control Register */ #endif diff --git a/arch/blackfin/mach-bf537/include/mach/cdefBF534.h b/arch/blackfin/mach-bf537/include/mach/cdefBF534.h index fbeb35e14135..563ede907336 100644 --- a/arch/blackfin/mach-bf537/include/mach/cdefBF534.h +++ b/arch/blackfin/mach-bf537/include/mach/cdefBF534.h @@ -1,5 +1,5 @@ /* - * Copyright 2005-2008 Analog Devices Inc. + * Copyright 2005-2010 Analog Devices Inc. * * Licensed under the GPL-2 or later */ @@ -7,14 +7,6 @@ #ifndef _CDEF_BF534_H #define _CDEF_BF534_H -#include <asm/blackfin.h> - -/* Include all Core registers and bit definitions */ -#include "defBF534.h" - -/* Include core specific register pointer definitions */ -#include <asm/cdef_LPBlackfin.h> - /* Clock and System Control (0xFFC00000 - 0xFFC000FF) */ #define bfin_read_PLL_CTL() bfin_read16(PLL_CTL) #define bfin_read_PLL_DIV() bfin_read16(PLL_DIV) @@ -355,16 +347,10 @@ #define bfin_write_EBIU_SDSTAT(val) bfin_write16(EBIU_SDSTAT,val) /* DMA Traffic Control Registe |