diff options
Diffstat (limited to 'arch/arm/mach-spear')
27 files changed, 2993 insertions, 0 deletions
diff --git a/arch/arm/mach-spear/Kconfig b/arch/arm/mach-spear/Kconfig new file mode 100644 index 000000000000..e288df90c746 --- /dev/null +++ b/arch/arm/mach-spear/Kconfig @@ -0,0 +1,90 @@ +# +# SPEAr Platform configuration file +# + +if PLAT_SPEAR + +choice + prompt "ST SPEAr Family" + default ARCH_SPEAR3XX + +config ARCH_SPEAR13XX + bool "ST SPEAr13xx with Device Tree" + select ARCH_HAVE_CPUFREQ + select ARM_GIC + select CPU_V7 + select GPIO_SPEAR_SPICS + select HAVE_SMP + select MIGHT_HAVE_CACHE_L2X0 + select PINCTRL + select USE_OF + help + Supports for ARM's SPEAR13XX family + +config ARCH_SPEAR3XX + bool "ST SPEAr3xx with Device Tree" + select ARM_VIC + select CPU_ARM926T + select PINCTRL + select USE_OF + help + Supports for ARM's SPEAR3XX family + +config ARCH_SPEAR6XX + bool "SPEAr6XX" + select ARM_VIC + select CPU_ARM926T + help + Supports for ARM's SPEAR6XX family + +endchoice + +if ARCH_SPEAR13XX + +menu "SPEAr13xx Implementations" +config MACH_SPEAR1310 + bool "SPEAr1310 Machine support with Device Tree" + select PINCTRL_SPEAR1310 + help + Supports ST SPEAr1310 machine configured via the device-tree + +config MACH_SPEAR1340 + bool "SPEAr1340 Machine support with Device Tree" + select PINCTRL_SPEAR1340 + help + Supports ST SPEAr1340 machine configured via the device-tree +endmenu +endif #ARCH_SPEAR13XX + +if ARCH_SPEAR3XX + +menu "SPEAr3xx Implementations" +config MACH_SPEAR300 + bool "SPEAr300 Machine support with Device Tree" + select PINCTRL_SPEAR300 + help + Supports ST SPEAr300 machine configured via the device-tree + +config MACH_SPEAR310 + bool "SPEAr310 Machine support with Device Tree" + select PINCTRL_SPEAR310 + help + Supports ST SPEAr310 machine configured via the device-tree + +config MACH_SPEAR320 + bool "SPEAr320 Machine support with Device Tree" + select PINCTRL_SPEAR320 + help + Supports ST SPEAr320 machine configured via the device-tree +endmenu + +endif + +config MACH_SPEAR600 + def_bool y + depends on ARCH_SPEAR6XX + select USE_OF + help + Supports ST SPEAr600 boards configured via the device-treesource "arch/arm/mach-spear6xx/Kconfig" + +endif diff --git a/arch/arm/mach-spear/Makefile b/arch/arm/mach-spear/Makefile new file mode 100644 index 000000000000..8a937bff9d81 --- /dev/null +++ b/arch/arm/mach-spear/Makefile @@ -0,0 +1,22 @@ +# +# SPEAr Platform specific Makefile +# + +# Common support +obj-y := restart.o time.o + +obj-$(CONFIG_SMP) += headsmp.o platsmp.o +obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o + +obj-$(CONFIG_ARCH_SPEAR13XX) += spear13xx.o +obj-$(CONFIG_MACH_SPEAR1310) += spear1310.o +obj-$(CONFIG_MACH_SPEAR1340) += spear1340.o + +obj-$(CONFIG_ARCH_SPEAR3XX) += spear3xx.o +obj-$(CONFIG_ARCH_SPEAR3XX) += pl080.o +obj-$(CONFIG_MACH_SPEAR300) += spear300.o +obj-$(CONFIG_MACH_SPEAR310) += spear310.o +obj-$(CONFIG_MACH_SPEAR320) += spear320.o + +obj-$(CONFIG_ARCH_SPEAR6XX) += spear6xx.o +obj-$(CONFIG_ARCH_SPEAR6XX) += pl080.o diff --git a/arch/arm/mach-spear/Makefile.boot b/arch/arm/mach-spear/Makefile.boot new file mode 100644 index 000000000000..4674a4c221db --- /dev/null +++ b/arch/arm/mach-spear/Makefile.boot @@ -0,0 +1,3 @@ +zreladdr-y += 0x00008000 +params_phys-y := 0x00000100 +initrd_phys-y := 0x00800000 diff --git a/arch/arm/mach-spear/headsmp.S b/arch/arm/mach-spear/headsmp.S new file mode 100644 index 000000000000..ed85473a047f --- /dev/null +++ b/arch/arm/mach-spear/headsmp.S @@ -0,0 +1,47 @@ +/* + * arch/arm/mach-spear13XX/headsmp.S + * + * Picked from realview + * Copyright (c) 2012 ST Microelectronics Limited + * Shiraz Hashim <shiraz.hashim@st.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/linkage.h> +#include <linux/init.h> + + __INIT + +/* + * spear13xx specific entry point for secondary CPUs. This provides + * a "holding pen" into which all secondary cores are held until we're + * ready for them to initialise. + */ +ENTRY(spear13xx_secondary_startup) + mrc p15, 0, r0, c0, c0, 5 + and r0, r0, #15 + adr r4, 1f + ldmia r4, {r5, r6} + sub r4, r4, r5 + add r6, r6, r4 +pen: ldr r7, [r6] + cmp r7, r0 + bne pen + + /* re-enable coherency */ + mrc p15, 0, r0, c1, c0, 1 + orr r0, r0, #(1 << 6) | (1 << 0) + mcr p15, 0, r0, c1, c0, 1 + /* + * we've been released from the holding pen: secondary_stack + * should now contain the SVC stack for this core + */ + b secondary_startup + + .align +1: .long . + .long pen_release +ENDPROC(spear13xx_secondary_startup) diff --git a/arch/arm/mach-spear/hotplug.c b/arch/arm/mach-spear/hotplug.c new file mode 100644 index 000000000000..a7d2dd11a4f2 --- /dev/null +++ b/arch/arm/mach-spear/hotplug.c @@ -0,0 +1,103 @@ +/* + * linux/arch/arm/mach-spear13xx/hotplug.c + * + * Copyright (C) 2012 ST Microelectronics Ltd. + * Deepak Sikri <deepak.sikri@st.com> + * + * based upon linux/arch/arm/mach-realview/hotplug.c + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#include <linux/kernel.h> +#include <linux/errno.h> +#include <linux/smp.h> +#include <asm/cacheflush.h> +#include <asm/cp15.h> +#include <asm/smp_plat.h> + +static inline void cpu_enter_lowpower(void) +{ + unsigned int v; + + flush_cache_all(); + asm volatile( + " mcr p15, 0, %1, c7, c5, 0\n" + " dsb\n" + /* + * Turn off coherency + */ + " mrc p15, 0, %0, c1, c0, 1\n" + " bic %0, %0, #0x20\n" + " mcr p15, 0, %0, c1, c0, 1\n" + " mrc p15, 0, %0, c1, c0, 0\n" + " bic %0, %0, %2\n" + " mcr p15, 0, %0, c1, c0, 0\n" + : "=&r" (v) + : "r" (0), "Ir" (CR_C) + : "cc", "memory"); +} + +static inline void cpu_leave_lowpower(void) +{ + unsigned int v; + + asm volatile("mrc p15, 0, %0, c1, c0, 0\n" + " orr %0, %0, %1\n" + " mcr p15, 0, %0, c1, c0, 0\n" + " mrc p15, 0, %0, c1, c0, 1\n" + " orr %0, %0, #0x20\n" + " mcr p15, 0, %0, c1, c0, 1\n" + : "=&r" (v) + : "Ir" (CR_C) + : "cc"); +} + +static inline void spear13xx_do_lowpower(unsigned int cpu, int *spurious) +{ + for (;;) { + wfi(); + + if (pen_release == cpu) { + /* + * OK, proper wakeup, we're done + */ + break; + } + + /* + * Getting here, means that we have come out of WFI without + * having been woken up - this shouldn't happen + * + * Just note it happening - when we're woken, we can report + * its occurrence. + */ + (*spurious)++; + } +} + +/* + * platform-specific code to shutdown a CPU + * + * Called with IRQs disabled + */ +void __ref spear13xx_cpu_die(unsigned int cpu) +{ + int spurious = 0; + + /* + * we're ready for shutdown now, so do it + */ + cpu_enter_lowpower(); + spear13xx_do_lowpower(cpu, &spurious); + + /* + * bring this CPU back into the world of cache + * coherency, and then restore interrupts + */ + cpu_leave_lowpower(); + + if (spurious) + pr_warn("CPU%u: %u spurious wakeup calls\n", cpu, spurious); +} diff --git a/arch/arm/mach-spear/include/mach/debug-macro.S b/arch/arm/mach-spear/include/mach/debug-macro.S new file mode 100644 index 000000000000..75b05ad0fbad --- /dev/null +++ b/arch/arm/mach-spear/include/mach/debug-macro.S @@ -0,0 +1,36 @@ +/* + * arch/arm/plat-spear/include/plat/debug-macro.S + * + * Debugging macro include header for spear platform + * + * Copyright (C) 2009 ST Microelectronics + * Viresh Kumar <viresh.linux@gmail.com> + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include <linux/amba/serial.h> +#include <mach/spear.h> + + .macro addruart, rp, rv, tmp + mov \rp, #SPEAR_DBG_UART_BASE @ Physical base + mov \rv, #VA_SPEAR_DBG_UART_BASE @ Virtual base + .endm + + .macro senduart, rd, rx + strb \rd, [\rx, #UART01x_DR] @ ASC_TX_BUFFER + .endm + + .macro waituart, rd, rx +1001: ldr \rd, [\rx, #UART01x_FR] @ FLAG REGISTER + tst \rd, #UART01x_FR_TXFF @ TX_FULL + bne 1001b + .endm + + .macro busyuart, rd, rx +1002: ldr \rd, [\rx, #UART01x_FR] @ FLAG REGISTER + tst \rd, #UART011_FR_TXFE @ TX_EMPTY + beq 1002b + .endm diff --git a/arch/arm/mach-spear/include/mach/generic.h b/arch/arm/mach-spear/include/mach/generic.h new file mode 100644 index 000000000000..af47d9b0d83d --- /dev/null +++ b/arch/arm/mach-spear/include/mach/generic.h @@ -0,0 +1,58 @@ +/* + * spear machine family generic header file + * + * Copyright (C) 2009-2012 ST Microelectronics + * Rajeev Kumar <rajeev-dlh.kumar@st.com> + * Viresh Kumar <viresh.linux@gmail.com> + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef __MACH_GENERIC_H +#define __MACH_GENERIC_H + +#include <linux/dmaengine.h> +#include <linux/amba/pl08x.h> +#include <linux/init.h> +#include <asm/mach/time.h> + +extern void spear13xx_timer_init(void); +extern void spear3xx_timer_init(void); +extern struct pl022_ssp_controller pl022_plat_data; +extern struct pl08x_platform_data pl080_plat_data; +extern struct dw_dma_platform_data dmac_plat_data; +extern struct dw_dma_slave cf_dma_priv; +extern struct dw_dma_slave nand_read_dma_priv; +extern struct dw_dma_slave nand_write_dma_priv; +bool dw_dma_filter(struct dma_chan *chan, void *slave); + +void __init spear_setup_of_timer(void); +void __init spear3xx_clk_init(void); +void __init spear3xx_map_io(void); +void __init spear3xx_dt_init_irq(void); +void __init spear6xx_clk_init(void); +void __init spear13xx_map_io(void); +void __init spear13xx_l2x0_init(void); + +void spear_restart(char, const char *); + +void spear13xx_secondary_startup(void); +void __cpuinit spear13xx_cpu_die(unsigned int cpu); + +extern struct smp_operations spear13xx_smp_ops; + +#ifdef CONFIG_MACH_SPEAR1310 +void __init spear1310_clk_init(void); +#else +static inline void spear1310_clk_init(void) {} +#endif + +#ifdef CONFIG_MACH_SPEAR1340 +void __init spear1340_clk_init(void); +#else +static inline void spear1340_clk_init(void) {} +#endif + +#endif /* __MACH_GENERIC_H */ diff --git a/arch/arm/mach-spear/include/mach/hardware.h b/arch/arm/mach-spear/include/mach/hardware.h new file mode 100644 index 000000000000..40a8c178f10d --- /dev/null +++ b/arch/arm/mach-spear/include/mach/hardware.h @@ -0,0 +1 @@ +/* empty */ diff --git a/arch/arm/mach-spear/include/mach/irqs.h b/arch/arm/mach-spear/include/mach/irqs.h new file mode 100644 index 000000000000..92da0a8c6bce --- /dev/null +++ b/arch/arm/mach-spear/include/mach/irqs.h @@ -0,0 +1,35 @@ +/* + * IRQ helper macros for spear machine family + * + * Copyright (C) 2009-2012 ST Microelectronics + * Rajeev Kumar <rajeev-dlh.kumar@st.com> + * Viresh Kumar <viresh.linux@gmail.com> + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef __MACH_IRQS_H +#define __MACH_IRQS_H + +#ifdef CONFIG_ARCH_SPEAR3XX +#define NR_IRQS 256 +#endif + +#ifdef CONFIG_ARCH_SPEAR6XX +/* IRQ definitions */ +/* VIC 1 */ +#define IRQ_VIC_END 64 + +/* GPIO pins virtual irqs */ +#define VIRTUAL_IRQS 24 +#define NR_IRQS (IRQ_VIC_END + VIRTUAL_IRQS) +#endif + +#ifdef CONFIG_ARCH_SPEAR13XX +#define IRQ_GIC_END 160 +#define NR_IRQS IRQ_GIC_END +#endif + +#endif /* __MACH_IRQS_H */ diff --git a/arch/arm/mach-spear/include/mach/misc_regs.h b/arch/arm/mach-spear/include/mach/misc_regs.h new file mode 100644 index 000000000000..075812c4ca18 --- /dev/null +++ b/arch/arm/mach-spear/include/mach/misc_regs.h @@ -0,0 +1,22 @@ +/* + * arch/arm/mach-spear3xx/include/mach/misc_regs.h + * + * Miscellaneous registers definitions for SPEAr3xx machine family + * + * Copyright (C) 2009 ST Microelectronics + * Viresh Kumar <viresh.linux@gmail.com> + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef __MACH_MISC_REGS_H +#define __MACH_MISC_REGS_H + +#include <mach/spear.h> + +#define MISC_BASE IOMEM(VA_SPEAR_ICM3_MISC_REG_BASE) +#define DMA_CHN_CFG (MISC_BASE + 0x0A0) + +#endif /* __MACH_MISC_REGS_H */ diff --git a/arch/arm/mach-spear/include/mach/spear.h b/arch/arm/mach-spear/include/mach/spear.h new file mode 100644 index 000000000000..2198ab96df9d --- /dev/null +++ b/arch/arm/mach-spear/include/mach/spear.h @@ -0,0 +1,101 @@ +/* + * SPEAr3xx/6xx Machine family specific definition + * + * Copyright (C) 2009,2012 ST Microelectronics + * Rajeev Kumar<rajeev-dlh.kumar@st.com> + * Viresh Kumar <viresh.linux@gmail.com> + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef __MACH_SPEAR_H +#define __MACH_SPEAR_H + +#include <asm/memory.h> + +#if defined(CONFIG_ARCH_SPEAR3XX) || defined (CONFIG_ARCH_SPEAR6XX) + +/* ICM1 - Low speed connection */ +#define SPEAR_ICM1_2_BASE UL(0xD0000000) +#define VA_SPEAR_ICM1_2_BASE UL(0xFD000000) +#define SPEAR_ICM1_UART_BASE UL(0xD0000000) +#define VA_SPEAR_ICM1_UART_BASE (VA_SPEAR_ICM1_2_BASE | SPEAR_ICM1_UART_BASE) +#define SPEAR3XX_ICM1_SSP_BASE UL(0xD0100000) + +/* ML-1, 2 - Multi Layer CPU Subsystem */ +#define SPEAR_ICM3_ML1_2_BASE UL(0xF0000000) +#define VA_SPEAR6XX_ML_CPU_BASE UL(0xF0000000) + +/* ICM3 - Basic Subsystem */ +#define SPEAR_ICM3_SMI_CTRL_BASE UL(0xFC000000) +#define VA_SPEAR_ICM3_SMI_CTRL_BASE UL(0xFC000000) +#define SPEAR_ICM3_DMA_BASE UL(0xFC400000) +#define SPEAR_ICM3_SYS_CTRL_BASE UL(0xFCA00000) +#define VA_SPEAR_ICM3_SYS_CTRL_BASE (VA_SPEAR_ICM3_SMI_CTRL_BASE | SPEAR_ICM3_SYS_CTRL_BASE) +#define SPEAR_ICM3_MISC_REG_BASE UL(0xFCA80000) +#define VA_SPEAR_ICM3_MISC_REG_BASE (VA_SPEAR_ICM3_SMI_CTRL_BASE | SPEAR_ICM3_MISC_REG_BASE) + +/* Debug uart for linux, will be used for debug and uncompress messages */ +#define SPEAR_DBG_UART_BASE SPEAR_ICM1_UART_BASE +#define VA_SPEAR_DBG_UART_BASE VA_SPEAR_ICM1_UART_BASE + +/* Sysctl base for spear platform */ +#define SPEAR_SYS_CTRL_BASE SPEAR_ICM3_SYS_CTRL_BASE +#define VA_SPEAR_SYS_CTRL_BASE VA_SPEAR_ICM3_SYS_CTRL_BASE + +/* SPEAr320 Macros */ +#define SPEAR320_SOC_CONFIG_BASE UL(0xB3000000) +#define VA_SPEAR320_SOC_CONFIG_BASE UL(0xFE000000) +#define SPEAR320_CONTROL_REG IOMEM(VA_SPEAR320_SOC_CONFIG_BASE) +#define SPEAR320_EXT_CTRL_REG IOMEM(VA_SPEAR320_SOC_CONFIG_BASE + 0x0018) + #define SPEAR320_UARTX_PCLK_MASK 0x1 + #define SPEAR320_UART2_PCLK_SHIFT 8 + #define SPEAR320_UART3_PCLK_SHIFT 9 + #define SPEAR320_UART4_PCLK_SHIFT 10 + #define SPEAR320_UART5_PCLK_SHIFT 11 + #define SPEAR320_UART6_PCLK_SHIFT 12 + #define SPEAR320_RS485_PCLK_SHIFT 13 +#endif /* SPEAR3xx || SPEAR6XX */ + +#ifdef CONFIG_ARCH_SPEAR13XX + +#define PERIP_GRP2_BASE UL(0xB3000000) +#define VA_PERIP_GRP2_BASE IOMEM(0xFE000000) +#define MCIF_SDHCI_BASE UL(0xB3000000) +#define SYSRAM0_BASE UL(0xB3800000) +#define VA_SYSRAM0_BASE IOMEM(0xFE800000) +#define SYS_LOCATION (VA_SYSRAM0_BASE + 0x600) + +#define PERIP_GRP1_BASE UL(0xE0000000) +#define VA_PERIP_GRP1_BASE IOMEM(0xFD000000) +#define UART_BASE UL(0xE0000000) +#define VA_UART_BASE IOMEM(0xFD000000) +#define SSP_BASE UL(0xE0100000) +#define MISC_BASE UL(0xE0700000) +#define VA_MISC_BASE IOMEM(0xFD700000) + +#define A9SM_AND_MPMC_BASE UL(0xEC000000) +#define VA_A9SM_AND_MPMC_BASE IOMEM(0xFC000000) + +/* A9SM peripheral offsets */ +#define A9SM_PERIP_BASE UL(0xEC800000) +#define VA_A9SM_PERIP_BASE IOMEM(0xFC800000) +#define VA_SCU_BASE (VA_A9SM_PERIP_BASE + 0x00) + +#define L2CC_BASE UL(0xED000000) +#define VA_L2CC_BASE IOMEM(UL(0xFB000000)) + +/* others */ +#define DMAC0_BASE UL(0xEA800000) +#define DMAC1_BASE UL(0xEB000000) +#define MCIF_CF_BASE UL(0xB2800000) + +/* Debug uart for linux, will be used for debug and uncompress messages */ +#define SPEAR_DBG_UART_BASE UART_BASE +#define VA_SPEAR_DBG_UART_BASE VA_UART_BASE + +#endif /* SPEAR13XX */ + +#endif /* __MACH_SPEAR_H */ diff --git a/arch/arm/mach-spear/include/mach/timex.h b/arch/arm/mach-spear/include/mach/timex.h new file mode 100644 index 000000000000..ef95e5b780bd --- /dev/null +++ b/arch/arm/mach-spear/include/mach/timex.h @@ -0,0 +1,19 @@ +/* + * arch/arm/plat-spear/include/plat/timex.h + * + * SPEAr platform specific timex definitions + * + * Copyright (C) 2009 ST Microelectronics + * Viresh Kumar <viresh.linux@gmail.com> + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef __PLAT_TIMEX_H +#define __PLAT_TIMEX_H + +#define CLOCK_TICK_RATE 48000000 + +#endif /* __PLAT_TIMEX_H */ diff --git a/arch/arm/mach-spear/include/mach/uncompress.h b/arch/arm/mach-spear/include/mach/uncompress.h new file mode 100644 index 000000000000..51b2dc93e4da --- /dev/null +++ b/arch/arm/mach-spear/include/mach/uncompress.h @@ -0,0 +1,42 @@ +/* + * arch/arm/plat-spear/include/plat/uncompress.h + * + * Serial port stubs for kernel decompress status messages + * + * Copyright (C) 2009 ST Microelectronics + * Viresh Kumar <viresh.linux@gmail.com> + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include <linux/io.h> +#include <linux/amba/serial.h> +#include <mach/spear.h> + +#ifndef __PLAT_UNCOMPRESS_H +#define __PLAT_UNCOMPRESS_H +/* + * This does not append a newline + */ +static inline void putc(int c) +{ + void __iomem *base = (void __iomem *)SPEAR_DBG_UART_BASE; + + while (readl_relaxed(base + UART01x_FR) & UART01x_FR_TXFF) + barrier(); + + writel_relaxed(c, base + UART01x_DR); +} + +static inline void flush(void) +{ +} + +/* + * nothing to do + */ +#define arch_decomp_setup() + +#endif /* __PLAT_UNCOMPRESS_H */ diff --git a/arch/arm/mach-spear/include/plat/pl080.h b/arch/arm/mach-spear/include/plat/pl080.h new file mode 100644 index 000000000000..eb6590ded40d --- /dev/null +++ b/arch/arm/mach-spear/include/plat/pl080.h @@ -0,0 +1,21 @@ +/* + * arch/arm/plat-spear/include/plat/pl080.h + * + * DMAC pl080 definitions for SPEAr platform + * + * Copyright (C) 2012 ST Microelectronics + * Viresh Kumar <viresh.linux@gmail.com> + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef __PLAT_PL080_H +#define __PLAT_PL080_H + +struct pl08x_channel_data; +int pl080_get_signal(const struct pl08x_channel_data *cd); +void pl080_put_signal(const struct pl08x_channel_data *cd, int signal); + +#endif /* __PLAT_PL080_H */ diff --git a/arch/arm/mach-spear/pl080.c b/arch/arm/mach-spear/pl080.c new file mode 100644 index 000000000000..cfa1199d0f4a --- /dev/null +++ b/arch/arm/mach-spear/pl080.c @@ -0,0 +1,78 @@ +/* + * arch/arm/plat-spear/pl080.c + * + * DMAC pl080 definitions for SPEAr platform + * + * Copyright (C) 2012 ST Microelectronics + * Viresh Kumar <viresh.linux@gmail.com> + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include <linux/amba/pl08x.h> +#include <linux/amba/bus.h> +#include <linux/bug.h> +#include <linux/err.h> +#include <linux/io.h> +#include <linux/spinlock_types.h> +#include <mach/spear.h> +#include <mach/misc_regs.h> + +static spinlock_t lock = __SPIN_LOCK_UNLOCKED(x); + +struct { + unsigned char busy; + unsigned char val; +} signals[16] = {{0, 0}, }; + +int pl080_get_signal(const struct pl08x_channel_data *cd) +{ + unsigned int signal = cd->min_signal, val; + unsigned long flags; + + spin_lock_irqsave(&lock, flags); + + /* Return if signal is already acquired by somebody else */ + if (signals[signal].busy && + (signals[signal].val != cd->muxval)) { + spin_unlock_irqrestore(&lock, flags); + return -EBUSY; + } + + /* If acquiring for the first time, configure it */ + if (!signals[signal].busy) { + val = readl(DMA_CHN_CFG); + + /* + * Each request line has two bits in DMA_CHN_CFG register. To + * goto the bits of current request line, do left shift of + * value by 2 * signal number. + */ + val &= ~(0x3 << (signal * 2)); + val |= cd->muxval << (signal * 2); + writel(val, DMA_CHN_CFG); + } + + signals[signal].busy++; + signals[signal].val = cd->muxval; + spin_unlock_irqrestore(&lock, flags); + + return signal; +} + +void pl080_put_signal(const struct pl08x_channel_data *cd, int signal) +{ + unsigned long flags; + + spin_lock_irqsave(&lock, flags); + + /* if signal is not used */ + if (!signals[signal].busy) + BUG(); + + signals[signal].busy--; + + spin_unlock_irqrestore(&lock, flags); +} diff --git a/arch/arm/mach-spear/platsmp.c b/arch/arm/mach-spear/platsmp.c new file mode 100644 index 000000000000..af4ade61cd95 --- /dev/null +++ b/arch/arm/mach-spear/platsmp.c @@ -0,0 +1,130 @@ +/* + * arch/arm/mach-spear13xx/platsmp.c + * + * based upon linux/arch/arm/mach-realview/platsmp.c + * + * Copyright (C) 2012 ST Microelectronics Ltd. + * Shiraz Hashim <shiraz.hashim@st.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/delay.h> +#include <linux/jiffies.h> +#include <linux/io.h> +#include <linux/smp.h> +#include <linux/irqchip/arm-gic.h> +#include <asm/cacheflush.h> +#include <asm/smp_scu.h> +#include <mach/spear.h> +#include <mach/generic.h> + +static DEFINE_SPINLOCK(boot_lock); + +static void __iomem *scu_base = IOMEM(VA_SCU_BASE); + +static void __cpuinit spear13xx_secondary_init(unsigned int cpu) +{ + /* + * if any interrupts are already enabled for the primary + * core (e.g. timer irq), then they will not have been enabled + * for us: do so + */ + gic_secondary_init(0); + + /* + * let the primary processor know we're out of the + * pen, then head off into the C entry point + */ + pen_release = -1; + smp_wmb(); + + /* + * Synchronise with the boot thread. + */ + spin_lock(&boot_lock); + spin_unlock(&boot_lock); +} + +static int __cpuinit spear13xx_boot_secondary(unsigned int cpu, struct task_struct *idle) +{ + unsigned long timeout; + + /* + * set synchronisation state between this boot processor + * and the secondary one + */ + spin_lock(&boot_lock); + + /* + * The secondary processor is waiting to be released from + * the holding pen - release it, then wait for it to flag + * that it has been released by resetting pen_release. + * + * Note that "pen_release" is the hardware CPU ID, whereas + * "cpu" is Linux's internal ID. + */ + pen_release = cpu; + flush_cache_all(); + outer_flush_all(); + + timeout = jiffies + (1 * HZ); + while (time_before(jiffies, timeout)) { + smp_rmb(); + if (pen_release == -1) + break; + + udelay(10); + } + + /* + * now the secondary core is starting up let it run its + * calibrations, then wait for it to finish + */ + spin_unlock(&boot_lock); + + return pen_release != -1 ? -ENOSYS : 0; +} + +/* + * Initialise the CPU possible map early - this describes the CPUs + * which may be present or become present in the system. + */ +static void __init spear13xx_smp_init_cpus(void) +{ + unsigned int i, ncores = scu_get_core_count(scu_base); + + if (ncores > nr_cpu_ids) { + pr_warn("SMP: %u cores greater than maximum (%u), clipping\n", + ncores, nr_cpu_ids); + ncores = nr_cpu_ids; + } + + for (i = 0; i < ncores; i++) + set_cpu_possible(i, true); +} + +static void __init spear13xx_smp_prepare_cpus(unsigned int max_cpus) +{ + + scu_enable(scu_base); + + /* + * Write the address of secondary startup into the system-wide location + * (presently it is in SRAM). The BootMonitor waits until it receives a + * soft interrupt, and then the secondary CPU branches to this address. + */ + __raw_writel(virt_to_phys(spear13xx_secondary_startup), SYS_LOCATION); +} + +struct smp_operations spear13xx_smp_ops __initdata = { + .smp_init_cpus = spear13xx_smp_init_cpus, + .smp_prepare_cpus = spear13xx_smp_prepare_cpus, + .smp_secondary_init = spear13xx_secondary_init, + .smp_boot_secondary = spear13xx_boot_secondary, +#ifdef CONFIG_HOTPLUG_CPU + .cpu_die = spear13xx_cpu_die, +#endif +}; diff --git a/arch/arm/mach-spear/restart.c b/arch/arm/mach-spear/restart.c new file mode 100644 index 000000000000..7d4616d5df11 --- /dev/null +++ b/arch/arm/mach-spear/restart.c @@ -0,0 +1,33 @@ +/* + * arch/arm/plat-spear/restart.c + * + * SPEAr platform specific restart functions + * + * Copyright (C) 2009 ST Microelectronics + * Viresh Kumar <viresh.linux@gmail.com> + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ +#include <linux/io.h> +#include <linux/amba/sp810.h> +#include <asm/system_misc.h> +#include <mach/spear.h> +#include <mach/generic.h> + +#define SPEAR13XX_SYS_SW_RES (VA_MISC_BASE + 0x204) +void spear_restart(char mode, const char *cmd) +{ + if (mode == 's') { + /* software reset, Jump into ROM at address 0 */ + soft_restart(0); + } else { + /* hardware reset, Use on-chip reset capability */ +#ifdef CONFIG_ARCH_SPEAR13XX + writel_relaxed(0x01, SPEAR13XX_SYS_SW_RES); +#else + sysctl_soft_reset((void __iomem *)VA_SPEAR_SYS_CTRL_BASE); +#endif + } +} diff --git a/arch/arm/mach-spear/spear1310.c b/arch/arm/mach-spear/spear1310.c new file mode 100644 index 000000000000..56214d1076ef --- /dev/null +++ b/arch/arm/mach-spear/spear1310.c @@ -0,0 +1,98 @@ +/* + * arch/arm/mach-spear13xx/spear1310.c + * + * SPEAr1310 machine source file + * + * Copyright (C) 2012 ST Microelectronics + * Viresh Kumar <viresh.linux@gmail.com> + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#define pr_fmt(fmt) "SPEAr1310: " fmt + +#include <linux/amba/pl022.h> +#include <linux/irqchip.h> +#include <linux/of_platform.h> +#include <linux/pata_arasan_cf_data.h> +#include <asm/mach/arch.h> +#include <asm/mach/map.h> |