diff options
60 files changed, 425 insertions, 320 deletions
diff --git a/arch/arm/common/sharpsl_pm.c b/arch/arm/common/sharpsl_pm.c index a3b450f8ef17..a9bc5b52218f 100644 --- a/arch/arm/common/sharpsl_pm.c +++ b/arch/arm/common/sharpsl_pm.c @@ -23,11 +23,11 @@ #include <linux/interrupt.h> #include <linux/platform_device.h> #include <linux/leds.h> +#include <linux/apm-emulation.h> #include <asm/hardware.h> #include <asm/mach-types.h> #include <asm/irq.h> -#include <asm/apm-emulation.h> #include <asm/arch/pm.h> #include <asm/arch/pxa-regs.h> #include <asm/arch/sharpsl.h> diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S index cc10a093a545..d645897652c2 100644 --- a/arch/arm/kernel/entry-armv.S +++ b/arch/arm/kernel/entry-armv.S @@ -27,6 +27,7 @@ * Interrupt handling. Preserves r7, r8, r9 */ .macro irq_handler + get_irqnr_preamble r5, lr 1: get_irqnr_and_base r0, r6, r5, lr movne r1, sp @ diff --git a/arch/arm/kernel/entry-common.S b/arch/arm/kernel/entry-common.S index 6f5e7c50d42f..c589dc3ecd1a 100644 --- a/arch/arm/kernel/entry-common.S +++ b/arch/arm/kernel/entry-common.S @@ -9,6 +9,7 @@ */ #include <asm/unistd.h> +#include <asm/arch/entry-macro.S> #include "entry-header.S" @@ -25,6 +26,9 @@ ret_fast_syscall: tst r1, #_TIF_WORK_MASK bne fast_work_pending + /* perform architecture specific actions before user return */ + arch_ret_to_user r1, lr + @ fast_restore_user_regs ldr r1, [sp, #S_OFF + S_PSR] @ get calling cpsr ldr lr, [sp, #S_OFF + S_PC]! @ get pc @@ -61,6 +65,9 @@ ret_slow_syscall: tst r1, #_TIF_WORK_MASK bne work_pending no_work_pending: + /* perform architecture specific actions before user return */ + arch_ret_to_user r1, lr + @ slow_restore_user_regs ldr r1, [sp, #S_PSR] @ get calling cpsr ldr lr, [sp, #S_PC]! @ get pc diff --git a/arch/arm/mach-iop13xx/Makefile b/arch/arm/mach-iop13xx/Makefile index c3d6c08f2d4c..4185e0586c33 100644 --- a/arch/arm/mach-iop13xx/Makefile +++ b/arch/arm/mach-iop13xx/Makefile @@ -5,7 +5,6 @@ obj- := obj-$(CONFIG_ARCH_IOP13XX) += setup.o obj-$(CONFIG_ARCH_IOP13XX) += irq.o -obj-$(CONFIG_ARCH_IOP13XX) += time.o obj-$(CONFIG_ARCH_IOP13XX) += pci.o obj-$(CONFIG_ARCH_IOP13XX) += io.o obj-$(CONFIG_MACH_IQ81340SC) += iq81340sc.o diff --git a/arch/arm/mach-iop13xx/iq81340mc.c b/arch/arm/mach-iop13xx/iq81340mc.c index 2a1bbfe9896f..a519d707571c 100644 --- a/arch/arm/mach-iop13xx/iq81340mc.c +++ b/arch/arm/mach-iop13xx/iq81340mc.c @@ -25,6 +25,7 @@ #include <asm/mach/arch.h> #include <asm/arch/pci.h> #include <asm/mach/time.h> +#include <asm/arch/time.h> extern int init_atu; /* Flag to select which ATU(s) to initialize / disable */ @@ -78,12 +79,12 @@ static void __init iq81340mc_init(void) static void __init iq81340mc_timer_init(void) { - iop13xx_init_time(400000000); + iop_init_time(400000000); } static struct sys_timer iq81340mc_timer = { .init = iq81340mc_timer_init, - .offset = iop13xx_gettimeoffset, + .offset = iop_gettimeoffset, }; MACHINE_START(IQ81340MC, "Intel IQ81340MC") diff --git a/arch/arm/mach-iop13xx/iq81340sc.c b/arch/arm/mach-iop13xx/iq81340sc.c index 5ad2b62c9bfd..0e71fbcabe00 100644 --- a/arch/arm/mach-iop13xx/iq81340sc.c +++ b/arch/arm/mach-iop13xx/iq81340sc.c @@ -25,6 +25,7 @@ #include <asm/mach/arch.h> #include <asm/arch/pci.h> #include <asm/mach/time.h> +#include <asm/arch/time.h> extern int init_atu; @@ -80,12 +81,12 @@ static void __init iq81340sc_init(void) static void __init iq81340sc_timer_init(void) { - iop13xx_init_time(400000000); + iop_init_time(400000000); } static struct sys_timer iq81340sc_timer = { .init = iq81340sc_timer_init, - .offset = iop13xx_gettimeoffset, + .offset = iop_gettimeoffset, }; MACHINE_START(IQ81340SC, "Intel IQ81340SC") diff --git a/arch/arm/mach-iop13xx/irq.c b/arch/arm/mach-iop13xx/irq.c index 162b93214965..b2eb0b961031 100644 --- a/arch/arm/mach-iop13xx/irq.c +++ b/arch/arm/mach-iop13xx/irq.c @@ -161,65 +161,49 @@ static void write_intsize(u32 val) static void iop13xx_irq_mask0 (unsigned int irq) { - u32 cp_flags = iop13xx_cp6_save(); write_intctl_0(read_intctl_0() & ~(1 << (irq - 0))); - iop13xx_cp6_restore(cp_flags); } static void iop13xx_irq_mask1 (unsigned int irq) { - u32 cp_flags = iop13xx_cp6_save(); write_intctl_1(read_intctl_1() & ~(1 << (irq - 32))); - iop13xx_cp6_restore(cp_flags); } static void iop13xx_irq_mask2 (unsigned int irq) { - u32 cp_flags = iop13xx_cp6_save(); write_intctl_2(read_intctl_2() & ~(1 << (irq - 64))); - iop13xx_cp6_restore(cp_flags); } static void iop13xx_irq_mask3 (unsigned int irq) { - u32 cp_flags = iop13xx_cp6_save(); write_intctl_3(read_intctl_3() & ~(1 << (irq - 96))); - iop13xx_cp6_restore(cp_flags); } static void iop13xx_irq_unmask0(unsigned int irq) { - u32 cp_flags = iop13xx_cp6_save(); write_intctl_0(read_intctl_0() | (1 << (irq - 0))); - iop13xx_cp6_restore(cp_flags); } static void iop13xx_irq_unmask1(unsigned int irq) { - u32 cp_flags = iop13xx_cp6_save(); write_intctl_1(read_intctl_1() | (1 << (irq - 32))); - iop13xx_cp6_restore(cp_flags); } static void iop13xx_irq_unmask2(unsigned int irq) { - u32 cp_flags = iop13xx_cp6_save(); write_intctl_2(read_intctl_2() | (1 << (irq - 64))); - iop13xx_cp6_restore(cp_flags); } static void iop13xx_irq_unmask3(unsigned int irq) { - u32 cp_flags = iop13xx_cp6_save(); write_intctl_3(read_intctl_3() | (1 << (irq - 96))); - iop13xx_cp6_restore(cp_flags); } static struct irq_chip iop13xx_irqchip1 = { @@ -256,7 +240,6 @@ void __init iop13xx_init_irq(void) { unsigned int i; - u32 cp_flags = iop13xx_cp6_save(); iop_init_cp6_handler(); /* disable all interrupts */ @@ -288,6 +271,4 @@ void __init iop13xx_init_irq(void) set_irq_handler(i, handle_level_irq); set_irq_flags(i, IRQF_VALID | IRQF_PROBE); } - - iop13xx_cp6_restore(cp_flags); } diff --git a/arch/arm/mach-iop13xx/setup.c b/arch/arm/mach-iop13xx/setup.c index 5fbeb28d04bb..9a46bcd5f18e 100644 --- a/arch/arm/mach-iop13xx/setup.c +++ b/arch/arm/mach-iop13xx/setup.c @@ -24,6 +24,7 @@ #include <asm/mach/map.h> #include <asm/hardware.h> #include <asm/irq.h> +#include <asm/io.h> #define IOP13XX_UART_XTAL 33334000 #define IOP13XX_SETUP_DEBUG 0 diff --git a/arch/arm/mach-iop13xx/time.c b/arch/arm/mach-iop13xx/time.c deleted file mode 100644 index 8b21365f653f..000000000000 --- a/arch/arm/mach-iop13xx/time.c +++ /dev/null @@ -1,102 +0,0 @@ -/* - * arch/arm/mach-iop13xx/time.c - * - * Timer code for IOP13xx (copied from IOP32x/IOP33x implementation) - * - * Author: Deepak Saxena <dsaxena@mvista.com> - * - * Copyright 2002-2003 MontaVista Software Inc. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -#include <linux/kernel.h> -#include <linux/interrupt.h> -#include <linux/time.h> -#include <linux/init.h> -#include <linux/timex.h> -#include <asm/io.h> -#include <asm/irq.h> -#include <asm/uaccess.h> -#include <asm/mach/irq.h> -#include <asm/mach/time.h> - -static unsigned long ticks_per_jiffy; -static unsigned long ticks_per_usec; -static unsigned long next_jiffy_time; - -static inline u32 read_tcr1(void) -{ - u32 val; - asm volatile("mrc p6, 0, %0, c3, c9, 0" : "=r" (val)); - return val; -} - -unsigned long iop13xx_gettimeoffset(void) -{ - unsigned long offset; - u32 cp_flags; - - cp_flags = iop13xx_cp6_save(); - offset = next_jiffy_time - read_tcr1(); - iop13xx_cp6_restore(cp_flags); - - return offset / ticks_per_usec; -} - -static irqreturn_t -iop13xx_timer_interrupt(int irq, void *dev_id) -{ - u32 cp_flags = iop13xx_cp6_save(); - - write_seqlock(&xtime_lock); - - asm volatile("mcr p6, 0, %0, c6, c9, 0" : : "r" (1)); - - while ((signed long)(next_jiffy_time - read_tcr1()) - >= ticks_per_jiffy) { - timer_tick(); - next_jiffy_time -= ticks_per_jiffy; - } - - write_sequnlock(&xtime_lock); - - iop13xx_cp6_restore(cp_flags); - - return IRQ_HANDLED; -} - -static struct irqaction iop13xx_timer_irq = { - .name = "IOP13XX Timer Tick", - .handler = iop13xx_timer_interrupt, - .flags = IRQF_DISABLED | IRQF_TIMER, -}; - -void __init iop13xx_init_time(unsigned long tick_rate) -{ - u32 timer_ctl; - u32 cp_flags; - - ticks_per_jiffy = (tick_rate + HZ/2) / HZ; - ticks_per_usec = tick_rate / 1000000; - next_jiffy_time = 0xffffffff; - - timer_ctl = IOP13XX_TMR_EN | IOP13XX_TMR_PRIVILEGED | - IOP13XX_TMR_RELOAD | IOP13XX_TMR_RATIO_1_1; - - /* - * We use timer 0 for our timer interrupt, and timer 1 as - * monotonic counter for tracking missed jiffies. - */ - cp_flags = iop13xx_cp6_save(); - asm volatile("mcr p6, 0, %0, c4, c9, 0" : : "r" (ticks_per_jiffy - 1)); - asm volatile("mcr p6, 0, %0, c0, c9, 0" : : "r" (timer_ctl)); - asm volatile("mcr p6, 0, %0, c5, c9, 0" : : "r" (0xffffffff)); - asm volatile("mcr p6, 0, %0, c1, c9, 0" : : "r" (timer_ctl)); - iop13xx_cp6_restore(cp_flags); - - setup_irq(IRQ_IOP13XX_TIMER0, &iop13xx_timer_irq); -} diff --git a/arch/arm/mach-iop32x/glantank.c b/arch/arm/mach-iop32x/glantank.c index b9b765057dbe..45f4f13ae11b 100644 --- a/arch/arm/mach-iop32x/glantank.c +++ b/arch/arm/mach-iop32x/glantank.c @@ -31,6 +31,7 @@ #include <asm/mach/time.h> #include <asm/mach-types.h> #include <asm/page.h> +#include <asm/arch/time.h> /* * GLAN Tank timer tick configuration. @@ -38,12 +39,12 @@ static void __init glantank_timer_init(void) { /* 33.333 MHz crystal. */ - iop3xx_init_time(200000000); + iop_init_time(200000000); } static struct sys_timer glantank_timer = { .init = glantank_timer_init, - .offset = iop3xx_gettimeoffset, + .offset = iop_gettimeoffset, }; diff --git a/arch/arm/mach-iop32x/iq31244.c b/arch/arm/mach-iop32x/iq31244.c index be4aedfa0de6..571ac35bc2c7 100644 --- a/arch/arm/mach-iop32x/iq31244.c +++ b/arch/arm/mach-iop32x/iq31244.c @@ -36,7 +36,7 @@ #include <asm/mach-types.h> #include <asm/page.h> #include <asm/pgtable.h> - +#include <asm/arch/time.h> /* * The EP80219 and IQ31244 use the same machine ID. To find out @@ -56,16 +56,16 @@ static void __init iq31244_timer_init(void) { if (is_80219()) { /* 33.333 MHz crystal. */ - iop3xx_init_time(200000000); + iop_init_time(200000000); } else { /* 33.000 MHz crystal. */ - iop3xx_init_time(198000000); + iop_init_time(198000000); } } static struct sys_timer iq31244_timer = { .init = iq31244_timer_init, - .offset = iop3xx_gettimeoffset, + .offset = iop_gettimeoffset, }; diff --git a/arch/arm/mach-iop32x/iq80321.c b/arch/arm/mach-iop32x/iq80321.c index 1f37b5501888..361c70c0f64c 100644 --- a/arch/arm/mach-iop32x/iq80321.c +++ b/arch/arm/mach-iop32x/iq80321.c @@ -33,6 +33,7 @@ #include <asm/mach-types.h> #include <asm/page.h> #include <asm/pgtable.h> +#include <asm/arch/time.h> /* * IQ80321 timer tick configuration. @@ -40,12 +41,12 @@ static void __init iq80321_timer_init(void) { /* 33.333 MHz crystal. */ - iop3xx_init_time(200000000); + iop_init_time(200000000); } static struct sys_timer iq80321_timer = { .init = iq80321_timer_init, - .offset = iop3xx_gettimeoffset, + .offset = iop_gettimeoffset, }; diff --git a/arch/arm/mach-iop32x/irq.c b/arch/arm/mach-iop32x/irq.c index 8b0ac5590ae4..82598dc18d80 100644 --- a/arch/arm/mach-iop32x/irq.c +++ b/arch/arm/mach-iop32x/irq.c @@ -23,16 +23,12 @@ static u32 iop32x_mask; static inline void intctl_write(u32 val) { - iop3xx_cp6_enable(); asm volatile("mcr p6, 0, %0, c0, c0, 0" : : "r" (val)); - iop3xx_cp6_disable(); } static inline void intstr_write(u32 val) { - iop3xx_cp6_enable(); asm volatile("mcr p6, 0, %0, c4, c0, 0" : : "r" (val)); - iop3xx_cp6_disable(); } static void diff --git a/arch/arm/mach-iop32x/n2100.c b/arch/arm/mach-iop32x/n2100.c index 966aa51aee09..5f07344d96f3 100644 --- a/arch/arm/mach-iop32x/n2100.c +++ b/arch/arm/mach-iop32x/n2100.c @@ -37,6 +37,7 @@ #include <asm/mach-types.h> #include <asm/page.h> #include <asm/pgtable.h> +#include <asm/arch/time.h> /* * N2100 timer tick configuration. @@ -44,12 +45,12 @@ static void __init n2100_timer_init(void) { /* 33.000 MHz crystal. */ - iop3xx_init_time(198000000); + iop_init_time(198000000); } static struct sys_timer n2100_timer = { .init = n2100_timer_init, - .offset = iop3xx_gettimeoffset, + .offset = iop_gettimeoffset, }; diff --git a/arch/arm/mach-iop33x/iq80331.c b/arch/arm/mach-iop33x/iq80331.c index 97a7b7488264..1a9e36138d80 100644 --- a/arch/arm/mach-iop33x/iq80331.c +++ b/arch/arm/mach-iop33x/iq80331.c @@ -32,6 +32,7 @@ #include <asm/mach-types.h> #include <asm/page.h> #include <asm/pgtable.h> +#include <asm/arch/time.h> /* * IQ80331 timer tick configuration. @@ -40,14 +41,14 @@ static void __init iq80331_timer_init(void) { /* D-Step parts run at a higher internal bus frequency */ if (*IOP3XX_ATURID >= 0xa) - iop3xx_init_time(333000000); + iop_init_time(333000000); else - iop3xx_init_time(266000000); + iop_init_time(266000000); } static struct sys_timer iq80331_timer = { .init = iq80331_timer_init, - .offset = iop3xx_gettimeoffset, + .offset = iop_gettimeoffset, }; diff --git a/arch/arm/mach-iop33x/iq80332.c b/arch/arm/mach-iop33x/iq80332.c index 9887bfc1c078..96d6f0f3cd21 100644 --- a/arch/arm/mach-iop33x/iq80332.c +++ b/arch/arm/mach-iop33x/iq80332.c @@ -32,6 +32,7 @@ #include <asm/mach-types.h> #include <asm/page.h> #include <asm/pgtable.h> +#include <asm/arch/time.h> /* * IQ80332 timer tick configuration. @@ -40,14 +41,14 @@ static void __init iq80332_timer_init(void) { /* D-Step parts and the iop333 run at a higher internal bus frequency */ if (*IOP3XX_ATURID >= 0xa || *IOP3XX_ATUDID == 0x374) - iop3xx_init_time(333000000); + iop_init_time(333000000); else - iop3xx_init_time(266000000); + iop_init_time(266000000); } static struct sys_timer iq80332_timer = { .init = iq80332_timer_init, - .offset = iop3xx_gettimeoffset, + .offset = iop_gettimeoffset, }; diff --git a/arch/arm/mach-iop33x/irq.c b/arch/arm/mach-iop33x/irq.c index effbe6b782d0..c65ea78a2427 100644 --- a/arch/arm/mach-iop33x/irq.c +++ b/arch/arm/mach-iop33x/irq.c @@ -24,44 +24,32 @@ static u32 iop33x_mask1; static inline void intctl0_write(u32 val) { - iop3xx_cp6_enable(); asm volatile("mcr p6, 0, %0, c0, c0, 0" : : "r" (val)); - iop3xx_cp6_disable(); } static inline void intctl1_write(u32 val) { - iop3xx_cp6_enable(); asm volatile("mcr p6, 0, %0, c1, c0, 0" : : "r" (val)); - iop3xx_cp6_disable(); } static inline void intstr0_write(u32 val) { - iop3xx_cp6_enable(); asm volatile("mcr p6, 0, %0, c2, c0, 0" : : "r" (val)); - iop3xx_cp6_disable(); } static inline void intstr1_write(u32 val) { - iop3xx_cp6_enable(); asm volatile("mcr p6, 0, %0, c3, c0, 0" : : "r" (val)); - iop3xx_cp6_disable(); } static inline void intbase_write(u32 val) { - iop3xx_cp6_enable(); asm volatile("mcr p6, 0, %0, c12, c0, 0" : : "r" (val)); - iop3xx_cp6_disable(); } static inline void intsize_write(u32 val) { - iop3xx_cp6_enable(); asm volatile("mcr p6, 0, %0, c13, c0, 0" : : "r" (val)); - iop3xx_cp6_disable(); } static void diff --git a/arch/arm/mach-sa1100/jornada720.c b/arch/arm/mach-sa1100/jornada720.c index 54ecdaa373d6..64067cd58d36 100644 --- a/arch/arm/mach-sa1100/jornada720.c +++ b/arch/arm/mach-sa1100/jornada720.c @@ -231,12 +231,6 @@ static struct platform_device *devices[] __initdata = { &s1d13xxxfb_device, }; -/* a stub for now, we theoretically cannot suspend without a flashboard */ -int pm_suspend(suspend_state_t state) -{ - return -1; -} - static int __init jornada720_init(void) { int ret = -ENODEV; diff --git a/arch/arm/plat-iop/Makefile b/arch/arm/plat-iop/Makefile index 3250d732a171..4d2b1da3cd82 100644 --- a/arch/arm/plat-iop/Makefile +++ b/arch/arm/plat-iop/Makefile @@ -24,6 +24,7 @@ obj-$(CONFIG_ARCH_IOP33X) += cp6.o # IOP13XX obj-$(CONFIG_ARCH_IOP13XX) += cp6.o +obj-$(CONFIG_ARCH_IOP13XX) += time.o obj-m := obj-n := diff --git a/arch/arm/plat-iop/time.c b/arch/arm/plat-iop/time.c index f530abdaa7a1..16300adfb4de 100644 --- a/arch/arm/plat-iop/time.c +++ b/arch/arm/plat-iop/time.c @@ -24,39 +24,45 @@ #include <asm/uaccess.h> #include <asm/mach/irq.h> #include <asm/mach/time.h> - -#ifdef CONFIG_ARCH_IOP32X -#define IRQ_IOP3XX_TIMER0 IRQ_IOP32X_TIMER0 -#else -#ifdef CONFIG_ARCH_IOP33X -#define IRQ_IOP3XX_TIMER0 IRQ_IOP33X_TIMER0 -#endif -#endif +#include <asm/arch/time.h> static unsigned long ticks_per_jiffy; static unsigned long ticks_per_usec; static unsigned long next_jiffy_time; -unsigned long iop3xx_gettimeoffset(void) +unsigned long iop_gettimeoffset(void) { - unsigned long offset; + unsigned long offset, temp1, temp2; - offset = next_jiffy_time - *IOP3XX_TU_TCR1; + /* enable cp6, if necessary, to avoid taking the overhead of an + * undefined instruction trap + */ + asm volatile ( + "mrc p15, 0, %0, c15, c1, 0\n\t" + "ands %1, %0, #(1 << 6)\n\t" + "orreq %0, %0, #(1 << 6)\n\t" + "mcreq p15, 0, %0, c15, c1, 0\n\t" +#ifdef CONFIG_XSCALE + "mrceq p15, 0, %0, c15, c1, 0\n\t" + "moveq %0, %0\n\t" + "subeq pc, pc, #4\n\t" +#endif + : "=r"(temp1), "=r"(temp2) : : "cc"); + + offset = next_jiffy_time - read_tcr1(); return offset / ticks_per_usec; } static irqreturn_t -iop3xx_timer_interrupt(int irq, void *dev_id) +iop_timer_interrupt(int irq, void *dev_id) { write_seqlock(&xtime_lock); - iop3xx_cp6_enable(); |