diff options
author | Michael Hanselmann <linux-kernel@hansmi.ch> | 2006-03-31 02:31:55 -0800 |
---|---|---|
committer | Linus Torvalds <torvalds@g5.osdl.org> | 2006-03-31 12:19:01 -0800 |
commit | 39451a73a2d190763ba8a98f486cf23d63d22582 (patch) | |
tree | a395398b3dfb7c39c2a011515f0679d4a8cd65b8 /drivers/video | |
parent | a536093a2f07007aa572e922752b7491b9ea8ff2 (diff) |
[PATCH] fbdev: Remove old radeon driver
This patch removes the old radeon driver which has been replaced by a
newer one.
Signed-off-by: Michael Hanselmann <linux-kernel@hansmi.ch>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Acked-by: Antonino Daplas <adaplas@pol.net>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'drivers/video')
-rw-r--r-- | drivers/video/Kconfig | 12 | ||||
-rw-r--r-- | drivers/video/Makefile | 1 | ||||
-rw-r--r-- | drivers/video/radeonfb.c | 3167 |
3 files changed, 0 insertions, 3180 deletions
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig index 22e9d696fdd2..f87c0171f4ec 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig @@ -904,18 +904,6 @@ config FB_MATROX_MULTIHEAD There is no need for enabling 'Matrox multihead support' if you have only one Matrox card in the box. -config FB_RADEON_OLD - tristate "ATI Radeon display support (Old driver)" - depends on FB && PCI - select FB_CFB_FILLRECT - select FB_CFB_COPYAREA - select FB_CFB_IMAGEBLIT - select FB_MACMODES if PPC - help - Choose this option if you want to use an ATI Radeon graphics card as - a framebuffer device. There are both PCI and AGP versions. You - don't need to choose this to run the Radeon in plain VGA mode. - config FB_RADEON tristate "ATI Radeon display support" depends on FB && PCI diff --git a/drivers/video/Makefile b/drivers/video/Makefile index cb90218515ac..23de3b2c7856 100644 --- a/drivers/video/Makefile +++ b/drivers/video/Makefile @@ -39,7 +39,6 @@ obj-$(CONFIG_FB_KYRO) += kyro/ obj-$(CONFIG_FB_SAVAGE) += savage/ obj-$(CONFIG_FB_GEODE) += geode/ obj-$(CONFIG_FB_I810) += vgastate.o -obj-$(CONFIG_FB_RADEON_OLD) += radeonfb.o obj-$(CONFIG_FB_NEOMAGIC) += neofb.o vgastate.o obj-$(CONFIG_FB_VIRGE) += virgefb.o obj-$(CONFIG_FB_3DFX) += tdfxfb.o diff --git a/drivers/video/radeonfb.c b/drivers/video/radeonfb.c deleted file mode 100644 index afb6c2ead599..000000000000 --- a/drivers/video/radeonfb.c +++ /dev/null @@ -1,3167 +0,0 @@ -/* - * drivers/video/radeonfb.c - * framebuffer driver for ATI Radeon chipset video boards - * - * Copyright 2000 Ani Joshi <ajoshi@kernel.crashing.org> - * - * - * ChangeLog: - * 2000-08-03 initial version 0.0.1 - * 2000-09-10 more bug fixes, public release 0.0.5 - * 2001-02-19 mode bug fixes, 0.0.7 - * 2001-07-05 fixed scrolling issues, engine initialization, - * and minor mode tweaking, 0.0.9 - * 2001-09-07 Radeon VE support, Nick Kurshev - * blanking, pan_display, and cmap fixes, 0.1.0 - * 2001-10-10 Radeon 7500 and 8500 support, and experimental - * flat panel support, 0.1.1 - * 2001-11-17 Radeon M6 (ppc) support, Daniel Berlin, 0.1.2 - * 2001-11-18 DFP fixes, Kevin Hendricks, 0.1.3 - * 2001-11-29 more cmap, backlight fixes, Benjamin Herrenschmidt - * 2002-01-18 DFP panel detection via BIOS, Michael Clark, 0.1.4 - * 2002-06-02 console switching, mode set fixes, accel fixes - * 2002-06-03 MTRR support, Peter Horton, 0.1.5 - * 2002-09-21 rv250, r300, m9 initial support, - * added mirror option, 0.1.6 - * - * Special thanks to ATI DevRel team for their hardware donations. - * - */ - - -#define RADEON_VERSION "0.1.6" - - -#include <linux/config.h> -#include <linux/module.h> -#include <linux/kernel.h> -#include <linux/errno.h> -#include <linux/string.h> -#include <linux/mm.h> -#include <linux/tty.h> -#include <linux/slab.h> -#include <linux/delay.h> -#include <linux/fb.h> -#include <linux/ioport.h> -#include <linux/init.h> -#include <linux/pci.h> -#include <linux/vmalloc.h> - -#include <asm/io.h> -#include <asm/uaccess.h> -#if defined(__powerpc__) -#include <asm/prom.h> -#include <asm/pci-bridge.h> -#include "macmodes.h" - -#ifdef CONFIG_NVRAM -#include <linux/nvram.h> -#endif - -#ifdef CONFIG_PMAC_BACKLIGHT -#include <asm/backlight.h> -#endif - -#ifdef CONFIG_BOOTX_TEXT -#include <asm/btext.h> -#endif - -#ifdef CONFIG_ADB_PMU -#include <linux/adb.h> -#include <linux/pmu.h> -#endif - -#endif /* __powerpc__ */ - -#ifdef CONFIG_MTRR -#include <asm/mtrr.h> -#endif - -#include <video/radeon.h> -#include <linux/radeonfb.h> - -#define DEBUG 0 - -#if DEBUG -#define RTRACE printk -#else -#define RTRACE if(0) printk -#endif - -// XXX -#undef CONFIG_PMAC_PBOOK - - -enum radeon_chips { - RADEON_QD, - RADEON_QE, - RADEON_QF, - RADEON_QG, - RADEON_QY, - RADEON_QZ, - RADEON_LW, - RADEON_LX, - RADEON_LY, - RADEON_LZ, - RADEON_QL, - RADEON_QN, - RADEON_QO, - RADEON_Ql, - RADEON_BB, - RADEON_QW, - RADEON_QX, - RADEON_Id, - RADEON_Ie, - RADEON_If, - RADEON_Ig, - RADEON_Ya, - RADEON_Yd, - RADEON_Ld, - RADEON_Le, - RADEON_Lf, - RADEON_Lg, - RADEON_ND, - RADEON_NE, - RADEON_NF, - RADEON_NG, - RADEON_QM -}; - -enum radeon_arch { - RADEON_R100, - RADEON_RV100, - RADEON_R200, - RADEON_RV200, - RADEON_RV250, - RADEON_R300, - RADEON_M6, - RADEON_M7, - RADEON_M9 -}; - -static struct radeon_chip_info { - const char *name; - unsigned char arch; -} radeon_chip_info[] __devinitdata = { - { "QD", RADEON_R100 }, - { "QE", RADEON_R100 }, - { "QF", RADEON_R100 }, - { "QG", RADEON_R100 }, - { "VE QY", RADEON_RV100 }, - { "VE QZ", RADEON_RV100 }, - { "M7 LW", RADEON_M7 }, - { "M7 LX", RADEON_M7 }, - { "M6 LY", RADEON_M6 }, - { "M6 LZ", RADEON_M6 }, - { "8500 QL", RADEON_R200 }, - { "8500 QN", RADEON_R200 }, - { "8500 QO", RADEON_R200 }, - { "8500 Ql", RADEON_R200 }, - { "8500 BB", RADEON_R200 }, - { "7500 QW", RADEON_RV200 }, - { "7500 QX", RADEON_RV200 }, - { "9000 Id", RADEON_RV250 }, - { "9000 Ie", RADEON_RV250 }, - { "9000 If", RADEON_RV250 }, - { "9000 Ig", RADEON_RV250 }, - { "M9 Ld", RADEON_M9 }, - { "M9 Le", RADEON_M9 }, - { "M9 Lf", RADEON_M9 }, - { "M9 Lg", RADEON_M9 }, - { "9700 ND", RADEON_R300 }, - { "9700 NE", RADEON_R300 }, - { "9700 NF", RADEON_R300 }, - { "9700 NG", RADEON_R300 }, - { "9100 QM", RADEON_R200 } -}; - - -enum radeon_montype -{ - MT_NONE, - MT_CRT, /* CRT */ - MT_LCD, /* LCD */ - MT_DFP, /* DVI */ - MT_CTV, /* composite TV */ - MT_STV /* S-Video out */ -}; - - -static struct pci_device_id radeonfb_pci_table[] = { - { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_QD, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_QD}, - { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_QE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_QE}, - { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_QF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_QF}, - { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_QG, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_QG}, - { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_QY, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_QY}, - { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_QZ, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_QZ}, - { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_LW, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_LW}, - { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_LX, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_LX}, - { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_LY, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_LY}, - { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_LZ, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_LZ}, - { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_QL, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_QL}, - { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_QN, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_QN}, - { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_QO, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_QO}, - { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_Ql, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_Ql}, - { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_BB, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_BB}, - { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_QW, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_QW}, - { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_QX, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_QX}, - { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_Id, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_Id}, - { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_Ie, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_Ie}, - { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_If, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_If}, - { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_Ig, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_Ig}, - { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_Ya, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_Ya}, - { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_Yd, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_Yd}, - { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_Ld, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_Ld}, - { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_Le, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_Le}, - { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_Lf, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_Lf}, - { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_Lg, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_Lg}, - { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_ND, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_ND}, - { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_NE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_NE}, - { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_NF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_NF}, - { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_NG, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_NG}, - { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_RADEON_QM, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RADEON_QM}, - { 0, } -}; -MODULE_DEVICE_TABLE(pci, radeonfb_pci_table); - - -typedef struct { - u16 reg; - u32 val; -} reg_val; - - -/* these common regs are cleared before mode setting so they do not - * interfere with anything - */ -static reg_val common_regs[] = { - { OVR_CLR, 0 }, - { OVR_WID_LEFT_RIGHT, 0 }, - { OVR_WID_TOP_BOTTOM, 0 }, - { OV0_SCALE_CNTL, 0 }, - { SUBPIC_CNTL, 0 }, - { VIPH_CONTROL, 0 }, - { I2C_CNTL_1, 0 }, - { GEN_INT_CNTL, 0 }, - { CAP0_TRIG_CNTL, 0 }, -}; - -static reg_val common_regs_m6[] = { - { OVR_CLR, 0 }, - { OVR_WID_LEFT_RIGHT, 0 }, - { OVR_WID_TOP_BOTTOM, 0 }, - { OV0_SCALE_CNTL, 0 }, - { SUBPIC_CNTL, 0 }, - { GEN_INT_CNTL, 0 }, - { CAP0_TRIG_CNTL, 0 } -}; - -typedef struct { - u8 clock_chip_type; - u8 struct_size; - u8 accelerator_entry; - u8 VGA_entry; - u16 VGA_table_offset; - u16 POST_table_offset; - u16 XCLK; - u16 MCLK; - u8 num_PLL_blocks; - u8 size_PLL_blocks; - u16 PCLK_ref_freq; - u16 PCLK_ref_divider; - u32 PCLK_min_freq; - u32 PCLK_max_freq; - u16 MCLK_ref_freq; - u16 MCLK_ref_divider; - u32 MCLK_min_freq; - u32 MCLK_max_freq; - u16 XCLK_ref_freq; - u16 XCLK_ref_divider; - u32 XCLK_min_freq; - u32 XCLK_max_freq; -} __attribute__ ((packed)) PLL_BLOCK; - - -struct pll_info { - int ppll_max; - int ppll_min; - int xclk; - int ref_div; - int ref_clk; -}; - - -struct ram_info { - int ml; - int mb; - int trcd; - int trp; - int twr; - int cl; - int tr2w; - int loop_latency; - int rloop; -}; - - -struct radeon_regs { - /* CRTC regs */ - u32 crtc_h_total_disp; - u32 crtc_h_sync_strt_wid; - u32 crtc_v_total_disp; - u32 crtc_v_sync_strt_wid; - u32 crtc_pitch; - u32 crtc_gen_cntl; - u32 crtc_ext_cntl; - u32 dac_cntl; - - u32 flags; - u32 pix_clock; - int xres, yres; - - /* DDA regs */ - u32 dda_config; - u32 dda_on_off; - - /* PLL regs */ - u32 ppll_div_3; - u32 ppll_ref_div; - u32 vclk_ecp_cntl; - - /* Flat panel regs */ - u32 fp_crtc_h_total_disp; - u32 fp_crtc_v_total_disp; - u32 fp_gen_cntl; - u32 fp_h_sync_strt_wid; - u32 fp_horz_stretch; - u32 fp_panel_cntl; - u32 fp_v_sync_strt_wid; - u32 fp_vert_stretch; - u32 lvds_gen_cntl; - u32 lvds_pll_cntl; - u32 tmds_crc; - u32 tmds_transmitter_cntl; - -#if defined(__BIG_ENDIAN) - u32 surface_cntl; -#endif -}; - - -struct radeonfb_info { - struct fb_info info; - - struct radeon_regs state; - struct radeon_regs init_state; - - char name[32]; - char ram_type[12]; - - unsigned long mmio_base_phys; - unsigned long fb_base_phys; - - void __iomem *mmio_base; - void __iomem *fb_base; - - struct pci_dev *pdev; - - unsigned char *EDID; - unsigned char __iomem *bios_seg; - - u32 pseudo_palette[17]; - struct { u8 red, green, blue, pad; } palette[256]; - - int chipset; - unsigned char arch; - int video_ram; - u8 rev; - int pitch, bpp, depth; - int xres, yres, pixclock; - int xres_virtual, yres_virtual; - u32 accel_flags; - - int use_default_var; - int got_dfpinfo; - - int hasCRTC2; - int crtDisp_type; - int dviDisp_type; - - int panel_xres, panel_yres; - int clock; - int hOver_plus, hSync_width, hblank; - int vOver_plus, vSync_width, vblank; - int hAct_high, vAct_high, interlaced; - int synct, misc; - - u32 dp_gui_master_cntl; - - struct pll_info pll; - int pll_output_freq, post_div, fb_div; - - struct ram_info ram; - - int mtrr_hdl; - -#ifdef CONFIG_PMAC_PBOOK - int pm_reg; - u32 save_regs[64]; - u32 mdll, mdll2; -#endif /* CONFIG_PMAC_PBOOK */ - int asleep; - - struct radeonfb_info *next; -}; - - -static struct fb_var_screeninfo radeonfb_default_var = { - 640, 480, 640, 480, 0, 0, 8, 0, - {0, 6, 0}, {0, 6, 0}, {0, 6, 0}, {0, 0, 0}, - 0, 0, -1, -1, 0, 39721, 40, 24, 32, 11, 96, 2, - 0, FB_VMODE_NONINTERLACED -}; - -/* - * IO macros - */ - -#define INREG8(addr) readb((rinfo->mmio_base)+addr) -#define OUTREG8(addr,val) writeb(val, (rinfo->mmio_base)+addr) -#define INREG(addr) readl((rinfo->mmio_base)+addr) -#define OUTREG(addr,val) writel(val, (rinfo->mmio_base)+addr) - -#define OUTPLL(addr,val) \ - do { \ - OUTREG8(CLOCK_CNTL_INDEX, (addr & 0x0000003f) | 0x00000080); \ - OUTREG(CLOCK_CNTL_DATA, val); \ - } while(0) - -#define OUTPLLP(addr,val,mask) \ - do { \ - unsigned int _tmp = INPLL(addr); \ - _tmp &= (mask); \ - _tmp |= (val); \ - OUTPLL(addr, _tmp); \ - } while (0) - -#define OUTREGP(addr,val,mask) \ - do { \ - unsigned int _tmp = INREG(addr); \ - _tmp &= (mask); \ - _tmp |= (val); \ - OUTREG(addr, _tmp); \ - } while (0) - - -static __inline__ u32 _INPLL(struct radeonfb_info *rinfo, u32 addr) -{ - OUTREG8(CLOCK_CNTL_INDEX, addr & 0x0000003f); - return (INREG(CLOCK_CNTL_DATA)); -} - -#define INPLL(addr) _INPLL(rinfo, addr) - -#define PRIMARY_MONITOR(rinfo) ((rinfo->dviDisp_type != MT_NONE) && \ - (rinfo->dviDisp_type != MT_STV) && \ - (rinfo->dviDisp_type != MT_CTV) ? \ - rinfo->dviDisp_type : rinfo->crtDisp_type) - -static char *GET_MON_NAME(int type) -{ - char *pret = NULL; - - switch (type) { - case MT_NONE: - pret = "no"; - break; - case MT_CRT: - pret = "CRT"; - break; - case MT_DFP: - pret = "DFP"; - break; - case MT_LCD: - pret = "LCD"; - break; - case MT_CTV: - pret = "CTV"; - break; - case MT_STV: - pret = "STV"; - break; - } - - return pret; -} - - -/* - * 2D engine routines - */ - -static __inline__ void radeon_engine_flush (struct radeonfb_info *rinfo) -{ - int i; - - /* initiate flush */ - OUTREGP(RB2D_DSTCACHE_CTLSTAT, RB2D_DC_FLUSH_ALL, - ~RB2D_DC_FLUSH_ALL); - - for (i=0; i < 2000000; i++) { - if (!(INREG(RB2D_DSTCACHE_CTLSTAT) & RB2D_DC_BUSY)) - break; - } -} - - -static __inline__ void _radeon_fifo_wait (struct radeonfb_info *rinfo, int entries) -{ - int i; - - for (i=0; i<2000000; i++) - if ((INREG(RBBM_STATUS) & 0x7f) >= entries) - return; -} - - -static __inline__ void _radeon_engine_idle (struct radeonfb_info *rinfo) -{ - int i; - - /* ensure FIFO is empty before waiting for idle */ - _radeon_fifo_wait (rinfo, 64); - - for (i=0; i<2000000; i++) { - if (((INREG(RBBM_STATUS) & GUI_ACTIVE)) == 0) { - radeon_engine_flush (rinfo); - return; - } - } -} - - -#define radeon_engine_idle() _radeon_engine_idle(rinfo) -#define radeon_fifo_wait(entries) _radeon_fifo_wait(rinfo,entries) - - - -/* - * helper routines - */ - -static __inline__ u32 radeon_get_dstbpp(u16 depth) -{ - switch (depth) { - case 8: - return DST_8BPP; - case 15: - return DST_15BPP; - case 16: - return DST_16BPP; - case 32: - return DST_32BPP; - default: - return 0; - } -} - - -static inline int var_to_depth(const struct fb_var_screeninfo *var) -{ - if (var->bits_per_pixel != 16) - return var->bits_per_pixel; - return (var->green.length == 6) ? 16 : 15; -} - - -static void _radeon_engine_reset(struct radeonfb_info *rinfo) -{ - u32 clock_cntl_index, mclk_cntl, rbbm_soft_reset; - - radeon_engine_flush (rinfo); - - clock_cntl_index = INREG(CLOCK_CNTL_INDEX); - mclk_cntl = INPLL(MCLK_CNTL); - - OUTPLL(MCLK_CNTL, (mclk_cntl | - FORCEON_MCLKA | - FORCEON_MCLKB | - FORCEON_YCLKA | - FORCEON_YCLKB | - FORCEON_MC | - FORCEON_AIC)); - rbbm_soft_reset = INREG(RBBM_SOFT_RESET); - - OUTREG(RBBM_SOFT_RESET, rbbm_soft_reset | - SOFT_RESET_CP | - SOFT_RESET_HI | - SOFT_RESET_SE | - SOFT_RESET_RE | - SOFT_RESET_PP | - SOFT_RESET_E2 | - SOFT_RESET_RB); - INREG(RBBM_SOFT_RESET); - OUTREG(RBBM_SOFT_RESET, rbbm_soft_reset & (u32) - ~(SOFT_RESET_CP | - SOFT_RESET_HI | - SOFT_RESET_SE | - SOFT_RESET_RE | - SOFT_RESET_PP | - SOFT_RESET_E2 | - SOFT_RESET_RB)); - INREG(RBBM_SOFT_RESET); - - OUTPLL(MCLK_CNTL, mclk_cntl); - OUTREG(CLOCK_CNTL_INDEX, clock_cntl_index); - OUTREG(RBBM_SOFT_RESET, rbbm_soft_reset); - - return; -} - -#define radeon_engine_reset() _radeon_engine_reset(rinfo) - - -static __inline__ int round_div(int num, int den) -{ - return (num + (den / 2)) / den; -} - - - -static __inline__ int min_bits_req(int val) -{ - int bits_req = 0; - - if (val == 0) - bits_req = 1; - - while (val) { - val >>= 1; - bits_req++; - } - - return (bits_req); -} - - -static __inline__ int _max(int val1, int val2) -{ - if (val1 >= val2) - return val1; - else - return val2; -} - - - -/* - * globals - */ - -#ifndef MODULE -static char *mode_option; -#endif - -static char noaccel = 0; -static char mirror = 0; -static int panel_yres = 0; -static char force_dfp = 0; -static struct radeonfb_info *board_list = NULL; -static char nomtrr = 0; - -/* - * prototypes - */ - -static void radeon_save_state (struct radeonfb_info *rinfo, - struct radeon_regs *save); -static void radeon_engine_init (struct radeonfb_info *rinfo); -static void radeon_write_mode (struct radeonfb_info *rinfo, - struct radeon_regs *mode); -static int __devinit radeon_set_fbinfo (struct radeonfb_info *rinfo); -static int __devinit radeon_init_disp (struct radeonfb_info *rinfo); -static int radeon_init_disp_var (struct radeonfb_info *rinfo, struct fb_var_screeninfo *var); -static void __iomem *radeon_find_rom(struct radeonfb_info *rinfo); -static void radeon_get_pllinfo(struct radeonfb_info *rinfo, void __iomem *bios_seg); -static void radeon_get_moninfo (struct radeonfb_info *rinfo); -static int radeon_get_dfpinfo (struct radeonfb_info *rinfo); -static int radeon_get_dfpinfo_BIOS(struct radeonfb_info *rinfo); -static void radeon_get_EDID(struct radeonfb_info *rinfo); -static int radeon_dfp_parse_EDID(struct radeonfb_info *rinfo); -static void radeon_update_default_var(struct radeonfb_info *rinfo); - -#ifdef CONFIG_PPC_OF - -static int radeon_read_OF (struct radeonfb_info *rinfo); -static int radeon_get_EDID_OF(struct radeonfb_info *rinfo); -extern struct device_node *pci_device_to_OF_node(struct pci_dev *dev); - -#ifdef CONFIG_PMAC_PBOOK -int radeon_sleep_notify(struct pmu_sleep_notifier *self, int when); -static struct pmu_sleep_notifier radeon_sleep_notifier = { - radeon_sleep_notify, SLEEP_LEVEL_VIDEO, -}; -#endif /* CONFIG_PMAC_PBOOK */ -#ifdef CONFIG_PMAC_BACKLIGHT -static int radeon_set_backlight_enable(int on, int level, void *data); -static int radeon_set_backlight_level(int level, void *data); -static struct backlight_controller radeon_backlight_controller = { - radeon_set_backlight_enable, - radeon_set_backlight_level -}; -#endif /* CONFIG_PMAC_BACKLIGHT */ - -#endif /* CONFIG_PPC_OF */ - - -static void __iomem *radeon_find_rom(struct radeonfb_info *rinfo) -{ -#if defined(__i386__) - u32 segstart; - char __iomem *rom_base; - char __iomem *rom; - int stage; - int i,j; - char aty_rom_sig[] = "761295520"; - char *radeon_sig[] = { - "RG6", - "RADEON" - }; - - for(segstart=0x000c0000; segstart<0x000f0000; segstart+=0x00001000) { - - stage = 1; - - rom_base = ioremap(segstart, 0x1000); - - if ((*rom_base == 0x55) && (((*(rom_base + 1)) & 0xff) == 0xaa)) - stage = 2; - - - if (stage != 2) { - iounmap(rom_base); - continue; - } - - rom = rom_base; - - for (i = 0; (i < 128 - strlen(aty_rom_sig)) && (stage != 3); i++) { - if (aty_rom_sig[0] == *rom) - if (strncmp(aty_rom_sig, rom, - strlen(aty_rom_sig)) == 0) - stage = 3; - rom++; - } - if (stage != 3) { - iounmap(rom_base); - continue; - } - rom = rom_base; - - for (i = 0; (i < 512) && (stage != 4); i++) { - for (j = 0; j < ARRAY_SIZE(radeon_sig); j++) { - if (radeon_sig[j][0] == *rom) - if (strncmp(radeon_sig[j], rom, - strlen(radeon_sig[j])) == 0) { - stage = 4; - break; - } - } - rom++; - } - if (stage != 4) { - iounmap(rom_base); - continue; - } - - return rom_base; - } -#endif - return NULL; -} - - - - -static void radeon_get_pllinfo(struct radeonfb_info *rinfo, void __iomem *bios_seg) -{ - void __iomem *bios_header; - void __iomem *header_ptr; - u16 bios_header_offset, pll_info_offset; - PLL_BLOCK pll; - - if (bios_seg) { - bios_header = bios_seg + 0x48L; - header_ptr = bios_header; - - bios_header_offset = readw(header_ptr); - bios_header = bios_seg + bios_header_offset; - bios_header += 0x30; - - header_ptr = bios_header; - pll_info_offset = readw(header_ptr); - header_ptr = bios_seg + pll_info_offset; - - memcpy_fromio(&pll, header_ptr, 50); - - rinfo->pll.xclk = (u32)pll.XCLK; - rinfo->pll.ref_clk = (u32)pll.PCLK_ref_freq; - rinfo->pll.ref_div = (u32)pll.PCLK_ref_divider; - rinfo->pll.ppll_min = pll.PCLK_min_freq; - rinfo->pll.ppll_max = pll.PCLK_max_freq; - - printk("radeonfb: ref_clk=%d, ref_div=%d, xclk=%d from BIOS\n", - rinfo->pll.ref_clk, rinfo->pll.ref_div, rinfo->pll.xclk); - } else { -#ifdef CONFIG_PPC_OF - if (radeon_read_OF(rinfo)) { - unsigned int tmp, Nx, M, ref_div, xclk; - - tmp = INPLL(M_SPLL_REF_FB_DIV); - ref_div = INPLL(PPLL_REF_DIV) & 0x3ff; - - Nx = (tmp & 0xff00) >> 8; - M = (tmp & 0xff); - xclk = ((((2 * Nx * rinfo->pll.ref_clk) + (M)) / - (2 * M))); - - rinfo->pll.xclk = xclk; - rinfo->pll.ref_div = ref_div; - rinfo->pll.ppll_min = 12000; - rinfo->pll.ppll_max = 35000; - - printk("radeonfb: ref_clk=%d, ref_div=%d, xclk=%d from OF\n", - rinfo->pll.ref_clk, rinfo->pll.ref_div, rinfo->pll.xclk); - - return; - } -#endif - /* no BIOS or BIOS not found, use defaults */ - switch (rinfo->chipset) { - case PCI_DEVICE_ID_ATI_RADEON_QW: - case PCI_DEVICE_ID_ATI_RADEON_QX: - rinfo->pll.ppll_max = 35000; - rinfo->pll.ppll_min = 12000; - rinfo->pll.xclk = 23000; - rinfo->pll.ref_div = 12; - rinfo->pll.ref_clk = 2700; - break; - case PCI_DEVICE_ID_ATI_RADEON_QL: - case PCI_DEVICE_ID_ATI_RADEON_QN: - case PCI_DEVICE_ID_ATI_RADEON_QO: - case PCI_DEVICE_ID_ATI_RADEON_Ql: - case PCI_DEVICE_ID_ATI_RADEON_BB: - rinfo->pll.ppll_max = 35000; - rinfo->pll.ppll_min = 12000; - rinfo->pll.xclk = 27500; - rinfo->pll.ref_div = 12; - rinfo->pll.ref_clk = 2700; - break; - case PCI_DEVICE_ID_ATI_RADEON_Id: - case PCI_DEVICE_ID_ATI_RADEON_Ie: - case PCI_DEVICE_ID_ATI_RADEON_If: - case PCI_DEVICE_ID_ATI_RADEON_Ig: - rinfo->pll.ppll_max = 35000; - rinfo->pll.ppll_min = 12000; - rinfo->pll.xclk = 25000; - rinfo->pll.ref_div = 12; - rinfo->pll.ref_clk = 2700; - break; - case PCI_DEVICE_ID_ATI_RADEON_ND: - case PCI_DEVICE_ID_ATI_RADEON_NE: - case PCI_DEVICE_ID_ATI_RADEON_NF: - case PCI_DEVICE_ID_ATI_RADEON_NG: - rinfo->pll.ppll_max = 40000; - rinfo->pll.ppll_min = 20000; - rinfo->pll.xclk = 27000; - rinfo->pll.ref_div = 12; - rinfo->pll.ref_clk = 2700; - break; - case PCI_DEVICE_ID_ATI_RADEON_QD: - case PCI_DEVICE_ID_ATI_RADEON_QE: - case PCI_DEVICE_ID_ATI_RADEON_QF: - case PCI_DEVICE_ID_ATI_RADEON_QG: - default: - rinfo->pll.ppll_max = 35000; - rinfo->pll.ppll_min = 12000; - rinfo->pll.xclk = 16600; - rinfo->pll.ref_div = 67; - rinfo->pll.ref_clk = 2700; - break; - } - - printk("radeonfb: ref_clk=%d, ref_div=%d, xclk=%d defaults\n", - rinfo->pll.ref_clk, rinfo->pll.ref_div, rinfo->pll.xclk); - } -} - - -static void radeon_get_moninfo (struct radeonfb_info *rinfo) -{ - unsigned int tmp; - - if (force_dfp) { - rinfo->dviDisp_type = MT_DFP; - return; - } - - tmp = INREG(BIOS_4_SCRATCH); - printk(KERN_DEBUG "radeon_get_moninfo: bios 4 scratch = %x\n", tmp); - - if (rinfo->hasCRTC2) { - /* primary DVI port */ - if (tmp & 0x08) - rinfo->dviDisp_type = MT_DFP; - else if (tmp & 0x4) - rinfo->dviDisp_type = MT_LCD; - else if (tmp & 0x200) - rinfo->dviDisp_type = MT_CRT; - else if (tmp & 0x10) - rinfo->dviDisp_type = MT_CTV; - else if (tmp & 0x20) - rinfo->dviDisp_type = MT_STV; - - /* secondary CRT port */ - if (tmp & 0x2) - rinfo->crtDisp_type = MT_CRT; - else if (tmp & 0x800) - rinfo->crtDisp_type = MT_DFP; - else if (tmp & 0x400) - rinfo->crtDisp_type = MT_LCD; - else if (tmp & 0x1000) - rinfo->crtDisp_type = MT_CTV; - else if (tmp & 0x2000) - rinfo->crtDisp_type = MT_STV; - } else { - rinfo->dviDisp_type = MT_NONE; - - tmp = INREG(FP_GEN_CNTL); - - if (tmp & FP_EN_TMDS) - rinfo->crtDisp_type = MT_DFP; - else - rinfo->crtDisp_type = MT_CRT; - } -} - - - -static void radeon_get_EDID(struct radeonfb_info *rinfo) -{ -#ifdef CONFIG_PPC_OF - if (!radeon_get_EDID_OF(rinfo)) - RTRACE("radeonfb: could not retrieve EDID from OF\n"); -#else - /* XXX use other methods later */ -#endif -} - - -#ifdef CONFIG_PPC_OF -static int radeon_get_EDID_OF(struct radeonfb_info *rinfo) -{ - struct device_node *dp; - unsigned char *pedid = NULL; - static char *propnames[] = { "DFP,EDID", "LCD,EDID", "EDID", "EDID1", NULL }; - int i; - - dp = pci_device_to_OF_node(rinfo->pdev); - while (dp != NULL) { - for (i = 0; propnames[i] != NULL; ++i) { - pedid = (unsigned char *) - get_property(dp, propnames[i], NULL); - if (pedid != NULL) { - rinfo->EDID = pedid; - return 1; - } - } - dp = dp->child; - } - return 0; -} -#endif /* CONFIG_PPC_OF */ - - -static int radeon_dfp_parse_EDID(struct radeonfb_info *rinfo) -{ - unsigned char *block = rinfo->EDID; - - if (!block) - return 0; - - /* jump to the detailed timing block section */ - block += 54; - - rinfo->clock = (block[0] + (block[1] << 8)); - rinfo->panel_xres = (block[2] + ((block[4] & 0xf0) << 4)); - rinfo->hblank = (block[3] + ((block[4] & 0x0f) << 8)); - rinfo->panel_yres = (block[5] + ((block[7] & 0xf0) << 4)); - rinfo->vblank = (block[6] + ((block[7] & 0x0f) << 8)); - rinfo->hOver_plus = (block[8] + ((block[11] & 0xc0) << 2)); - rinfo->hSync_width = (block[9] + ((block[11] & 0x30) << 4)); - rinfo->vOver_plus = ((block[10] >> 4) + ((block[11] & 0x0c) << 2)); - rinfo->vSync_width = ((block[10] & 0x0f) + ((block[11] & 0x03) << 4)); - rinfo->interlaced = ((block[17] & 0x80) >> 7); - rinfo->synct = ((block[17] & 0x18) >> 3); - rinfo->misc = ((block[17] & 0x06) >> 1); - rinfo->hAct_high = rinfo->vAct_high = 0; - if (rinfo->synct == 3) { - if (rinfo->misc & 2) - rinfo->hAct_high = 1; - if (rinfo->misc & 1) - rinfo->vAct_high = 1; - } - - printk("radeonfb: detected DFP panel size from EDID: %dx%d\n", - rinfo->panel_xres, rinfo->panel_yres); - - rinfo->got_dfpinfo = 1; - - return 1; -} - - -static void radeon_update_default_var(struct radeonfb_info *rinfo) -{ - struct fb_var_screeninfo *var = &radeonfb_default_var; - - var->xres = rinfo->panel_xres; - var->yres = rinfo->panel_yres; - var->xres_virtual = rinfo->panel_xres; - var->yres_virtual = rinfo->panel_yres; - var->xoffset = var->yoffset = 0; - var->bits_per_pixel = 8; - var->pixclock = 100000000 / rinfo->clock; - var->left_margin = (rinfo->hblank - rinfo->hOver_plus - rinfo->hSync_width); - var->right_margin = rinfo->hOver_plus; - var->upper_margin = (rinfo->vblank - rinfo->vOver_plus - rinfo->vSync_width); - var->lower_margin = rinfo->vOver_plus; - var->hsync_len = rinfo->hSync_width; - var->vsync_len = rinfo->vSync_width; - var->sync = 0; - if (rinfo->synct == 3) { - if (rinfo->hAct_high) - var->sync |= FB_SYNC_HOR_HIGH_ACT; - if (rinfo->vAct_high) - var->sync |= FB_SYNC_VERT_HIGH_ACT; - } - - var->vmode = 0; - if (rinfo->interlaced) - var->vmode |= FB_VMODE_INTERLACED; - - rinfo->use_default_var = 1; -} - - -static int radeon_get_dfpinfo_BIOS(struct radeonfb_info *rinfo) -{ - char __iomem *fpbiosstart, *tmp, *tmp0; - char stmp[30]; - int i; - - if (!rinfo->bios_seg) - return 0; - - if (!(fpbiosstart = rinfo->bios_seg + readw(rinfo->bios_seg + 0x48))) { - printk("radeonfb: Failed to detect DFP panel info using BIOS\n"); - return 0; - } - - if (!(tmp = rinfo->bios_seg + readw(fpbiosstart + 0x40))) { - printk("radeonfb: Failed to detect DFP panel info using BIOS\n"); - return 0; - } - - for(i=0; i<24; i++) - stmp[i] = readb(tmp+i+1); - stmp[24] = 0; - printk("radeonfb: panel ID string: %s\n", stmp); - rinfo->panel_xres = readw(tmp + 25); - rinfo->panel_yres = readw(tmp + 27); - printk("radeonfb: detected DFP panel size from BIOS: %dx%d\n", - rinfo->panel_xres, rinfo->panel_yres); - - for(i=0; i<32; i++) { - tmp0 = rinfo->bios_seg + readw(tmp+64+i*2); - if (tmp0 == 0) - break; - if ((readw(tmp0) == rinfo->panel_xres) && - (readw(tmp0+2) == rinfo->panel_yres)) { - rinfo->hblank = (readw(tmp0+17) - readw(tmp0+19)) * 8; - rinfo->hOver_plus = ((readw(tmp0+21) - readw(tmp0+19) -1) * 8) & 0x7fff; - rinfo->hSync_width = readb(tmp0+23) * 8; - rinfo->vblank = readw(tmp0+24) - readw(tmp0+26); - rinfo->vOver_plus = (readw(tmp0+28) & 0x7ff) - readw(tmp0+26); - rinfo->vSync_width = (readw(tmp0+28) & 0xf800) >> 11; - rinfo->clock = readw(tmp0+9); - - rinfo->got_dfpinfo = 1; - return 1; - } - } - - return 0; -} - - - -static int radeon_get_dfpinfo (struct radeonfb_info *rinfo) -{ - unsigned int tmp; - unsigned short a, b; - - if (radeon_get_dfpinfo_BIOS(rinfo)) - radeon_update_default_var(rinfo); - - |