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authorTomi Valkeinen <tomi.valkeinen@ti.com>2014-02-13 15:31:38 +0200
committerTomi Valkeinen <tomi.valkeinen@ti.com>2014-04-17 08:10:19 +0300
commitf7018c21350204c4cf628462f229d44d03545254 (patch)
tree408787177164cf51cc06f7aabdb04fcff8d2b6aa /drivers/video/nvidia
parentc26ef3eb3c11274bad1b64498d0a134f85755250 (diff)
video: move fbdev to drivers/video/fbdev
The drivers/video directory is a mess. It contains generic video related files, directories for backlight, console, linux logo, lots of fbdev device drivers, fbdev framework files. Make some order into the chaos by creating drivers/video/fbdev directory, and move all fbdev related files there. No functionality is changed, although I guess it is possible that some subtle Makefile build order related issue could be created by this patch. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Geert Uytterhoeven <geert@linux-m68k.org> Acked-by: Rob Clark <robdclark@gmail.com> Acked-by: Jingoo Han <jg1.han@samsung.com> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/video/nvidia')
-rw-r--r--drivers/video/nvidia/Makefile13
-rw-r--r--drivers/video/nvidia/nv_accel.c416
-rw-r--r--drivers/video/nvidia/nv_backlight.c148
-rw-r--r--drivers/video/nvidia/nv_dma.h188
-rw-r--r--drivers/video/nvidia/nv_hw.c1687
-rw-r--r--drivers/video/nvidia/nv_i2c.c171
-rw-r--r--drivers/video/nvidia/nv_local.h114
-rw-r--r--drivers/video/nvidia/nv_of.c82
-rw-r--r--drivers/video/nvidia/nv_proto.h75
-rw-r--r--drivers/video/nvidia/nv_setup.c675
-rw-r--r--drivers/video/nvidia/nv_type.h180
-rw-r--r--drivers/video/nvidia/nvidia.c1607
12 files changed, 0 insertions, 5356 deletions
diff --git a/drivers/video/nvidia/Makefile b/drivers/video/nvidia/Makefile
deleted file mode 100644
index ca47432113e0..000000000000
--- a/drivers/video/nvidia/Makefile
+++ /dev/null
@@ -1,13 +0,0 @@
-#
-# Makefile for the nVidia framebuffer driver
-#
-
-obj-$(CONFIG_FB_NVIDIA) += nvidiafb.o
-
-nvidiafb-y := nvidia.o nv_hw.o nv_setup.o \
- nv_accel.o
-nvidiafb-$(CONFIG_FB_NVIDIA_I2C) += nv_i2c.o
-nvidiafb-$(CONFIG_FB_NVIDIA_BACKLIGHT) += nv_backlight.o
-nvidiafb-$(CONFIG_PPC_OF) += nv_of.o
-
-nvidiafb-objs := $(nvidiafb-y)
diff --git a/drivers/video/nvidia/nv_accel.c b/drivers/video/nvidia/nv_accel.c
deleted file mode 100644
index ad6472a894ea..000000000000
--- a/drivers/video/nvidia/nv_accel.c
+++ /dev/null
@@ -1,416 +0,0 @@
- /***************************************************************************\
-|* *|
-|* Copyright 1993-2003 NVIDIA, Corporation. All rights reserved. *|
-|* *|
-|* NOTICE TO USER: The source code is copyrighted under U.S. and *|
-|* international laws. Users and possessors of this source code are *|
-|* hereby granted a nonexclusive, royalty-free copyright license to *|
-|* use this code in individual and commercial software. *|
-|* *|
-|* Any use of this source code must include, in the user documenta- *|
-|* tion and internal comments to the code, notices to the end user *|
-|* as follows: *|
-|* *|
-|* Copyright 1993-2003 NVIDIA, Corporation. All rights reserved. *|
-|* *|
-|* NVIDIA, CORPORATION MAKES NO REPRESENTATION ABOUT THE SUITABILITY *|
-|* OF THIS SOURCE CODE FOR ANY PURPOSE. IT IS PROVIDED "AS IS" *|
-|* WITHOUT EXPRESS OR IMPLIED WARRANTY OF ANY KIND. NVIDIA, CORPOR- *|
-|* ATION DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOURCE CODE, *|
-|* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGE- *|
-|* MENT, AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT SHALL *|
-|* NVIDIA, CORPORATION BE LIABLE FOR ANY SPECIAL, INDIRECT, INCI- *|
-|* DENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY DAMAGES WHATSOEVER RE- *|
-|* SULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION *|
-|* OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF *|
-|* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOURCE CODE. *|
-|* *|
-|* U.S. Government End Users. This source code is a "commercial *|
-|* item," as that term is defined at 48 C.F.R. 2.101 (OCT 1995), *|
-|* consisting of "commercial computer software" and "commercial *|
-|* computer software documentation," as such terms are used in *|
-|* 48 C.F.R. 12.212 (SEPT 1995) and is provided to the U.S. Govern- *|
-|* ment only as a commercial end item. Consistent with 48 C.F.R. *|
-|* 12.212 and 48 C.F.R. 227.7202-1 through 227.7202-4 (JUNE 1995), *|
-|* all U.S. Government End Users acquire the source code with only *|
-|* those rights set forth herein. *|
-|* *|
- \***************************************************************************/
-
-/*
- * GPL Licensing Note - According to Mark Vojkovich, author of the Xorg/
- * XFree86 'nv' driver, this source code is provided under MIT-style licensing
- * where the source code is provided "as is" without warranty of any kind.
- * The only usage restriction is for the copyright notices to be retained
- * whenever code is used.
- *
- * Antonino Daplas <adaplas@pol.net> 2005-03-11
- */
-
-#include <linux/fb.h>
-#include "nv_type.h"
-#include "nv_proto.h"
-#include "nv_dma.h"
-#include "nv_local.h"
-
-/* There is a HW race condition with videoram command buffers.
- You can't jump to the location of your put offset. We write put
- at the jump offset + SKIPS dwords with noop padding in between
- to solve this problem */
-#define SKIPS 8
-
-static const int NVCopyROP[16] = {
- 0xCC, /* copy */
- 0x55 /* invert */
-};
-
-static const int NVCopyROP_PM[16] = {
- 0xCA, /* copy */
- 0x5A, /* invert */
-};
-
-static inline void nvidiafb_safe_mode(struct fb_info *info)
-{
- struct nvidia_par *par = info->par;
-
- touch_softlockup_watchdog();
- info->pixmap.scan_align = 1;
- par->lockup = 1;
-}
-
-static inline void NVFlush(struct fb_info *info)
-{
- struct nvidia_par *par = info->par;
- int count = 1000000000;
-
- while (--count && READ_GET(par) != par->dmaPut) ;
-
- if (!count) {
- printk("nvidiafb: DMA Flush lockup\n");
- nvidiafb_safe_mode(info);
- }
-}
-
-static inline void NVSync(struct fb_info *info)
-{
- struct nvidia_par *par = info->par;
- int count = 1000000000;
-
- while (--count && NV_RD32(par->PGRAPH, 0x0700)) ;
-
- if (!count) {
- printk("nvidiafb: DMA Sync lockup\n");
- nvidiafb_safe_mode(info);
- }
-}
-
-static void NVDmaKickoff(struct nvidia_par *par)
-{
- if (par->dmaCurrent != par->dmaPut) {
- par->dmaPut = par->dmaCurrent;
- WRITE_PUT(par, par->dmaPut);
- }
-}
-
-static void NVDmaWait(struct fb_info *info, int size)
-{
- struct nvidia_par *par = info->par;
- int dmaGet;
- int count = 1000000000, cnt;
- size++;
-
- while (par->dmaFree < size && --count && !par->lockup) {
- dmaGet = READ_GET(par);
-
- if (par->dmaPut >= dmaGet) {
- par->dmaFree = par->dmaMax - par->dmaCurrent;
- if (par->dmaFree < size) {
- NVDmaNext(par, 0x20000000);
- if (dmaGet <= SKIPS) {
- if (par->dmaPut <= SKIPS)
- WRITE_PUT(par, SKIPS + 1);
- cnt = 1000000000;
- do {
- dmaGet = READ_GET(par);
- } while (--cnt && dmaGet <= SKIPS);
- if (!cnt) {
- printk("DMA Get lockup\n");
- par->lockup = 1;
- }
- }
- WRITE_PUT(par, SKIPS);
- par->dmaCurrent = par->dmaPut = SKIPS;
- par->dmaFree = dmaGet - (SKIPS + 1);
- }
- } else
- par->dmaFree = dmaGet - par->dmaCurrent - 1;
- }
-
- if (!count) {
- printk("nvidiafb: DMA Wait Lockup\n");
- nvidiafb_safe_mode(info);
- }
-}
-
-static void NVSetPattern(struct fb_info *info, u32 clr0, u32 clr1,
- u32 pat0, u32 pat1)
-{
- struct nvidia_par *par = info->par;
-
- NVDmaStart(info, par, PATTERN_COLOR_0, 4);
- NVDmaNext(par, clr0);
- NVDmaNext(par, clr1);
- NVDmaNext(par, pat0);
- NVDmaNext(par, pat1);
-}
-
-static void NVSetRopSolid(struct fb_info *info, u32 rop, u32 planemask)
-{
- struct nvidia_par *par = info->par;
-
- if (planemask != ~0) {
- NVSetPattern(info, 0, planemask, ~0, ~0);
- if (par->currentRop != (rop + 32)) {
- NVDmaStart(info, par, ROP_SET, 1);
- NVDmaNext(par, NVCopyROP_PM[rop]);
- par->currentRop = rop + 32;
- }
- } else if (par->currentRop != rop) {
- if (par->currentRop >= 16)
- NVSetPattern(info, ~0, ~0, ~0, ~0);
- NVDmaStart(info, par, ROP_SET, 1);
- NVDmaNext(par, NVCopyROP[rop]);
- par->currentRop = rop;
- }
-}
-
-static void NVSetClippingRectangle(struct fb_info *info, int x1, int y1,
- int x2, int y2)
-{
- struct nvidia_par *par = info->par;
- int h = y2 - y1 + 1;
- int w = x2 - x1 + 1;
-
- NVDmaStart(info, par, CLIP_POINT, 2);
- NVDmaNext(par, (y1 << 16) | x1);
- NVDmaNext(par, (h << 16) | w);
-}
-
-void NVResetGraphics(struct fb_info *info)
-{
- struct nvidia_par *par = info->par;
- u32 surfaceFormat, patternFormat, rectFormat, lineFormat;
- int pitch, i;
-
- pitch = info->fix.line_length;
-
- par->dmaBase = (u32 __iomem *) (&par->FbStart[par->FbUsableSize]);
-
- for (i = 0; i < SKIPS; i++)
- NV_WR32(&par->dmaBase[i], 0, 0x00000000);
-
- NV_WR32(&par->dmaBase[0x0 + SKIPS], 0, 0x00040000);
- NV_WR32(&par->dmaBase[0x1 + SKIPS], 0, 0x80000010);
- NV_WR32(&par->dmaBase[0x2 + SKIPS], 0, 0x00042000);
- NV_WR32(&par->dmaBase[0x3 + SKIPS], 0, 0x80000011);
- NV_WR32(&par->dmaBase[0x4 + SKIPS], 0, 0x00044000);
- NV_WR32(&par->dmaBase[0x5 + SKIPS], 0, 0x80000012);
- NV_WR32(&par->dmaBase[0x6 + SKIPS], 0, 0x00046000);
- NV_WR32(&par->dmaBase[0x7 + SKIPS], 0, 0x80000013);
- NV_WR32(&par->dmaBase[0x8 + SKIPS], 0, 0x00048000);
- NV_WR32(&par->dmaBase[0x9 + SKIPS], 0, 0x80000014);
- NV_WR32(&par->dmaBase[0xA + SKIPS], 0, 0x0004A000);
- NV_WR32(&par->dmaBase[0xB + SKIPS], 0, 0x80000015);
- NV_WR32(&par->dmaBase[0xC + SKIPS], 0, 0x0004C000);
- NV_WR32(&par->dmaBase[0xD + SKIPS], 0, 0x80000016);
- NV_WR32(&par->dmaBase[0xE + SKIPS], 0, 0x0004E000);
- NV_WR32(&par->dmaBase[0xF + SKIPS], 0, 0x80000017);
-
- par->dmaPut = 0;
- par->dmaCurrent = 16 + SKIPS;
- par->dmaMax = 8191;
- par->dmaFree = par->dmaMax - par->dmaCurrent;
-
- switch (info->var.bits_per_pixel) {
- case 32:
- case 24:
- surfaceFormat = SURFACE_FORMAT_DEPTH24;
- patternFormat = PATTERN_FORMAT_DEPTH24;
- rectFormat = RECT_FORMAT_DEPTH24;
- lineFormat = LINE_FORMAT_DEPTH24;
- break;
- case 16:
- surfaceFormat = SURFACE_FORMAT_DEPTH16;
- patternFormat = PATTERN_FORMAT_DEPTH16;
- rectFormat = RECT_FORMAT_DEPTH16;
- lineFormat = LINE_FORMAT_DEPTH16;
- break;
- default:
- surfaceFormat = SURFACE_FORMAT_DEPTH8;
- patternFormat = PATTERN_FORMAT_DEPTH8;
- rectFormat = RECT_FORMAT_DEPTH8;
- lineFormat = LINE_FORMAT_DEPTH8;
- break;
- }
-
- NVDmaStart(info, par, SURFACE_FORMAT, 4);
- NVDmaNext(par, surfaceFormat);
- NVDmaNext(par, pitch | (pitch << 16));
- NVDmaNext(par, 0);
- NVDmaNext(par, 0);
-
- NVDmaStart(info, par, PATTERN_FORMAT, 1);
- NVDmaNext(par, patternFormat);
-
- NVDmaStart(info, par, RECT_FORMAT, 1);
- NVDmaNext(par, rectFormat);
-
- NVDmaStart(info, par, LINE_FORMAT, 1);
- NVDmaNext(par, lineFormat);
-
- par->currentRop = ~0; /* set to something invalid */
- NVSetRopSolid(info, ROP_COPY, ~0);
-
- NVSetClippingRectangle(info, 0, 0, info->var.xres_virtual,
- info->var.yres_virtual);
-
- NVDmaKickoff(par);
-}
-
-int nvidiafb_sync(struct fb_info *info)
-{
- struct nvidia_par *par = info->par;
-
- if (info->state != FBINFO_STATE_RUNNING)
- return 0;
-
- if (!par->lockup)
- NVFlush(info);
-
- if (!par->lockup)
- NVSync(info);
-
- return 0;
-}
-
-void nvidiafb_copyarea(struct fb_info *info, const struct fb_copyarea *region)
-{
- struct nvidia_par *par = info->par;
-
- if (info->state != FBINFO_STATE_RUNNING)
- return;
-
- if (par->lockup) {
- cfb_copyarea(info, region);
- return;
- }
-
- NVDmaStart(info, par, BLIT_POINT_SRC, 3);
- NVDmaNext(par, (region->sy << 16) | region->sx);
- NVDmaNext(par, (region->dy << 16) | region->dx);
- NVDmaNext(par, (region->height << 16) | region->width);
-
- NVDmaKickoff(par);
-}
-
-void nvidiafb_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
-{
- struct nvidia_par *par = info->par;
- u32 color;
-
- if (info->state != FBINFO_STATE_RUNNING)
- return;
-
- if (par->lockup) {
- cfb_fillrect(info, rect);
- return;
- }
-
- if (info->var.bits_per_pixel == 8)
- color = rect->color;
- else
- color = ((u32 *) info->pseudo_palette)[rect->color];
-
- if (rect->rop != ROP_COPY)
- NVSetRopSolid(info, rect->rop, ~0);
-
- NVDmaStart(info, par, RECT_SOLID_COLOR, 1);
- NVDmaNext(par, color);
-
- NVDmaStart(info, par, RECT_SOLID_RECTS(0), 2);
- NVDmaNext(par, (rect->dx << 16) | rect->dy);
- NVDmaNext(par, (rect->width << 16) | rect->height);
-
- NVDmaKickoff(par);
-
- if (rect->rop != ROP_COPY)
- NVSetRopSolid(info, ROP_COPY, ~0);
-}
-
-static void nvidiafb_mono_color_expand(struct fb_info *info,
- const struct fb_image *image)
-{
- struct nvidia_par *par = info->par;
- u32 fg, bg, mask = ~(~0 >> (32 - info->var.bits_per_pixel));
- u32 dsize, width, *data = (u32 *) image->data, tmp;
- int j, k = 0;
-
- width = (image->width + 31) & ~31;
- dsize = (width * image->height) >> 5;
-
- if (info->var.bits_per_pixel == 8) {
- fg = image->fg_color | mask;
- bg = image->bg_color | mask;
- } else {
- fg = ((u32 *) info->pseudo_palette)[image->fg_color] | mask;
- bg = ((u32 *) info->pseudo_palette)[image->bg_color] | mask;
- }
-
- NVDmaStart(info, par, RECT_EXPAND_TWO_COLOR_CLIP, 7);
- NVDmaNext(par, (image->dy << 16) | (image->dx & 0xffff));
- NVDmaNext(par, ((image->dy + image->height) << 16) |
- ((image->dx + image->width) & 0xffff));
- NVDmaNext(par, bg);
- NVDmaNext(par, fg);
- NVDmaNext(par, (image->height << 16) | width);
- NVDmaNext(par, (image->height << 16) | width);
- NVDmaNext(par, (image->dy << 16) | (image->dx & 0xffff));
-
- while (dsize >= RECT_EXPAND_TWO_COLOR_DATA_MAX_DWORDS) {
- NVDmaStart(info, par, RECT_EXPAND_TWO_COLOR_DATA(0),
- RECT_EXPAND_TWO_COLOR_DATA_MAX_DWORDS);
-
- for (j = RECT_EXPAND_TWO_COLOR_DATA_MAX_DWORDS; j--;) {
- tmp = data[k++];
- reverse_order(&tmp);
- NVDmaNext(par, tmp);
- }
-
- dsize -= RECT_EXPAND_TWO_COLOR_DATA_MAX_DWORDS;
- }
-
- if (dsize) {
- NVDmaStart(info, par, RECT_EXPAND_TWO_COLOR_DATA(0), dsize);
-
- for (j = dsize; j--;) {
- tmp = data[k++];
- reverse_order(&tmp);
- NVDmaNext(par, tmp);
- }
- }
-
- NVDmaKickoff(par);
-}
-
-void nvidiafb_imageblit(struct fb_info *info, const struct fb_image *image)
-{
- struct nvidia_par *par = info->par;
-
- if (info->state != FBINFO_STATE_RUNNING)
- return;
-
- if (image->depth == 1 && !par->lockup)
- nvidiafb_mono_color_expand(info, image);
- else
- cfb_imageblit(info, image);
-}
diff --git a/drivers/video/nvidia/nv_backlight.c b/drivers/video/nvidia/nv_backlight.c
deleted file mode 100644
index 8471008aa6ff..000000000000
--- a/drivers/video/nvidia/nv_backlight.c
+++ /dev/null
@@ -1,148 +0,0 @@
-/*
- * Backlight code for nVidia based graphic cards
- *
- * Copyright 2004 Antonino Daplas <adaplas@pol.net>
- * Copyright (c) 2006 Michael Hanselmann <linux-kernel@hansmi.ch>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/backlight.h>
-#include <linux/fb.h>
-#include <linux/pci.h>
-
-#ifdef CONFIG_PMAC_BACKLIGHT
-#include <asm/backlight.h>
-#endif
-
-#include "nv_local.h"
-#include "nv_type.h"
-#include "nv_proto.h"
-
-/* We do not have any information about which values are allowed, thus
- * we used safe values.
- */
-#define MIN_LEVEL 0x158
-#define MAX_LEVEL 0x534
-#define LEVEL_STEP ((MAX_LEVEL - MIN_LEVEL) / FB_BACKLIGHT_MAX)
-
-static int nvidia_bl_get_level_brightness(struct nvidia_par *par,
- int level)
-{
- struct fb_info *info = pci_get_drvdata(par->pci_dev);
- int nlevel;
-
- /* Get and convert the value */
- /* No locking of bl_curve since we read a single value */
- nlevel = MIN_LEVEL + info->bl_curve[level] * LEVEL_STEP;
-
- if (nlevel < 0)
- nlevel = 0;
- else if (nlevel < MIN_LEVEL)
- nlevel = MIN_LEVEL;
- else if (nlevel > MAX_LEVEL)
- nlevel = MAX_LEVEL;
-
- return nlevel;
-}
-
-static int nvidia_bl_update_status(struct backlight_device *bd)
-{
- struct nvidia_par *par = bl_get_data(bd);
- u32 tmp_pcrt, tmp_pmc, fpcontrol;
- int level;
-
- if (!par->FlatPanel)
- return 0;
-
- if (bd->props.power != FB_BLANK_UNBLANK ||
- bd->props.fb_blank != FB_BLANK_UNBLANK)
- level = 0;
- else
- level = bd->props.brightness;
-
- tmp_pmc = NV_RD32(par->PMC, 0x10F0) & 0x0000FFFF;
- tmp_pcrt = NV_RD32(par->PCRTC0, 0x081C) & 0xFFFFFFFC;
- fpcontrol = NV_RD32(par->PRAMDAC, 0x0848) & 0xCFFFFFCC;
-
- if (level > 0) {
- tmp_pcrt |= 0x1;
- tmp_pmc |= (1 << 31); /* backlight bit */
- tmp_pmc |= nvidia_bl_get_level_brightness(par, level) << 16;
- fpcontrol |= par->fpSyncs;
- } else
- fpcontrol |= 0x20000022;
-
- NV_WR32(par->PCRTC0, 0x081C, tmp_pcrt);
- NV_WR32(par->PMC, 0x10F0, tmp_pmc);
- NV_WR32(par->PRAMDAC, 0x848, fpcontrol);
-
- return 0;
-}
-
-static int nvidia_bl_get_brightness(struct backlight_device *bd)
-{
- return bd->props.brightness;
-}
-
-static const struct backlight_ops nvidia_bl_ops = {
- .get_brightness = nvidia_bl_get_brightness,
- .update_status = nvidia_bl_update_status,
-};
-
-void nvidia_bl_init(struct nvidia_par *par)
-{
- struct backlight_properties props;
- struct fb_info *info = pci_get_drvdata(par->pci_dev);
- struct backlight_device *bd;
- char name[12];
-
- if (!par->FlatPanel)
- return;
-
-#ifdef CONFIG_PMAC_BACKLIGHT
- if (!machine_is(powermac) ||
- !pmac_has_backlight_type("mnca"))
- return;
-#endif
-
- snprintf(name, sizeof(name), "nvidiabl%d", info->node);
-
- memset(&props, 0, sizeof(struct backlight_properties));
- props.type = BACKLIGHT_RAW;
- props.max_brightness = FB_BACKLIGHT_LEVELS - 1;
- bd = backlight_device_register(name, info->dev, par, &nvidia_bl_ops,
- &props);
- if (IS_ERR(bd)) {
- info->bl_dev = NULL;
- printk(KERN_WARNING "nvidia: Backlight registration failed\n");
- goto error;
- }
-
- info->bl_dev = bd;
- fb_bl_default_curve(info, 0,
- 0x158 * FB_BACKLIGHT_MAX / MAX_LEVEL,
- 0x534 * FB_BACKLIGHT_MAX / MAX_LEVEL);
-
- bd->props.brightness = bd->props.max_brightness;
- bd->props.power = FB_BLANK_UNBLANK;
- backlight_update_status(bd);
-
- printk("nvidia: Backlight initialized (%s)\n", name);
-
- return;
-
-error:
- return;
-}
-
-void nvidia_bl_exit(struct nvidia_par *par)
-{
- struct fb_info *info = pci_get_drvdata(par->pci_dev);
- struct backlight_device *bd = info->bl_dev;
-
- backlight_device_unregister(bd);
- printk("nvidia: Backlight unloaded\n");
-}
diff --git a/drivers/video/nvidia/nv_dma.h b/drivers/video/nvidia/nv_dma.h
deleted file mode 100644
index a7ed1c0acbbb..000000000000
--- a/drivers/video/nvidia/nv_dma.h
+++ /dev/null
@@ -1,188 +0,0 @@
-
- /***************************************************************************\
-|* *|
-|* Copyright 2003 NVIDIA, Corporation. All rights reserved. *|
-|* *|
-|* NOTICE TO USER: The source code is copyrighted under U.S. and *|
-|* international laws. Users and possessors of this source code are *|
-|* hereby granted a nonexclusive, royalty-free copyright license to *|
-|* use this code in individual and commercial software. *|
-|* *|
-|* Any use of this source code must include, in the user documenta- *|
-|* tion and internal comments to the code, notices to the end user *|
-|* as follows: *|
-|* *|
-|* Copyright 2003 NVIDIA, Corporation. All rights reserved. *|
-|* *|
-|* NVIDIA, CORPORATION MAKES NO REPRESENTATION ABOUT THE SUITABILITY *|
-|* OF THIS SOURCE CODE FOR ANY PURPOSE. IT IS PROVIDED "AS IS" *|
-|* WITHOUT EXPRESS OR IMPLIED WARRANTY OF ANY KIND. NVIDIA, CORPOR- *|
-|* ATION DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOURCE CODE, *|
-|* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGE- *|
-|* MENT, AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT SHALL *|
-|* NVIDIA, CORPORATION BE LIABLE FOR ANY SPECIAL, INDIRECT, INCI- *|
-|* DENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY DAMAGES WHATSOEVER RE- *|
-|* SULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION *|
-|* OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF *|
-|* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOURCE CODE. *|
-|* *|
-|* U.S. Government End Users. This source code is a "commercial *|
-|* item," as that term is defined at 48 C.F.R. 2.101 (OCT 1995), *|
-|* consisting of "commercial computer software" and "commercial *|
-|* computer software documentation," as such terms are used in *|
-|* 48 C.F.R. 12.212 (SEPT 1995) and is provided to the U.S. Govern- *|
-|* ment only as a commercial end item. Consistent with 48 C.F.R. *|
-|* 12.212 and 48 C.F.R. 227.7202-1 through 227.7202-4 (JUNE 1995), *|
-|* all U.S. Government End Users acquire the source code with only *|
-|* those rights set forth herein. *|
-|* *|
- \***************************************************************************/
-
-/*
- * GPL Licensing Note - According to Mark Vojkovich, author of the Xorg/
- * XFree86 'nv' driver, this source code is provided under MIT-style licensing
- * where the source code is provided "as is" without warranty of any kind.
- * The only usage restriction is for the copyright notices to be retained
- * whenever code is used.
- *
- * Antonino Daplas <adaplas@pol.net> 2005-03-11
- */
-
-#define SURFACE_FORMAT 0x00000300
-#define SURFACE_FORMAT_DEPTH8 0x00000001
-#define SURFACE_FORMAT_DEPTH15 0x00000002
-#define SURFACE_FORMAT_DEPTH16 0x00000004
-#define SURFACE_FORMAT_DEPTH24 0x00000006
-#define SURFACE_PITCH 0x00000304
-#define SURFACE_PITCH_SRC 15:0
-#define SURFACE_PITCH_DST 31:16
-#define SURFACE_OFFSET_SRC 0x00000308
-#define SURFACE_OFFSET_DST 0x0000030C
-
-#define ROP_SET 0x00002300
-
-#define PATTERN_FORMAT 0x00004300
-#define PATTERN_FORMAT_DEPTH8 0x00000003
-#define PATTERN_FORMAT_DEPTH16 0x00000001
-#define PATTERN_FORMAT_DEPTH24 0x00000003
-#define PATTERN_COLOR_0 0x00004310
-#define PATTERN_COLOR_1 0x00004314
-#define PATTERN_PATTERN_0 0x00004318
-#define PATTERN_PATTERN_1 0x0000431C
-
-#define CLIP_POINT 0x00006300
-#define CLIP_POINT_X 15:0
-#define CLIP_POINT_Y 31:16
-#define CLIP_SIZE 0x00006304
-#define CLIP_SIZE_WIDTH 15:0
-#define CLIP_SIZE_HEIGHT 31:16
-
-#define LINE_FORMAT 0x00008300
-#define LINE_FORMAT_DEPTH8 0x00000003
-#define LINE_FORMAT_DEPTH16 0x00000001
-#define LINE_FORMAT_DEPTH24 0x00000003
-#define LINE_COLOR 0x00008304
-#define LINE_MAX_LINES 16
-#define LINE_LINES(i) 0x00008400\
- +(i)*8
-#define LINE_LINES_POINT0_X 15:0
-#define LINE_LINES_POINT0_Y 31:16
-#define LINE_LINES_POINT1_X 47:32
-#define LINE_LINES_POINT1_Y 63:48
-
-#define BLIT_POINT_SRC 0x0000A300
-#define BLIT_POINT_SRC_X 15:0
-#define BLIT_POINT_SRC_Y 31:16
-#define BLIT_POINT_DST 0x0000A304
-#define BLIT_POINT_DST_X 15:0
-#define BLIT_POINT_DST_Y 31:16
-#define BLIT_SIZE 0x0000A308
-#define BLIT_SIZE_WIDTH 15:0
-#define BLIT_SIZE_HEIGHT 31:16
-
-#define RECT_FORMAT 0x0000C300
-#define RECT_FORMAT_DEPTH8 0x00000003
-#define RECT_FORMAT_DEPTH16 0x00000001
-#define RECT_FORMAT_DEPTH24 0x00000003
-#define RECT_SOLID_COLOR 0x0000C3FC
-#define RECT_SOLID_RECTS_MAX_RECTS 32
-#define RECT_SOLID_RECTS(i) 0x0000C400\
- +(i)*8
-#define RECT_SOLID_RECTS_Y 15:0
-#define RECT_SOLID_RECTS_X 31:16
-#define RECT_SOLID_RECTS_HEIGHT 47:32
-#define RECT_SOLID_RECTS_WIDTH 63:48
-
-#define RECT_EXPAND_ONE_COLOR_CLIP 0x0000C7EC
-#define RECT_EXPAND_ONE_COLOR_CLIP_POINT0_X 15:0
-#define RECT_EXPAND_ONE_COLOR_CLIP_POINT0_Y 31:16
-#define RECT_EXPAND_ONE_COLOR_CLIP_POINT1_X 47:32
-#define RECT_EXPAND_ONE_COLOR_CLIP_POINT1_Y 63:48
-#define RECT_EXPAND_ONE_COLOR_COLOR 0x0000C7F4
-#define RECT_EXPAND_ONE_COLOR_SIZE 0x0000C7F8
-#define RECT_EXPAND_ONE_COLOR_SIZE_WIDTH 15:0
-#define RECT_EXPAND_ONE_COLOR_SIZE_HEIGHT 31:16
-#define RECT_EXPAND_ONE_COLOR_POINT 0x0000C7FC
-#define RECT_EXPAND_ONE_COLOR_POINT_X 15:0
-#define RECT_EXPAND_ONE_COLOR_POINT_Y 31:16
-#define RECT_EXPAND_ONE_COLOR_DATA_MAX_DWORDS 128
-#define RECT_EXPAND_ONE_COLOR_DATA(i) 0x0000C800\
- +(i)*4
-
-#define RECT_EXPAND_TWO_COLOR_CLIP 0x0000CBE4
-#define RECT_EXPAND_TWO_COLOR_CLIP_POINT0_X 15:0
-#define RECT_EXPAND_TWO_COLOR_CLIP_POINT0_Y 31:16
-#define RECT_EXPAND_TWO_COLOR_CLIP_POINT1_X 47:32
-#define RECT_EXPAND_TWO_COLOR_CLIP_POINT1_Y 63:48
-#define RECT_EXPAND_TWO_COLOR_COLOR_0 0x0000CBEC
-#define RECT_EXPAND_TWO_COLOR_COLOR_1 0x0000CBF0
-#define RECT_EXPAND_TWO_COLOR_SIZE_IN 0x0000CBF4
-#define RECT_EXPAND_TWO_COLOR_SIZE_IN_WIDTH 15:0
-#define RECT_EXPAND_TWO_COLOR_SIZE_IN_HEIGHT 31:16
-#define RECT_EXPAND_TWO_COLOR_SIZE_OUT 0x0000CBF8
-#define RECT_EXPAND_TWO_COLOR_SIZE_OUT_WIDTH 15:0
-#define RECT_EXPAND_TWO_COLOR_SIZE_OUT_HEIGHT 31:16
-#define RECT_EXPAND_TWO_COLOR_POINT 0x0000CBFC
-#define RECT_EXPAND_TWO_COLOR_POINT_X 15:0
-#define RECT_EXPAND_TWO_COLOR_POINT_Y 31:16
-#define RECT_EXPAND_TWO_COLOR_DATA_MAX_DWORDS 128
-#define RECT_EXPAND_TWO_COLOR_DATA(i) 0x0000CC00\
- +(i)*4
-
-#define STRETCH_BLIT_FORMAT 0x0000E300
-#define STRETCH_BLIT_FORMAT_DEPTH8 0x00000004
-#define STRETCH_BLIT_FORMAT_DEPTH16 0x00000007
-#define STRETCH_BLIT_FORMAT_DEPTH24 0x00000004
-#define STRETCH_BLIT_FORMAT_X8R8G8B8 0x00000004
-#define STRETCH_BLIT_FORMAT_YUYV 0x00000005
-#define STRETCH_BLIT_FORMAT_UYVY 0x00000006
-#define STRETCH_BLIT_CLIP_POINT 0x0000E308
-#define STRETCH_BLIT_CLIP_POINT_X 15:0
-#define STRETCH_BLIT_CLIP_POINT_Y 31:16
-#define STRETCH_BLIT_CLIP_POINT 0x0000E308
-#define STRETCH_BLIT_CLIP_SIZE 0x0000E30C
-#define STRETCH_BLIT_CLIP_SIZE_WIDTH 15:0
-#define STRETCH_BLIT_CLIP_SIZE_HEIGHT 31:16
-#define STRETCH_BLIT_DST_POINT 0x0000E310
-#define STRETCH_BLIT_DST_POINT_X 15:0
-#define STRETCH_BLIT_DST_POINT_Y 31:16
-#define STRETCH_BLIT_DST_SIZE 0x0000E314
-#define STRETCH_BLIT_DST_SIZE_WIDTH 15:0
-#define STRETCH_BLIT_DST_SIZE_HEIGHT 31:16
-#define STRETCH_BLIT_DU_DX 0x0000E318
-#define STRETCH_BLIT_DV_DY 0x0000E31C
-#define STRETCH_BLIT_SRC_SIZE 0x0000E400
-#define STRETCH_BLIT_SRC_SIZE_WIDTH 15:0
-#define STRETCH_BLIT_SRC_SIZE_HEIGHT 31:16
-#define STRETCH_BLIT_SRC_FORMAT 0x0000E404
-#define STRETCH_BLIT_SRC_FORMAT_PITCH 15:0
-#define STRETCH_BLIT_SRC_FORMAT_ORIGIN 23:16
-#define STRETCH_BLIT_SRC_FORMAT_ORIGIN_CENTER 0x00000001
-#define STRETCH_BLIT_SRC_FORMAT_ORIGIN_CORNER 0x00000002
-#define STRETCH_BLIT_SRC_FORMAT_FILTER 31:24
-#define STRETCH_BLIT_SRC_FORMAT_FILTER_POINT_SAMPLE 0x00000000
-#define STRETCH_BLIT_SRC_FORMAT_FILTER_BILINEAR 0x00000001
-#define STRETCH_BLIT_SRC_OFFSET 0x0000E408
-#define STRETCH_BLIT_SRC_POINT 0x0000E40C
-#define STRETCH_BLIT_SRC_POINT_U 15:0
-#define STRETCH_BLIT_SRC_POINT_V 31:16
diff --git a/drivers/video/nvidia/nv_hw.c b/drivers/video/nvidia/nv_hw.c
deleted file mode 100644
index 81c80ac3c76f..000000000000
--- a/drivers/video/nvidia/nv_hw.c
+++ /dev/null
@@ -1,1687 +0,0 @@
- /***************************************************************************\
-|* *|
-|* Copyright 1993-2003 NVIDIA, Corporation. All rights reserved. *|
-|* *|
-|* NOTICE TO USER: The source code is copyrighted under U.S. and *|
-|* international laws. Users and possessors of this source code are *|
-|* hereby granted a nonexclusive, royalty-free copyright license to *|
-|* use this code in individual and commercial software. *|
-|* *|
-|* Any use of this source code must include, in the user documenta- *|
-|* tion and internal comments to the code, notices to the end user *|
-|* as follows: *|
-|* *|
-|* Copyright 1993-2003 NVIDIA, Corporation. All rights reserved. *|
-|* *|
-|* NVIDIA, CORPORATION MAKES NO REPRESENTATION ABOUT THE SUITABILITY *|
-|* OF THIS SOURCE CODE FOR ANY PURPOSE. IT IS PROVIDED "AS IS" *|
-|* WITHOUT EXPRESS OR IMPLIED WARRANTY OF ANY KIND. NVIDIA, CORPOR- *|
-|* ATION DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOURCE CODE, *|
-|* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGE- *|
-|* MENT, AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT SHALL *|
-|* NVIDIA, CORPORATION BE LIABLE FOR ANY SPECIAL, INDIRECT, INCI- *|
-|* DENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY DAMAGES WHATSOEVER RE- *|
-|* SULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION *|
-|* OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF *|
-|* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOURCE CODE. *|
-|* *|
-|* U.S. Government End Users. This source code is a "commercial *|
-|* item," as that term is defined at 48 C.F.R. 2.101 (OCT 1995), *|
-|* consisting of "commercial computer software" and "commercial *|
-|* computer software documentation," as such terms are used in *|
-|* 48 C.F.R. 12.212 (SEPT 1995) and is provided to the U.S. Govern- *|
-|* ment only as a commercial end item. Consistent with 48 C.F.R. *|
-|* 12.212 and 48 C.F.R. 227.7202-1 through 227.7202-4 (JUNE 1995), *|
-|* all U.