media: rockchip/vpu: rename from rockchip to hantro

Rename the driver and all relevant identifiers from Rockchip to Hantro,
as other Hantro IP based VPU implementations can be supported by the
same driver.
The RK3288 decoder is Hantro G1 based, the encoder is Hantro H1.

This patch just renames, no functional changes.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>

30 files changed, 1570 insertions, 1559 deletions

diff --git a/drivers/staging/media/Kconfig b/drivers/staging/media/Kconfig
index 7212762035b4..534d85d6c5e3 100644
--- a/drivers/staging/media/Kconfig
+++ b/drivers/staging/media/Kconfig
@@ -26,14 +26,14 @@ source "drivers/staging/media/bcm2048/Kconfig"
 
 source "drivers/staging/media/davinci_vpfe/Kconfig"
 
+source "drivers/staging/media/hantro/Kconfig"
+
 source "drivers/staging/media/imx/Kconfig"
 
 source "drivers/staging/media/meson/vdec/Kconfig"
 
 source "drivers/staging/media/omap4iss/Kconfig"
 
-source "drivers/staging/media/rockchip/vpu/Kconfig"
-
 source "drivers/staging/media/sunxi/Kconfig"
 
 source "drivers/staging/media/tegra-vde/Kconfig"
diff --git a/drivers/staging/media/Makefile b/drivers/staging/media/Makefile
index 4222584a9bcb..c486298194da 100644
--- a/drivers/staging/media/Makefile
+++ b/drivers/staging/media/Makefile
@@ -7,6 +7,6 @@ obj-$(CONFIG_VIDEO_MESON_VDEC)	+= meson/vdec/
 obj-$(CONFIG_VIDEO_OMAP4)	+= omap4iss/
 obj-$(CONFIG_VIDEO_SUNXI)	+= sunxi/
 obj-$(CONFIG_TEGRA_VDE)		+= tegra-vde/
-obj-$(CONFIG_VIDEO_ROCKCHIP_VPU) += rockchip/vpu/
+obj-$(CONFIG_VIDEO_HANTRO)	+= hantro/
 obj-$(CONFIG_VIDEO_IPU3_IMGU)	+= ipu3/
 obj-$(CONFIG_SOC_CAMERA)	+= soc_camera/
diff --git a/drivers/staging/media/hantro/Kconfig b/drivers/staging/media/hantro/Kconfig
new file mode 100644
index 000000000000..be133bbaa68a
--- /dev/null
+++ b/drivers/staging/media/hantro/Kconfig
@@ -0,0 +1,23 @@
+# SPDX-License-Identifier: GPL-2.0
+config VIDEO_HANTRO
+	tristate "Hantro VPU driver"
+	depends on ARCH_ROCKCHIP || COMPILE_TEST
+	depends on VIDEO_DEV && VIDEO_V4L2 && MEDIA_CONTROLLER
+	depends on MEDIA_CONTROLLER_REQUEST_API
+	select VIDEOBUF2_DMA_CONTIG
+	select VIDEOBUF2_VMALLOC
+	select V4L2_MEM2MEM_DEV
+	help
+	  Support for the Hantro IP based Video Processing Unit present on
+	  Rockchip SoC, which accelerates video and image encoding and
+	  decoding.
+	  To compile this driver as a module, choose M here: the module
+	  will be called hantro-vpu.
+
+config VIDEO_HANTRO_ROCKCHIP
+	bool "Hantro VPU Rockchip support"
+	depends on VIDEO_HANTRO
+	depends on ARCH_ROCKCHIP || COMPILE_TEST
+	default y
+	help
+	  Enable support for RK3288 and RK3399 SoCs.
diff --git a/drivers/staging/media/hantro/Makefile b/drivers/staging/media/hantro/Makefile
new file mode 100644
index 000000000000..1584acdbf4a3
--- /dev/null
+++ b/drivers/staging/media/hantro/Makefile
@@ -0,0 +1,15 @@
+obj-$(CONFIG_VIDEO_HANTRO) += hantro-vpu.o
+
+hantro-vpu-y += \
+		hantro_drv.o \
+		hantro_v4l2.o \
+		hantro_h1_jpeg_enc.o \
+		hantro_g1_mpeg2_dec.o \
+		rk3399_vpu_hw_jpeg_enc.o \
+		rk3399_vpu_hw_mpeg2_dec.o \
+		hantro_jpeg.o \
+		hantro_mpeg2.o
+
+hantro-vpu-$(CONFIG_VIDEO_HANTRO_ROCKCHIP) += \
+		rk3288_vpu_hw.o \
+		rk3399_vpu_hw.o
diff --git a/drivers/staging/media/rockchip/vpu/TODO b/drivers/staging/media/hantro/TODO
index fa0c94057007..fa0c94057007 100644
--- a/drivers/staging/media/rockchip/vpu/TODO
+++ b/drivers/staging/media/hantro/TODO
diff --git a/drivers/staging/media/rockchip/vpu/rockchip_vpu.h b/drivers/staging/media/hantro/hantro.h
index 3093821440c0..14e685428203 100644
--- a/drivers/staging/media/rockchip/vpu/rockchip_vpu.h
+++ b/drivers/staging/media/hantro/hantro.h
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0 */
 /*
- * Rockchip VPU codec driver
+ * Hantro VPU codec driver
  *
  * Copyright 2018 Google LLC.
  *	Tomasz Figa <tfiga@chromium.org>
@@ -9,8 +9,8 @@
  * Copyright (C) 2011 Samsung Electronics Co., Ltd.
  */
 
-#ifndef ROCKCHIP_VPU_H_
-#define ROCKCHIP_VPU_H_
+#ifndef HANTRO_H_
+#define HANTRO_H_
 
 #include <linux/platform_device.h>
 #include <linux/videodev2.h>
@@ -23,9 +23,9 @@
 #include <media/videobuf2-core.h>
 #include <media/videobuf2-dma-contig.h>
 
-#include "rockchip_vpu_hw.h"
+#include "hantro_hw.h"
 
-#define ROCKCHIP_VPU_MAX_CLOCKS		4
+#define HANTRO_MAX_CLOCKS		4
 
 #define MPEG2_MB_DIM			16
 #define MPEG2_MB_WIDTH(w)		DIV_ROUND_UP(w, MPEG2_MB_DIM)
@@ -35,17 +35,17 @@
 #define JPEG_MB_WIDTH(w)		DIV_ROUND_UP(w, JPEG_MB_DIM)
 #define JPEG_MB_HEIGHT(h)		DIV_ROUND_UP(h, JPEG_MB_DIM)
 
-struct rockchip_vpu_ctx;
-struct rockchip_vpu_codec_ops;
+struct hantro_ctx;
+struct hantro_codec_ops;
 
-#define RK_VPU_JPEG_ENCODER	BIT(0)
-#define RK_VPU_ENCODERS		0x0000ffff
+#define HANTRO_JPEG_ENCODER	BIT(0)
+#define HANTRO_ENCODERS		0x0000ffff
 
-#define RK_VPU_MPEG2_DECODER	BIT(16)
-#define RK_VPU_DECODERS		0xffff0000
+#define HANTRO_MPEG2_DECODER	BIT(16)
+#define HANTRO_DECODERS		0xffff0000
 
 /**
- * struct rockchip_vpu_variant - information about VPU hardware variant
+ * struct hantro_variant - information about VPU hardware variant
  *
  * @enc_offset:			Offset from VPU base to encoder registers.
  * @dec_offset:			Offset from VPU base to decoder registers.
@@ -61,48 +61,48 @@ struct rockchip_vpu_codec_ops;
  * @clk_names:			array of clock names
  * @num_clocks:			number of clocks in the array
  */
-struct rockchip_vpu_variant {
+struct hantro_variant {
 	unsigned int enc_offset;
 	unsigned int dec_offset;
-	const struct rockchip_vpu_fmt *enc_fmts;
+	const struct hantro_fmt *enc_fmts;
 	unsigned int num_enc_fmts;
-	const struct rockchip_vpu_fmt *dec_fmts;
+	const struct hantro_fmt *dec_fmts;
 	unsigned int num_dec_fmts;
 	unsigned int codec;
-	const struct rockchip_vpu_codec_ops *codec_ops;
-	int (*init)(struct rockchip_vpu_dev *vpu);
+	const struct hantro_codec_ops *codec_ops;
+	int (*init)(struct hantro_dev *vpu);
 	irqreturn_t (*vepu_irq)(int irq, void *priv);
 	irqreturn_t (*vdpu_irq)(int irq, void *priv);
-	const char *clk_names[ROCKCHIP_VPU_MAX_CLOCKS];
+	const char *clk_names[HANTRO_MAX_CLOCKS];
 	int num_clocks;
 };
 
 /**
- * enum rockchip_vpu_codec_mode - codec operating mode.
- * @RK_VPU_MODE_NONE:  No operating mode. Used for RAW video formats.
- * @RK_VPU_MODE_JPEG_ENC: JPEG encoder.
- * @RK_VPU_MODE_MPEG2_DEC: MPEG-2 decoder.
+ * enum hantro_codec_mode - codec operating mode.
+ * @HANTRO_MODE_NONE:  No operating mode. Used for RAW video formats.
+ * @HANTRO_MODE_JPEG_ENC: JPEG encoder.
+ * @HANTRO_MODE_MPEG2_DEC: MPEG-2 decoder.
  */
-enum rockchip_vpu_codec_mode {
-	RK_VPU_MODE_NONE = -1,
-	RK_VPU_MODE_JPEG_ENC,
-	RK_VPU_MODE_MPEG2_DEC,
+enum hantro_codec_mode {
+	HANTRO_MODE_NONE = -1,
+	HANTRO_MODE_JPEG_ENC,
+	HANTRO_MODE_MPEG2_DEC,
 };
 
 /*
- * struct rockchip_vpu_ctrl - helper type to declare supported controls
+ * struct hantro_ctrl - helper type to declare supported controls
  * @id:		V4L2 control ID (V4L2_CID_xxx)
- * @codec:	codec id this control belong to (RK_VPU_JPEG_ENCODER, etc.)
+ * @codec:	codec id this control belong to (HANTRO_JPEG_ENCODER, etc.)
  * @cfg:	control configuration
  */
-struct rockchip_vpu_ctrl {
+struct hantro_ctrl {
 	unsigned int id;
 	unsigned int codec;
 	struct v4l2_ctrl_config cfg;
 };
 
 /*
- * struct rockchip_vpu_func - rockchip VPU functionality
+ * struct hantro_func - Hantro VPU functionality
  *
  * @id:			processing functionality ID (can be
  *			%MEDIA_ENT_F_PROC_VIDEO_ENCODER or
@@ -119,7 +119,7 @@ struct rockchip_vpu_ctrl {
  *
  * Contains everything needed to attach the video device to the media device.
  */
-struct rockchip_vpu_func {
+struct hantro_func {
 	unsigned int id;
 	struct video_device vdev;
 	struct media_pad source_pad;
@@ -130,14 +130,14 @@ struct rockchip_vpu_func {
 	struct media_intf_devnode *intf_devnode;
 };
 
-static inline struct rockchip_vpu_func *
-rockchip_vpu_vdev_to_func(struct video_device *vdev)
+static inline struct hantro_func *
+hantro_vdev_to_func(struct video_device *vdev)
 {
-	return container_of(vdev, struct rockchip_vpu_func, vdev);
+	return container_of(vdev, struct hantro_func, vdev);
 }
 
 /**
- * struct rockchip_vpu_dev - driver data
+ * struct hantro_dev - driver data
  * @v4l2_dev:		V4L2 device to register video devices for.
  * @m2m_dev:		mem2mem device associated to this device.
  * @mdev:		media device associated to this device.
@@ -156,27 +156,27 @@ rockchip_vpu_vdev_to_func(struct video_device *vdev)
  * @variant:		Hardware variant-specific parameters.
  * @watchdog_work:	Delayed work for hardware timeout handling.
  */
-struct rockchip_vpu_dev {
+struct hantro_dev {
 	struct v4l2_device v4l2_dev;
 	struct v4l2_m2m_dev *m2m_dev;
 	struct media_device mdev;
-	struct rockchip_vpu_func *encoder;
-	struct rockchip_vpu_func *decoder;
+	struct hantro_func *encoder;
+	struct hantro_func *decoder;
 	struct platform_device *pdev;
 	struct device *dev;
-	struct clk_bulk_data clocks[ROCKCHIP_VPU_MAX_CLOCKS];
+	struct clk_bulk_data clocks[HANTRO_MAX_CLOCKS];
 	void __iomem *base;
 	void __iomem *enc_base;
 	void __iomem *dec_base;
 
 	struct mutex vpu_mutex;	/* video_device lock */
 	spinlock_t irqlock;
-	const struct rockchip_vpu_variant *variant;
+	const struct hantro_variant *variant;
 	struct delayed_work watchdog_work;
 };
 
 /**
- * struct rockchip_vpu_ctx - Context (instance) private data.
+ * struct hantro_ctx - Context (instance) private data.
  *
  * @dev:		VPU driver data to which the context belongs.
  * @fh:			V4L2 file handler.
@@ -199,52 +199,52 @@ struct rockchip_vpu_dev {
  * @jpeg_enc:		JPEG-encoding context.
  * @mpeg2_dec:		MPEG-2-decoding context.
  */
-struct rockchip_vpu_ctx {
-	struct rockchip_vpu_dev *dev;
+struct hantro_ctx {
+	struct hantro_dev *dev;
 	struct v4l2_fh fh;
 
 	u32 sequence_cap;
 	u32 sequence_out;
 
-	const struct rockchip_vpu_fmt *vpu_src_fmt;
+	const struct hantro_fmt *vpu_src_fmt;
 	struct v4l2_pix_format_mplane src_fmt;
-	const struct rockchip_vpu_fmt *vpu_dst_fmt;
+	const struct hantro_fmt *vpu_dst_fmt;
 	struct v4l2_pix_format_mplane dst_fmt;
 
 	struct v4l2_ctrl_handler ctrl_handler;
 	int jpeg_quality;
 
-	int (*buf_finish)(struct rockchip_vpu_ctx *ctx,
+	int (*buf_finish)(struct hantro_ctx *ctx,
 			  struct vb2_buffer *buf,
 			  unsigned int bytesused);
 
-	const struct rockchip_vpu_codec_ops *codec_ops;
+	const struct hantro_codec_ops *codec_ops;
 
 	/* Specific for particular codec modes. */
 	union {
-		struct rockchip_vpu_jpeg_enc_hw_ctx jpeg_enc;
-		struct rockchip_vpu_mpeg2_dec_hw_ctx mpeg2_dec;
+		struct hantro_jpeg_enc_hw_ctx jpeg_enc;
+		struct hantro_mpeg2_dec_hw_ctx mpeg2_dec;
 	};
 };
 
 /**
- * struct rockchip_vpu_fmt - information about supported video formats.
+ * struct hantro_fmt - information about supported video formats.
  * @name:	Human readable name of the format.
  * @fourcc:	FourCC code of the format. See V4L2_PIX_FMT_*.
  * @codec_mode:	Codec mode related to this format. See
- *		enum rockchip_vpu_codec_mode.
+ *		enum hantro_codec_mode.
  * @header_size: Optional header size. Currently used by JPEG encoder.
  * @max_depth:	Maximum depth, for bitstream formats
  * @enc_fmt:	Format identifier for encoder registers.
  * @frmsize:	Supported range of frame sizes (only for bitstream formats).
  */
-struct rockchip_vpu_fmt {
+struct hantro_fmt {
 	char *name;
 	u32 fourcc;
-	enum rockchip_vpu_codec_mode codec_mode;
+	enum hantro_codec_mode codec_mode;
 	int header_size;
 	int max_depth;
-	enum rockchip_vpu_enc_fmt enc_fmt;
+	enum hantro_enc_fmt enc_fmt;
 	struct v4l2_frmsize_stepwise frmsize;
 };
 
@@ -265,11 +265,11 @@ struct rockchip_vpu_fmt {
  * bit 5 - detail function enter/leave trace information
  * bit 6 - register write/read information
  */
-extern int rockchip_vpu_debug;
+extern int hantro_debug;
 
 #define vpu_debug(level, fmt, args...)				\
 	do {							\
-		if (rockchip_vpu_debug & BIT(level))		\
+		if (hantro_debug & BIT(level))		\
 			pr_info("%s:%d: " fmt,	                \
 				 __func__, __LINE__, ##args);	\
 	} while (0)
@@ -278,26 +278,26 @@ extern int rockchip_vpu_debug;
 	pr_err("%s:%d: " fmt, __func__, __LINE__, ##args)
 
 /* Structure access helpers. */
-static inline struct rockchip_vpu_ctx *fh_to_ctx(struct v4l2_fh *fh)
+static inline struct hantro_ctx *fh_to_ctx(struct v4l2_fh *fh)
 {
-	return container_of(fh, struct rockchip_vpu_ctx, fh);
+	return container_of(fh, struct hantro_ctx, fh);
 }
 
 /* Register accessors. */
-static inline void vepu_write_relaxed(struct rockchip_vpu_dev *vpu,
+static inline void vepu_write_relaxed(struct hantro_dev *vpu,
 				      u32 val, u32 reg)
 {
 	vpu_debug(6, "0x%04x = 0x%08x\n", reg / 4, val);
 	writel_relaxed(val, vpu->enc_base + reg);
 }
 
-static inline void vepu_write(struct rockchip_vpu_dev *vpu, u32 val, u32 reg)
+static inline void vepu_write(struct hantro_dev *vpu, u32 val, u32 reg)
 {
 	vpu_debug(6, "0x%04x = 0x%08x\n", reg / 4, val);
 	writel(val, vpu->enc_base + reg);
 }
 
-static inline u32 vepu_read(struct rockchip_vpu_dev *vpu, u32 reg)
+static inline u32 vepu_read(struct hantro_dev *vpu, u32 reg)
 {
 	u32 val = readl(vpu->enc_base + reg);
 
@@ -305,20 +305,20 @@ static inline u32 vepu_read(struct rockchip_vpu_dev *vpu, u32 reg)
 	return val;
 }
 
-static inline void vdpu_write_relaxed(struct rockchip_vpu_dev *vpu,
+static inline void vdpu_write_relaxed(struct hantro_dev *vpu,
 				      u32 val, u32 reg)
 {
 	vpu_debug(6, "0x%04x = 0x%08x\n", reg / 4, val);
 	writel_relaxed(val, vpu->dec_base + reg);
 }
 
-static inline void vdpu_write(struct rockchip_vpu_dev *vpu, u32 val, u32 reg)
+static inline void vdpu_write(struct hantro_dev *vpu, u32 val, u32 reg)
 {
 	vpu_debug(6, "0x%04x = 0x%08x\n", reg / 4, val);
 	writel(val, vpu->dec_base + reg);
 }
 
-static inline u32 vdpu_read(struct rockchip_vpu_dev *vpu, u32 reg)
+static inline u32 vdpu_read(struct hantro_dev *vpu, u32 reg)
 {
 	u32 val = readl(vpu->dec_base + reg);
 
@@ -326,9 +326,9 @@ static inline u32 vdpu_read(struct rockchip_vpu_dev *vpu, u32 reg)
 	return val;
 }
 
-bool rockchip_vpu_is_encoder_ctx(const struct rockchip_vpu_ctx *ctx);
+bool hantro_is_encoder_ctx(const struct hantro_ctx *ctx);
 
-void *rockchip_vpu_get_ctrl(struct rockchip_vpu_ctx *ctx, u32 id);
-dma_addr_t rockchip_vpu_get_ref(struct vb2_queue *q, u64 ts);
+void *hantro_get_ctrl(struct hantro_ctx *ctx, u32 id);
+dma_addr_t hantro_get_ref(struct vb2_queue *q, u64 ts);
 
-#endif /* ROCKCHIP_VPU_H_ */
+#endif /* HANTRO_H_ */
diff --git a/drivers/staging/media/rockchip/vpu/rockchip_vpu_drv.c b/drivers/staging/media/hantro/hantro_drv.c
index b94ff97451db..d325f63c7412 100644
--- a/drivers/staging/media/rockchip/vpu/rockchip_vpu_drv.c
+++ b/drivers/staging/media/hantro/hantro_drv.c
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0
 /*
- * Rockchip VPU codec driver
+ * Hantro VPU codec driver
  *
  * Copyright (C) 2018 Collabora, Ltd.
  * Copyright 2018 Google LLC.
@@ -24,18 +24,18 @@
 #include <media/videobuf2-core.h>
 #include <media/videobuf2-vmalloc.h>
 
-#include "rockchip_vpu_v4l2.h"
-#include "rockchip_vpu.h"
-#include "rockchip_vpu_hw.h"
+#include "hantro_v4l2.h"
+#include "hantro.h"
+#include "hantro_hw.h"
 
-#define DRIVER_NAME "rockchip-vpu"
+#define DRIVER_NAME "hantro-vpu"
 
-int rockchip_vpu_debug;
-module_param_named(debug, rockchip_vpu_debug, int, 0644);
+int hantro_debug;
+module_param_named(debug, hantro_debug, int, 0644);
 MODULE_PARM_DESC(debug,
 		 "Debug level - higher value produces more verbose messages");
 
-void *rockchip_vpu_get_ctrl(struct rockchip_vpu_ctx *ctx, u32 id)
+void *hantro_get_ctrl(struct hantro_ctx *ctx, u32 id)
 {
 	struct v4l2_ctrl *ctrl;
 
@@ -43,7 +43,7 @@ void *rockchip_vpu_get_ctrl(struct rockchip_vpu_ctx *ctx, u32 id)
 	return ctrl ? ctrl->p_cur.p : NULL;
 }
 
-dma_addr_t rockchip_vpu_get_ref(struct vb2_queue *q, u64 ts)
+dma_addr_t hantro_get_ref(struct vb2_queue *q, u64 ts)
 {
 	int index;
 
@@ -54,9 +54,8 @@ dma_addr_t rockchip_vpu_get_ref(struct vb2_queue *q, u64 ts)
 }
 
 static int
-rockchip_vpu_enc_buf_finish(struct rockchip_vpu_ctx *ctx,
-			    struct vb2_buffer *buf,
-			    unsigned int bytesused)
+hantro_enc_buf_finish(struct hantro_ctx *ctx, struct vb2_buffer *buf,
+		      unsigned int bytesused)
 {
 	size_t avail_size;
 
@@ -79,19 +78,18 @@ rockchip_vpu_enc_buf_finish(struct rockchip_vpu_ctx *ctx,
 }
 
 static int
-rockchip_vpu_dec_buf_finish(struct rockchip_vpu_ctx *ctx,
-			    struct vb2_buffer *buf,
-			    unsigned int bytesused)
+hantro_dec_buf_finish(struct hantro_ctx *ctx, struct vb2_buffer *buf,
+		      unsigned int bytesused)
 {
 	/* For decoders set bytesused as per the output picture. */
 	buf->planes[0].bytesused = ctx->dst_fmt.plane_fmt[0].sizeimage;
 	return 0;
 }
 
-static void rockchip_vpu_job_finish(struct rockchip_vpu_dev *vpu,
-				    struct rockchip_vpu_ctx *ctx,
-				    unsigned int bytesused,
-				    enum vb2_buffer_state result)
+static void hantro_job_finish(struct hantro_dev *vpu,
+			      struct hantro_ctx *ctx,
+			      unsigned int bytesused,
+			      enum vb2_buffer_state result)
 {
 	struct vb2_v4l2_buffer *src, *dst;
 	int ret;
@@ -123,11 +121,10 @@ static void rockchip_vpu_job_finish(struct rockchip_vpu_dev *vpu,
 	v4l2_m2m_job_finish(vpu->m2m_dev, ctx->fh.m2m_ctx);
 }
 
-void rockchip_vpu_irq_done(struct rockchip_vpu_dev *vpu,
-			   unsigned int bytesused,
-			   enum vb2_buffer_state result)
+void hantro_irq_done(struct hantro_dev *vpu, unsigned int bytesused,
+		     enum vb2_buffer_state result)
 {
-	struct rockchip_vpu_ctx *ctx =
+	struct hantro_ctx *ctx =
 		v4l2_m2m_get_curr_priv(vpu->m2m_dev);
 
 	/*
@@ -136,27 +133,27 @@ void rockchip_vpu_irq_done(struct rockchip_vpu_dev *vpu,
 	 * and will take care of finishing the job.
 	 */
 	if (cancel_delayed_work(&vpu->watchdog_work))
-		rockchip_vpu_job_finish(vpu, ctx, bytesused, result);
+		hantro_job_finish(vpu, ctx, bytesused, result);
 }
 
-void rockchip_vpu_watchdog(struct work_struct *work)
+void hantro_watchdog(struct work_struct *work)
 {
-	struct rockchip_vpu_dev *vpu;
-	struct rockchip_vpu_ctx *ctx;
+	struct hantro_dev *vpu;
+	struct hantro_ctx *ctx;
 
 	vpu = container_of(to_delayed_work(work),
-			   struct rockchip_vpu_dev, watchdog_work);
+			   struct hantro_dev, watchdog_work);
 	ctx = v4l2_m2m_get_curr_priv(vpu->m2m_dev);
 	if (ctx) {
 		vpu_err("frame processing timed out!\n");
 		ctx->codec_ops->reset(ctx);
-		rockchip_vpu_job_finish(vpu, ctx, 0, VB2_BUF_STATE_ERROR);
+		hantro_job_finish(vpu, ctx, 0, VB2_BUF_STATE_ERROR);
 	}
 }
 
 static void device_run(void *priv)
 {
-	struct rockchip_vpu_ctx *ctx = priv;
+	struct hantro_ctx *ctx = priv;
 	int ret;
 
 	ret = clk_bulk_enable(ctx->dev->variant->num_clocks, ctx->dev->clocks);
@@ -170,12 +167,12 @@ static void device_run(void *priv)
 	return;
 
 err_cancel_job:
-	rockchip_vpu_job_finish(ctx->dev, ctx, 0, VB2_BUF_STATE_ERROR);
+	hantro_job_finish(ctx->dev, ctx, 0, VB2_BUF_STATE_ERROR);
 }
 
-bool rockchip_vpu_is_encoder_ctx(const struct rockchip_vpu_ctx *ctx)
+bool hantro_is_encoder_ctx(const struct hantro_ctx *ctx)
 {
-	return ctx->buf_finish == rockchip_vpu_enc_buf_finish;
+	return ctx->buf_finish == hantro_enc_buf_finish;
 }
 
 static struct v4l2_m2m_ops vpu_m2m_ops = {
@@ -185,13 +182,13 @@ static struct v4l2_m2m_ops vpu_m2m_ops = {
 static int
 queue_init(void *priv, struct vb2_queue *src_vq, struct vb2_queue *dst_vq)
 {
-	struct rockchip_vpu_ctx *ctx = priv;
+	struct hantro_ctx *ctx = priv;
 	int ret;
 
 	src_vq->type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE;
 	src_vq->io_modes = VB2_MMAP | VB2_DMABUF;
 	src_vq->drv_priv = ctx;
-	src_vq->ops = &rockchip_vpu_queue_ops;
+	src_vq->ops = &hantro_queue_ops;
 	src_vq->mem_ops = &vb2_dma_contig_memops;
 
 	/*
@@ -218,7 +215,7 @@ queue_init(void *priv, struct vb2_queue *src_vq, struct vb2_queue *dst_vq)
 	 *
 	 * For the DMA destination buffer, we use a bounce buffer.
 	 */
-	if (rockchip_vpu_is_encoder_ctx(ctx)) {
+	if (hantro_is_encoder_ctx(ctx)) {
 		dst_vq->mem_ops = &vb2_vmalloc_memops;
 	} else {
 		dst_vq->bidirectional = true;
@@ -230,7 +227,7 @@ queue_init(void *priv, struct vb2_queue *src_vq, struct vb2_queue *dst_vq)
 	dst_vq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE;
 	dst_vq->io_modes = VB2_MMAP | VB2_DMABUF;
 	dst_vq->drv_priv = ctx;
-	dst_vq->ops = &rockchip_vpu_queue_ops;
+	dst_vq->ops = &hantro_queue_ops;
 	dst_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer);
 	dst_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY;
 	dst_vq->lock = &ctx->dev->vpu_mutex;
@@ -239,12 +236,12 @@ queue_init(void *priv, struct vb2_queue *src_vq, struct vb2_queue *dst_vq)
 	return vb2_queue_init(dst_vq);
 }
 
-static int rockchip_vpu_s_ctrl(struct v4l2_ctrl *ctrl)
+static int hantro_s_ctrl(struct v4l2_ctrl *ctrl)
 {
-	struct rockchip_vpu_ctx *ctx;
+	struct hantro_ctx *ctx;
 
 	ctx = container_of(ctrl->handler,
-			   struct rockchip_vpu_ctx, ctrl_handler);
+			   struct hantro_ctx, ctrl_handler);
 
 	vpu_debug(1, "s_ctrl: id = %d, val = %d\n", ctrl->id, ctrl->val);
 
@@ -259,14 +256,14 @@ static int rockchip_vpu_s_ctrl(struct v4l2_ctrl *ctrl)
 	return 0;
 }
 
-static const struct v4l2_ctrl_ops rockchip_vpu_ctrl_ops = {
-	.s_ctrl = rockchip_vpu_s_ctrl,
+static const struct v4l2_ctrl_ops hantro_ctrl_ops = {
+	.s_ctrl = hantro_s_ctrl,
 };
 
-static struct rockchip_vpu_ctrl controls[] = {
+static struct hantro_ctrl controls[] = {
 	{
 		.id = V4L2_CID_JPEG_COMPRESSION_QUALITY,
-		.codec = RK_VPU_JPEG_ENCODER,
+		.codec = HANTRO_JPEG_ENCODER,
 		.cfg = {
 			.min = 5,
 			.max = 100,
@@ -275,22 +272,22 @@ static struct rockchip_vpu_ctrl controls[] = {
 		},
 	}, {
 		.id = V4L2_CID_MPEG_VIDEO_MPEG2_SLICE_PARAMS,
-		.codec = RK_VPU_MPEG2_DECODER,
+		.codec = HANTRO_MPEG2_DECODER,
 		.cfg = {
 			.elem_size = sizeof(struct v4l2_ctrl_mpeg2_slice_params),
 		},
 	}, {
 		.id = V4L2_CID_MPEG_VIDEO_MPEG2_QUANTIZATION,
-		.codec = RK_VPU_MPEG2_DECODER,
+		.codec = HANTRO_MPEG2_DECODER,
 		.cfg = {
 			.elem_size = sizeof(struct v4l2_ctrl_mpeg2_quantization),
 		},
 	},
 };
 
-static int rockchip_vpu_ctrls_setup(struct rockchip_vpu_dev *vpu,
-				    struct rockchip_vpu_ctx *ctx,
-				    int allowed_codecs)
+static int hantro_ctrls_setup(struct hantro_dev *vpu,
+			      struct hantro_ctx *ctx,
+			      int allowed_codecs)
 {
 	int i, num_ctrls = ARRAY_SIZE(controls);
 
@@ -301,7 +298,7 @@ static int rockchip_vpu_ctrls_setup(struct rockchip_vpu_dev *vpu,
 			continue;
 		if (!controls[i].cfg.elem_size) {
 			v4l2_ctrl_new_std(&ctx->ctrl_handler,
-					  &rockchip_vpu_ctrl_ops,
+					  &hantro_ctrl_ops,
 					  controls[i].id, controls[i].cfg.min,
 					  controls[i].cfg.max,
 					  controls[i].cfg.step,
@@ -327,12 +324,12 @@ static int rockchip_vpu_ctrls_setup(struct rockchip_vpu_dev *vpu,
  * V4L2 file operations.
  */
 
-static int rockchip_vpu_open(struct file *filp)
+static int hantro_open(struct file *filp)
 {
-	struct rockchip_vpu_dev *vpu = video_drvdata(filp);
+	struct hantro_dev *vpu = video_drvdata(filp);
 	struct video_device *vdev = video_devdata(filp);
-	struct rockchip_vpu_func *func = rockchip_vpu_vdev_to_func(vdev);
-	struct rockchip_vpu_ctx *ctx;
+	struct hantro_func *func = hantro_vdev_to_func(vdev);
+	struct hantro_ctx *ctx;
 	int allowed_codecs, ret;
 
 	/*
@@ -350,13 +347,13 @@ static int rockchip_vpu_open(struct file *filp)
 
 	ctx->dev = vpu;
 	if (func->id == MEDIA_ENT_F_PROC_VIDEO_ENCODER) {
-		allowed_codecs = vpu->variant->codec & RK_VPU_ENCODERS;
-		ctx->buf_finish = rockchip_vpu_enc_buf_finish;
+		allowed_codecs = vpu->variant->codec & HANTRO_ENCODERS;
+		ctx->buf_finish = hantro_enc_buf_finish;
 		ctx->fh.m2m_ctx = v4l2_m2m_ctx_init(vpu->m2m_dev, ctx,
 						    queue_init);
 	} else if (func->id == MEDIA_ENT_F_PROC_VIDEO_DECODER) {
-		allowed_codecs = vpu->variant->codec & RK_VPU_DECODERS;
-		ctx->buf_finish = rockchip_vpu_dec_buf_finish;
+		allowed_codecs = vpu->variant->codec & HANTRO_DECODERS;
+		ctx->buf_finish = hantro_dec_buf_finish;
 		ctx->fh.m2m_ctx = v4l2_m2m_ctx_init(vpu->m2m_dev, ctx,
 						    queue_init);
 	} else {
@@ -372,9 +369,9 @@ static int rockchip_vpu_open(struct file *filp)
 	filp->private_data = &ctx->fh;
 	v4l2_fh_add(&ctx->fh);
 
-	rockchip_vpu_reset_fmts(ctx);
+	hantro_reset_fmts(ctx);
 
-	ret = rockchip_vpu_ctrls_setup(vpu, ctx, allowed_codecs);
+	ret = hantro_ctrls_setup(vpu, ctx, allowed_codecs);
 	if (ret) {
 		vpu_err("Failed to set up controls\n");
 		goto err_fh_free;
@@ -390,10 +387,10 @@ err_fh_free:
 	return ret;
 }
 
-static int rockchip_vpu_release(struct file *filp)
+static int hantro_release(struct file *filp)
 {
-	struct rockchip_vpu_ctx *ctx =
-		container_of(filp->private_data, struct rockchip_vpu_ctx, fh);
+	struct hantro_ctx *ctx =
+		container_of(filp->private_data, struct hantro_ctx, fh);
 
 	/*
 	 * No need for extra locking because this was the last reference
@@ -408,28 +405,29 @@ static int rockchip_vpu_release(struct file *filp)
 	return 0;
 }
 
-static const struct v4l2_file_operations rockchip_vpu_fops = {
+static const struct v4l2_file_operations hantro_fops = {
 	.owner = THIS_MODULE,
-	.open = rockchip_vpu_open,
-	.release = rockchip_vpu_release,
+	.open = hantro_open,
+	.release = hantro_release,
 	.poll = v4l2_m2m_fop_poll,
 	.unlocked_ioctl = video_ioctl2,
 	.mmap = v4l2_m2m_fop_mmap,
 };
 
-static const struct of_device_id of_rockchip_vpu_match[] = {
+static const struct of_device_id of_hantro_match[] = {
+#ifdef CONFIG_VIDEO_HANTRO_ROCKCHIP
 	{ .compatible = "rockchip,rk3399-vpu", .data = &rk3399_vpu_variant, },
 	{ .compatible = "rockchip,rk3288-vpu", .data = &rk3288_vpu_variant, },
+#endif
 	{ /* sentinel */ }
 };
-MODULE_DEVICE_TABLE(of, of_rockchip_vpu_match);
-
-static int rockchip_vpu_register_entity(struct media_device *mdev,
-					struct media_entity *entity,
-					const char *entity_name,
-					struct media_pad *pads, int num_pads,
-					int function,
-					struct video_device *vdev)
+MODULE_DEVICE_TABLE(of, of_hantro_match);
+
+static int hantro_register_entity(struct media_device *mdev,
+				  struct media_entity *entity,
+				  const char *entity_name,
+				  struct media_pad *pads, int num_pads,
+				  int function, struct video_device *vdev)
 {
 	char *name;
 	int ret;
@@ -459,8 +457,8 @@ static int rockchip_vpu_register_entity(struct media_device *mdev,
 	return 0;
 }
 
-static int rockchip_attach_func(struct rockchip_vpu_dev *vpu,
-				struct rockchip_vpu_func *func)
+static int hantro_attach_func(struct hantro_dev *vpu,
+			      struct hantro_func *func)
 {
 	struct media_device *mdev = &vpu->mdev;
 	struct media_link *link;