diff options
author | Elizabeth Ferdman <gnudevliz@gmail.com> | 2016-09-28 14:33:51 -0700 |
---|---|---|
committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2016-10-02 16:51:56 +0200 |
commit | 35e4d8ca05e87d38fb160cb35ba7c3282192a77b (patch) | |
tree | 5999b2753b0f4d2cc17b0527598b2fd981cf4158 /drivers/staging/sm750fb/ddk750_display.h | |
parent | 5cf62679153ed7014d6952bb6a5094b3ee31428d (diff) |
staging: sm750fb: conform to block comment style
Fix 2 checkpatch errors:
-Block comments use * on subsequent lines,
-Block comments use a trailing */ on a separate line
to conform to block commenting style.
Signed-off-by: Elizabeth Ferdman <gnudevliz@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/staging/sm750fb/ddk750_display.h')
-rw-r--r-- | drivers/staging/sm750fb/ddk750_display.h | 50 |
1 files changed, 24 insertions, 26 deletions
diff --git a/drivers/staging/sm750fb/ddk750_display.h b/drivers/staging/sm750fb/ddk750_display.h index 5fc9f6f47058..e3fde428c52b 100644 --- a/drivers/staging/sm750fb/ddk750_display.h +++ b/drivers/staging/sm750fb/ddk750_display.h @@ -2,8 +2,8 @@ #define DDK750_DISPLAY_H__ /* panel path select - 80000[29:28] -*/ + * 80000[29:28] + */ #define PNL_2_OFFSET 0 #define PNL_2_MASK (3 << PNL_2_OFFSET) @@ -13,9 +13,9 @@ /* primary timing & plane enable bit - 1: 80000[8] & 80000[2] on - 0: both off -*/ + * 1: 80000[8] & 80000[2] on + * 0: both off + */ #define PRI_TP_OFFSET 4 #define PRI_TP_MASK BIT(PRI_TP_OFFSET) #define PRI_TP_USAGE (PRI_TP_MASK << 16) @@ -24,8 +24,8 @@ /* panel sequency status - 80000[27:24] -*/ + * 80000[27:24] + */ #define PNL_SEQ_OFFSET 6 #define PNL_SEQ_MASK BIT(PNL_SEQ_OFFSET) #define PNL_SEQ_USAGE (PNL_SEQ_MASK << 16) @@ -33,8 +33,8 @@ #define PNL_SEQ_OFF ((0 << PNL_SEQ_OFFSET) | PNL_SEQ_USAGE) /* dual digital output - 80000[19] -*/ + * 80000[19] + */ #define DUAL_TFT_OFFSET 8 #define DUAL_TFT_MASK BIT(DUAL_TFT_OFFSET) #define DUAL_TFT_USAGE (DUAL_TFT_MASK << 16) @@ -42,9 +42,9 @@ #define DUAL_TFT_OFF ((0 << DUAL_TFT_OFFSET) | DUAL_TFT_USAGE) /* secondary timing & plane enable bit - 1:80200[8] & 80200[2] on - 0: both off -*/ + * 1:80200[8] & 80200[2] on + * 0: both off + */ #define SEC_TP_OFFSET 5 #define SEC_TP_MASK BIT(SEC_TP_OFFSET) #define SEC_TP_USAGE (SEC_TP_MASK << 16) @@ -52,8 +52,8 @@ #define SEC_TP_OFF ((0x0 << SEC_TP_OFFSET) | SEC_TP_USAGE) /* crt path select - 80200[19:18] -*/ + * 80200[19:18] + */ #define CRT_2_OFFSET 2 #define CRT_2_MASK (3 << CRT_2_OFFSET) #define CRT_2_USAGE (CRT_2_MASK << 16) @@ -62,8 +62,8 @@ /* DAC affect both DVI and DSUB - 4[20] -*/ + * 4[20] + */ #define DAC_OFFSET 7 #define DAC_MASK BIT(DAC_OFFSET) #define DAC_USAGE (DAC_MASK << 16) @@ -71,8 +71,8 @@ #define DAC_OFF ((0x1 << DAC_OFFSET) | DAC_USAGE) /* DPMS only affect D-SUB head - 0[31:30] -*/ + * 0[31:30] + */ #define DPMS_OFFSET 9 #define DPMS_MASK (3 << DPMS_OFFSET) #define DPMS_USAGE (DPMS_MASK << 16) @@ -81,19 +81,17 @@ -/* - LCD1 means panel path TFT1 & panel path DVI (so enable DAC) - CRT means crt path DSUB -*/ +/* LCD1 means panel path TFT1 & panel path DVI (so enable DAC) + * CRT means crt path DSUB + */ typedef enum _disp_output_t { do_LCD1_PRI = PNL_2_PRI | PRI_TP_ON | PNL_SEQ_ON | DAC_ON, do_LCD1_SEC = PNL_2_SEC | SEC_TP_ON | PNL_SEQ_ON | DAC_ON, do_LCD2_PRI = CRT_2_PRI | PRI_TP_ON | DUAL_TFT_ON, do_LCD2_SEC = CRT_2_SEC | SEC_TP_ON | DUAL_TFT_ON, - /* - do_DSUB_PRI = CRT_2_PRI|PRI_TP_ON|DPMS_ON|DAC_ON, - do_DSUB_SEC = CRT_2_SEC|SEC_TP_ON|DPMS_ON|DAC_ON, - */ + /* do_DSUB_PRI = CRT_2_PRI | PRI_TP_ON | DPMS_ON|DAC_ON, + * do_DSUB_SEC = CRT_2_SEC | SEC_TP_ON | DPMS_ON|DAC_ON, + */ do_CRT_PRI = CRT_2_PRI | PRI_TP_ON | DPMS_ON | DAC_ON, do_CRT_SEC = CRT_2_SEC | SEC_TP_ON | DPMS_ON | DAC_ON, } |