diff options
| author | Ioana Radulescu <ruxandra.radulescu@nxp.com> | 2017-06-06 10:00:39 -0500 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2017-06-13 12:04:38 +0200 |
| commit | 39163c0ce0f48557d0672fa2dd4cd7625e2cbaf7 (patch) | |
| tree | 23c43146f583e3c34d868366b5529641fc1bf8d0 /drivers/staging/fsl-dpaa2/ethernet/dpaa2-eth.h | |
| parent | 05fa39c6b93fd859cd768a48a1d9615edcff0a94 (diff) | |
staging: fsl-dpaa2/eth: Errors checking update
On the egress path, frame errors are reported using both a FD control
field and the frame annotation status. The current code only handles
FAS errors. Update to look at both fields when accounting Tx errors.
Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com>
Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/staging/fsl-dpaa2/ethernet/dpaa2-eth.h')
| -rw-r--r-- | drivers/staging/fsl-dpaa2/ethernet/dpaa2-eth.h | 17 |
1 files changed, 15 insertions, 2 deletions
diff --git a/drivers/staging/fsl-dpaa2/ethernet/dpaa2-eth.h b/drivers/staging/fsl-dpaa2/ethernet/dpaa2-eth.h index 886a0681fee1..e6d28a249fc1 100644 --- a/drivers/staging/fsl-dpaa2/ethernet/dpaa2-eth.h +++ b/drivers/staging/fsl-dpaa2/ethernet/dpaa2-eth.h @@ -120,6 +120,19 @@ struct dpaa2_eth_swa { #define DPAA2_FD_FRC_FASWOV 0x0800 #define DPAA2_FD_FRC_FAICFDV 0x0400 +/* Error bits in FD CTRL */ +#define DPAA2_FD_CTRL_UFD 0x00000004 +#define DPAA2_FD_CTRL_SBE 0x00000008 +#define DPAA2_FD_CTRL_FSE 0x00000010 +#define DPAA2_FD_CTRL_FAERR 0x00000020 + +#define DPAA2_FD_RX_ERR_MASK (DPAA2_FD_CTRL_SBE | \ + DPAA2_FD_CTRL_FAERR) +#define DPAA2_FD_TX_ERR_MASK (DPAA2_FD_CTRL_UFD | \ + DPAA2_FD_CTRL_SBE | \ + DPAA2_FD_CTRL_FSE | \ + DPAA2_FD_CTRL_FAERR) + /* Annotation bits in FD CTRL */ #define DPAA2_FD_CTRL_ASAL 0x00020000 /* ASAL = 128 */ #define DPAA2_FD_CTRL_PTA 0x00800000 @@ -177,7 +190,7 @@ struct dpaa2_fas { /* L4 csum error */ #define DPAA2_FAS_L4CE 0x00000001 /* Possible errors on the ingress path */ -#define DPAA2_ETH_RX_ERR_MASK (DPAA2_FAS_KSE | \ +#define DPAA2_FAS_RX_ERR_MASK (DPAA2_FAS_KSE | \ DPAA2_FAS_EOFHE | \ DPAA2_FAS_MNLE | \ DPAA2_FAS_TIDE | \ @@ -191,7 +204,7 @@ struct dpaa2_fas { DPAA2_FAS_L3CE | \ DPAA2_FAS_L4CE) /* Tx errors */ -#define DPAA2_ETH_TXCONF_ERR_MASK (DPAA2_FAS_KSE | \ +#define DPAA2_FAS_TX_ERR_MASK (DPAA2_FAS_KSE | \ DPAA2_FAS_EOFHE | \ DPAA2_FAS_MNLE | \ DPAA2_FAS_TIDE) |