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authorIoana Radulescu <ruxandra.radulescu@nxp.com>2017-12-08 06:47:56 -0600
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2017-12-08 16:33:29 +0100
commit2b7c86eb7bf3174a108de4ed808f5b48c3a55972 (patch)
tree2443f08f72299a5d78273888b00efbc8e7fdc9bd /drivers/staging/fsl-dpaa2/ethernet/dpaa2-eth.h
parent6662b5e4ef03fc0fd370dac7ecbdffc9fa510cdc (diff)
staging: fsl-dpaa2/eth: Don't enable FAS on Tx
For Tx confirmed frames that have an error indication in the frame descriptor, we look at the Frame Annotation Status field (in the buffer headroom) for details on the root cause and then print a debug message with that information. While useful in initial development stages, it doesn't bring enough added value to justify reserving 64B of headroom for all Tx frames (FAS is only 8B long, but we must reserve chunks of 64B from the hardware annotation area). If we remove the need for FAS field from egress frames, we can renounce hardware annotation completely, since FAS is the only HWA field we currently use. Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/staging/fsl-dpaa2/ethernet/dpaa2-eth.h')
-rw-r--r--drivers/staging/fsl-dpaa2/ethernet/dpaa2-eth.h6
1 files changed, 0 insertions, 6 deletions
diff --git a/drivers/staging/fsl-dpaa2/ethernet/dpaa2-eth.h b/drivers/staging/fsl-dpaa2/ethernet/dpaa2-eth.h
index 6940a98cf9c6..546a8624ac2f 100644
--- a/drivers/staging/fsl-dpaa2/ethernet/dpaa2-eth.h
+++ b/drivers/staging/fsl-dpaa2/ethernet/dpaa2-eth.h
@@ -134,7 +134,6 @@ struct dpaa2_eth_swa {
DPAA2_FD_CTRL_FAERR)
/* Annotation bits in FD CTRL */
-#define DPAA2_FD_CTRL_ASAL 0x00010000 /* ASAL = 64 */
#define DPAA2_FD_CTRL_PTA 0x00800000
#define DPAA2_FD_CTRL_PTV1 0x00400000
@@ -208,11 +207,6 @@ static inline struct dpaa2_fas *dpaa2_get_fas(void *buf_addr, bool swa)
DPAA2_FAS_BLE | \
DPAA2_FAS_L3CE | \
DPAA2_FAS_L4CE)
-/* Tx errors */
-#define DPAA2_FAS_TX_ERR_MASK (DPAA2_FAS_KSE | \
- DPAA2_FAS_EOFHE | \
- DPAA2_FAS_MNLE | \
- DPAA2_FAS_TIDE)
/* Time in milliseconds between link state updates */
#define DPAA2_ETH_LINK_STATE_REFRESH 1000