diff options
| author | Dmitry Osipenko <digetx@gmail.com> | 2017-10-20 01:08:03 +0300 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2017-12-21 17:03:49 +0100 |
| commit | 55a042b3f68fc8c68adf4333ff74c4d3de796589 (patch) | |
| tree | 7448a77c2b32958445b560bbf5cd53597826509a /drivers/soc/tegra/fuse/fuse-tegra20.c | |
| parent | c641ec6eab8587a78160d37f085a5ed6e542ca88 (diff) | |
soc/tegra: fuse: Fix reading registers using DMA on Tegra20
FUSE driver doesn't configure DMA channel properly, because of it DMA
transfer is never issued and tegra20_fuse_read() always return 0x0.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/soc/tegra/fuse/fuse-tegra20.c')
| -rw-r--r-- | drivers/soc/tegra/fuse/fuse-tegra20.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/soc/tegra/fuse/fuse-tegra20.c b/drivers/soc/tegra/fuse/fuse-tegra20.c index 294413a969a0..27e9ac7d3165 100644 --- a/drivers/soc/tegra/fuse/fuse-tegra20.c +++ b/drivers/soc/tegra/fuse/fuse-tegra20.c @@ -59,7 +59,7 @@ static u32 tegra20_fuse_read(struct tegra_fuse *fuse, unsigned int offset) mutex_lock(&fuse->apbdma.lock); - fuse->apbdma.config.src_addr = fuse->apbdma.phys + FUSE_BEGIN + offset; + fuse->apbdma.config.src_addr = fuse->phys + FUSE_BEGIN + offset; err = dmaengine_slave_config(fuse->apbdma.chan, &fuse->apbdma.config); if (err) @@ -119,6 +119,8 @@ static int tegra20_fuse_probe(struct tegra_fuse *fuse) fuse->apbdma.config.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; fuse->apbdma.config.src_maxburst = 1; fuse->apbdma.config.dst_maxburst = 1; + fuse->apbdma.config.direction = DMA_DEV_TO_MEM; + fuse->apbdma.config.device_fc = false; init_completion(&fuse->apbdma.wait); mutex_init(&fuse->apbdma.lock); |