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authorOndrej Jirman <megous@megous.com>2019-04-13 18:54:12 +0200
committerLinus Walleij <linus.walleij@linaro.org>2019-04-23 12:29:21 +0200
commitf7275345728a0ff18a0607dd3706f2ca25dc53e0 (patch)
tree9ed152f601716f531c7efe2763e7322391f1a44f /drivers/pinctrl/sunxi/pinctrl-sunxi.h
parent483d70d73beaecab55882fcd2a357af72674e24c (diff)
pinctrl: sunxi: Prepare for alternative bias voltage setting methods
H6 has a different I/O voltage bias setting method than A80. Prepare existing code for using alternative bias voltage setting methods. Signed-off-by: Ondrej Jirman <megous@megous.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/sunxi/pinctrl-sunxi.h')
-rw-r--r--drivers/pinctrl/sunxi/pinctrl-sunxi.h11
1 files changed, 10 insertions, 1 deletions
diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.h b/drivers/pinctrl/sunxi/pinctrl-sunxi.h
index ee15ab067b5f..a62b81357136 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sunxi.h
+++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.h
@@ -95,6 +95,15 @@
#define PINCTRL_SUN7I_A20 BIT(7)
#define PINCTRL_SUN8I_R40 BIT(8)
+enum sunxi_desc_bias_voltage {
+ BIAS_VOLTAGE_NONE,
+ /*
+ * Bias voltage configuration is done through
+ * Pn_GRP_CONFIG registers, as seen on A80 SoC.
+ */
+ BIAS_VOLTAGE_GRP_CONFIG,
+};
+
struct sunxi_desc_function {
unsigned long variant;
const char *name;
@@ -117,7 +126,7 @@ struct sunxi_pinctrl_desc {
const unsigned int *irq_bank_map;
bool irq_read_needs_mux;
bool disable_strict_mode;
- bool has_io_bias_cfg;
+ enum sunxi_desc_bias_voltage io_bias_cfg_variant;
};
struct sunxi_pinctrl_function {