diff options
| author | Jon Mason <jon.mason@intel.com> | 2013-07-15 15:26:14 -0700 |
|---|---|---|
| committer | Jon Mason <jon.mason@intel.com> | 2013-09-03 11:13:13 -0700 |
| commit | 87034511519815259e37336f52edf06d114d43b6 (patch) | |
| tree | d0f13be07b323e5a81d4daf1160fac3e51806a4d /drivers/ntb/ntb_regs.h | |
| parent | 3b12a0d15bd1559e72ad21d9d807fd2a6706f0ab (diff) | |
NTB: Correct Number of Scratch Pad Registers
The NTB Xeon hardware has 16 scratch pad registers and 16 back-to-back
scratch pad registers. Correct the #define to represent this and update
the variable names to reflect their usage.
Signed-off-by: Jon Mason <jon.mason@intel.com>
Diffstat (limited to 'drivers/ntb/ntb_regs.h')
| -rw-r--r-- | drivers/ntb/ntb_regs.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/ntb/ntb_regs.h b/drivers/ntb/ntb_regs.h index 5bfa8c06c059..96209b4abc22 100644 --- a/drivers/ntb/ntb_regs.h +++ b/drivers/ntb/ntb_regs.h @@ -53,8 +53,8 @@ #define NTB_LINK_WIDTH_MASK 0x03f0 #define SNB_MSIX_CNT 4 -#define SNB_MAX_SPADS 16 -#define SNB_MAX_COMPAT_SPADS 8 +#define SNB_MAX_B2B_SPADS 16 +#define SNB_MAX_COMPAT_SPADS 16 /* Reserve the uppermost bit for link interrupt */ #define SNB_MAX_DB_BITS 15 #define SNB_DB_BITS_PER_VEC 5 |