diff options
author | Dmitry Torokhov <dtor_core@ameritech.net> | 2005-09-06 15:19:19 -0700 |
---|---|---|
committer | Linus Torvalds <torvalds@g5.osdl.org> | 2005-09-07 16:57:57 -0700 |
commit | 98b7777331d4344821e900040da5d1d3016d9e67 (patch) | |
tree | d41fb0fca1dc8c8cc17049b2efb11a02c7f3aac1 /drivers/net | |
parent | 527b6af4133f433542a875dea7a24d58f8871d4b (diff) |
[PATCH] smsc-ircc2: formatting fixes
IRDA: smsc-ircc2 - some formatting changes for better readability.
Signed-off-by: Dmitry Torokhov <dtor@mail.ru>
Cc: Jean Tourrilhes <jt@hpl.hp.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'drivers/net')
-rw-r--r-- | drivers/net/irda/smsc-ircc2.c | 643 |
1 files changed, 317 insertions, 326 deletions
diff --git a/drivers/net/irda/smsc-ircc2.c b/drivers/net/irda/smsc-ircc2.c index 806e252b2ea0..ab3ff0cd0431 100644 --- a/drivers/net/irda/smsc-ircc2.c +++ b/drivers/net/irda/smsc-ircc2.c @@ -68,6 +68,36 @@ #include "smsc-ircc2.h" #include "smsc-sio.h" + +MODULE_AUTHOR("Daniele Peri <peri@csai.unipa.it>"); +MODULE_DESCRIPTION("SMC IrCC SIR/FIR controller driver"); +MODULE_LICENSE("GPL"); + + +static int ircc_dma = 255; +module_param(ircc_dma, int, 0); +MODULE_PARM_DESC(ircc_dma, "DMA channel"); + +static int ircc_irq = 255; +module_param(ircc_irq, int, 0); +MODULE_PARM_DESC(ircc_irq, "IRQ line"); + +static int ircc_fir; +module_param(ircc_fir, int, 0); +MODULE_PARM_DESC(ircc_fir, "FIR Base Address"); + +static int ircc_sir; +module_param(ircc_sir, int, 0); +MODULE_PARM_DESC(ircc_sir, "SIR Base Address"); + +static int ircc_cfg; +module_param(ircc_cfg, int, 0); +MODULE_PARM_DESC(ircc_cfg, "Configuration register base address"); + +static int ircc_transceiver; +module_param(ircc_transceiver, int, 0); +MODULE_PARM_DESC(ircc_transceiver, "Transceiver type"); + /* Types */ struct smsc_transceiver { @@ -136,7 +166,7 @@ static const char *driver_name = "smsc-ircc2"; #define DIM(x) (sizeof(x)/(sizeof(*(x)))) #define SMSC_IRCC2_C_IRDA_FALLBACK_SPEED 9600 #define SMSC_IRCC2_C_DEFAULT_TRANSCEIVER 1 -#define SMSC_IRCC2_C_NET_TIMEOUT 0 +#define SMSC_IRCC2_C_NET_TIMEOUT 0 #define SMSC_IRCC2_C_SIR_STOP 0 /* Prototypes */ @@ -179,7 +209,7 @@ static void smsc_ircc_sir_wait_hw_transmitter_finish(struct smsc_ircc_cb *self); /* Probing */ static int __init smsc_ircc_look_for_chips(void); -static const smsc_chip_t * __init smsc_ircc_probe(unsigned short cfg_base,u8 reg,const smsc_chip_t *chip,char *type); +static const smsc_chip_t * __init smsc_ircc_probe(unsigned short cfg_base, u8 reg, const smsc_chip_t *chip, char *type); static int __init smsc_superio_flat(const smsc_chip_t *chips, unsigned short cfg_base, char *type); static int __init smsc_superio_paged(const smsc_chip_t *chips, unsigned short cfg_base, char *type); static int __init smsc_superio_fdc(unsigned short cfg_base); @@ -203,12 +233,12 @@ static int smsc_ircc_pmproc(struct pm_dev *dev, pm_request_t rqst, void *data); /* Transceivers for SMSC-ircc */ -static smsc_transceiver_t smsc_transceivers[]= +static smsc_transceiver_t smsc_transceivers[] = { - { "Toshiba Satellite 1800 (GP data pin select)", smsc_ircc_set_transceiver_toshiba_sat1800, smsc_ircc_probe_transceiver_toshiba_sat1800}, - { "Fast pin select", smsc_ircc_set_transceiver_smsc_ircc_fast_pin_select, smsc_ircc_probe_transceiver_smsc_ircc_fast_pin_select}, - { "ATC IRMode", smsc_ircc_set_transceiver_smsc_ircc_atc, smsc_ircc_probe_transceiver_smsc_ircc_atc}, - { NULL, NULL} + { "Toshiba Satellite 1800 (GP data pin select)", smsc_ircc_set_transceiver_toshiba_sat1800, smsc_ircc_probe_transceiver_toshiba_sat1800 }, + { "Fast pin select", smsc_ircc_set_transceiver_smsc_ircc_fast_pin_select, smsc_ircc_probe_transceiver_smsc_ircc_fast_pin_select }, + { "ATC IRMode", smsc_ircc_set_transceiver_smsc_ircc_atc, smsc_ircc_probe_transceiver_smsc_ircc_atc }, + { NULL, NULL } }; #define SMSC_IRCC2_C_NUMBER_OF_TRANSCEIVERS (DIM(smsc_transceivers)-1) @@ -221,7 +251,7 @@ static smsc_transceiver_t smsc_transceivers[]= #define FIR 4 /* SuperIO Chip has fast IRDA */ #define SERx4 8 /* SuperIO Chip supports 115,2 KBaud * 4=460,8 KBaud */ -static smsc_chip_t __initdata fdc_chips_flat[]= +static smsc_chip_t __initdata fdc_chips_flat[] = { /* Base address 0x3f0 or 0x370 */ { "37C44", KEY55_1|NoIRDA, 0x00, 0x00 }, /* This chip cannot be detected */ @@ -235,7 +265,7 @@ static smsc_chip_t __initdata fdc_chips_flat[]= { NULL } }; -static smsc_chip_t __initdata fdc_chips_paged[]= +static smsc_chip_t __initdata fdc_chips_paged[] = { /* Base address 0x3f0 or 0x370 */ { "37B72X", KEY55_1|SIR|SERx4, 0x4c, 0x00 }, @@ -254,7 +284,7 @@ static smsc_chip_t __initdata fdc_chips_paged[]= { NULL } }; -static smsc_chip_t __initdata lpc_chips_flat[]= +static smsc_chip_t __initdata lpc_chips_flat[] = { /* Base address 0x2E or 0x4E */ { "47N227", KEY55_1|FIR|SERx4, 0x5a, 0x00 }, @@ -262,7 +292,7 @@ static smsc_chip_t __initdata lpc_chips_flat[]= { NULL } }; -static smsc_chip_t __initdata lpc_chips_paged[]= +static smsc_chip_t __initdata lpc_chips_paged[] = { /* Base address 0x2E or 0x4E */ { "47B27X", KEY55_1|SIR|SERx4, 0x51, 0x00 }, @@ -281,33 +311,25 @@ static smsc_chip_t __initdata lpc_chips_paged[]= #define SMSCSIO_TYPE_FLAT 4 #define SMSCSIO_TYPE_PAGED 8 -static smsc_chip_address_t __initdata possible_addresses[]= +static smsc_chip_address_t __initdata possible_addresses[] = { - {0x3f0, SMSCSIO_TYPE_FDC|SMSCSIO_TYPE_FLAT|SMSCSIO_TYPE_PAGED}, - {0x370, SMSCSIO_TYPE_FDC|SMSCSIO_TYPE_FLAT|SMSCSIO_TYPE_PAGED}, - {0xe0, SMSCSIO_TYPE_FDC|SMSCSIO_TYPE_FLAT|SMSCSIO_TYPE_PAGED}, - {0x2e, SMSCSIO_TYPE_LPC|SMSCSIO_TYPE_FLAT|SMSCSIO_TYPE_PAGED}, - {0x4e, SMSCSIO_TYPE_LPC|SMSCSIO_TYPE_FLAT|SMSCSIO_TYPE_PAGED}, - {0,0} + { 0x3f0, SMSCSIO_TYPE_FDC|SMSCSIO_TYPE_FLAT|SMSCSIO_TYPE_PAGED }, + { 0x370, SMSCSIO_TYPE_FDC|SMSCSIO_TYPE_FLAT|SMSCSIO_TYPE_PAGED }, + { 0xe0, SMSCSIO_TYPE_FDC|SMSCSIO_TYPE_FLAT|SMSCSIO_TYPE_PAGED }, + { 0x2e, SMSCSIO_TYPE_LPC|SMSCSIO_TYPE_FLAT|SMSCSIO_TYPE_PAGED }, + { 0x4e, SMSCSIO_TYPE_LPC|SMSCSIO_TYPE_FLAT|SMSCSIO_TYPE_PAGED }, + { 0, 0 } }; /* Globals */ -static struct smsc_ircc_cb *dev_self[] = { NULL, NULL}; - -static int ircc_irq=255; -static int ircc_dma=255; -static int ircc_fir=0; -static int ircc_sir=0; -static int ircc_cfg=0; -static int ircc_transceiver=0; - -static unsigned short dev_count=0; +static struct smsc_ircc_cb *dev_self[] = { NULL, NULL }; +static unsigned short dev_count; static inline void register_bank(int iobase, int bank) { - outb(((inb(iobase+IRCC_MASTER) & 0xf0) | (bank & 0x07)), - iobase+IRCC_MASTER); + outb(((inb(iobase + IRCC_MASTER) & 0xf0) | (bank & 0x07)), + iobase + IRCC_MASTER); } @@ -327,13 +349,13 @@ static inline void register_bank(int iobase, int bank) */ static int __init smsc_ircc_init(void) { - int ret=-ENODEV; + int ret = -ENODEV; IRDA_DEBUG(1, "%s\n", __FUNCTION__); - dev_count=0; + dev_count = 0; - if ((ircc_fir>0)&&(ircc_sir>0)) { + if (ircc_fir > 0 && ircc_sir > 0) { IRDA_MESSAGE(" Overriding FIR address 0x%04x\n", ircc_fir); IRDA_MESSAGE(" Overriding SIR address 0x%04x\n", ircc_sir); @@ -344,7 +366,7 @@ static int __init smsc_ircc_init(void) } /* try user provided configuration register base address */ - if (ircc_cfg>0) { + if (ircc_cfg > 0) { IRDA_MESSAGE(" Overriding configuration address 0x%04x\n", ircc_cfg); if (!smsc_superio_fdc(ircc_cfg)) @@ -353,7 +375,8 @@ static int __init smsc_ircc_init(void) ret = 0; } - if(smsc_ircc_look_for_chips()>0) ret = 0; + if (smsc_ircc_look_for_chips() > 0) + ret = 0; return ret; } @@ -373,7 +396,7 @@ static int __init smsc_ircc_open(unsigned int fir_base, unsigned int sir_base, u IRDA_DEBUG(1, "%s\n", __FUNCTION__); err = smsc_ircc_present(fir_base, sir_base); - if(err) + if (err) goto err_out; err = -ENOMEM; @@ -396,7 +419,7 @@ static int __init smsc_ircc_open(unsigned int fir_base, unsigned int sir_base, u dev->hard_start_xmit = smsc_ircc_hard_xmit_sir; #if SMSC_IRCC2_C_NET_TIMEOUT dev->tx_timeout = smsc_ircc_timeout; - dev->watchdog_timeo = HZ*2; /* Allow enough time for speed change */ + dev->watchdog_timeo = HZ * 2; /* Allow enough time for speed change */ #endif dev->open = smsc_ircc_net_open; dev->stop = smsc_ircc_net_close; @@ -444,19 +467,17 @@ static int __init smsc_ircc_open(unsigned int fir_base, unsigned int sir_base, u self->rx_buff.data = self->rx_buff.head; smsc_ircc_setup_io(self, fir_base, sir_base, dma, irq); - smsc_ircc_setup_qos(self); - smsc_ircc_init_chip(self); - if(ircc_transceiver > 0 && - ircc_transceiver < SMSC_IRCC2_C_NUMBER_OF_TRANSCEIVERS) + if (ircc_transceiver > 0 && + ircc_transceiver < SMSC_IRCC2_C_NUMBER_OF_TRANSCEIVERS) self->transceiver = ircc_transceiver; else smsc_ircc_probe_transceiver(self); err = register_netdev(self->netdev); - if(err) { + if (err) { IRDA_ERROR("%s, Network device registration failed!\n", driver_name); goto err_out4; @@ -469,6 +490,7 @@ static int __init smsc_ircc_open(unsigned int fir_base, unsigned int sir_base, u IRDA_MESSAGE("IrDA: Registered device %s\n", dev->name); return 0; + err_out4: dma_free_coherent(NULL, self->tx_buff.truesize, self->tx_buff.head, self->tx_buff_dma); @@ -511,16 +533,16 @@ static int smsc_ircc_present(unsigned int fir_base, unsigned int sir_base) register_bank(fir_base, 3); - high = inb(fir_base+IRCC_ID_HIGH); - low = inb(fir_base+IRCC_ID_LOW); - chip = inb(fir_base+IRCC_CHIP_ID); - version = inb(fir_base+IRCC_VERSION); - config = inb(fir_base+IRCC_INTERFACE); + high = inb(fir_base + IRCC_ID_HIGH); + low = inb(fir_base + IRCC_ID_LOW); + chip = inb(fir_base + IRCC_CHIP_ID); + version = inb(fir_base + IRCC_VERSION); + config = inb(fir_base + IRCC_INTERFACE); dma = config & IRCC_INTERFACE_DMA_MASK; irq = (config & IRCC_INTERFACE_IRQ_MASK) >> 4; if (high != 0x10 || low != 0xb8 || (chip != 0xf1 && chip != 0xf2)) { - IRDA_WARNING("%s(), addr 0x%04x - no device found!\n", + IRDA_WARNING("%s(), addr 0x%04x - no device found!\n", __FUNCTION__, fir_base); goto out3; } @@ -529,6 +551,7 @@ static int smsc_ircc_present(unsigned int fir_base, unsigned int sir_base) chip & 0x0f, version, fir_base, sir_base, dma, irq); return 0; + out3: release_region(sir_base, SMSC_IRCC2_SIR_CHIP_IO_EXTENT); out2: @@ -550,9 +573,9 @@ static void smsc_ircc_setup_io(struct smsc_ircc_cb *self, unsigned char config, chip_dma, chip_irq; register_bank(fir_base, 3); - config = inb(fir_base+IRCC_INTERFACE); - chip_dma = config & IRCC_INTERFACE_DMA_MASK; - chip_irq = (config & IRCC_INTERFACE_IRQ_MASK) >> 4; + config = inb(fir_base + IRCC_INTERFACE); + chip_dma = config & IRCC_INTERFACE_DMA_MASK; + chip_irq = (config & IRCC_INTERFACE_IRQ_MASK) >> 4; self->io.fir_base = fir_base; self->io.sir_base = sir_base; @@ -566,8 +589,7 @@ static void smsc_ircc_setup_io(struct smsc_ircc_cb *self, IRDA_MESSAGE("%s, Overriding IRQ - chip says %d, using %d\n", driver_name, chip_irq, irq); self->io.irq = irq; - } - else + } else self->io.irq = chip_irq; if (dma < 255) { @@ -575,8 +597,7 @@ static void smsc_ircc_setup_io(struct smsc_ircc_cb *self, IRDA_MESSAGE("%s, Overriding DMA - chip says %d, using %d\n", driver_name, chip_dma, dma); self->io.dma = dma; - } - else + } else self->io.dma = chip_dma; } @@ -610,41 +631,41 @@ static void smsc_ircc_init_chip(struct smsc_ircc_cb *self) { int iobase, ir_mode, ctrl, fast; - IRDA_ASSERT( self != NULL, return; ); - iobase = self->io.fir_base; + IRDA_ASSERT(self != NULL, return;); + iobase = self->io.fir_base; ir_mode = IRCC_CFGA_IRDA_SIR_A; ctrl = 0; fast = 0; register_bank(iobase, 0); - outb(IRCC_MASTER_RESET, iobase+IRCC_MASTER); - outb(0x00, iobase+IRCC_MASTER); + outb(IRCC_MASTER_RESET, iobase + IRCC_MASTER); + outb(0x00, iobase + IRCC_MASTER); register_bank(iobase, 1); - outb(((inb(iobase+IRCC_SCE_CFGA) & 0x87) | ir_mode), - iobase+IRCC_SCE_CFGA); + outb(((inb(iobase + IRCC_SCE_CFGA) & 0x87) | ir_mode), + iobase + IRCC_SCE_CFGA); #ifdef smsc_669 /* Uses pin 88/89 for Rx/Tx */ - outb(((inb(iobase+IRCC_SCE_CFGB) & 0x3f) | IRCC_CFGB_MUX_COM), - iobase+IRCC_SCE_CFGB); + outb(((inb(iobase + IRCC_SCE_CFGB) & 0x3f) | IRCC_CFGB_MUX_COM), + iobase + IRCC_SCE_CFGB); #else - outb(((inb(iobase+IRCC_SCE_CFGB) & 0x3f) | IRCC_CFGB_MUX_IR), - iobase+IRCC_SCE_CFGB); + outb(((inb(iobase + IRCC_SCE_CFGB) & 0x3f) | IRCC_CFGB_MUX_IR), + iobase + IRCC_SCE_CFGB); #endif - (void) inb(iobase+IRCC_FIFO_THRESHOLD); - outb(SMSC_IRCC2_FIFO_THRESHOLD, iobase+IRCC_FIFO_THRESHOLD); + (void) inb(iobase + IRCC_FIFO_THRESHOLD); + outb(SMSC_IRCC2_FIFO_THRESHOLD, iobase + IRCC_FIFO_THRESHOLD); register_bank(iobase, 4); - outb((inb(iobase+IRCC_CONTROL) & 0x30) | ctrl, iobase+IRCC_CONTROL); + outb((inb(iobase + IRCC_CONTROL) & 0x30) | ctrl, iobase + IRCC_CONTROL); register_bank(iobase, 0); - outb(fast, iobase+IRCC_LCR_A); + outb(fast, iobase + IRCC_LCR_A); smsc_ircc_set_sir_speed(self, SMSC_IRCC2_C_IRDA_FALLBACK_SPEED); /* Power on device */ - outb(0x00, iobase+IRCC_MASTER); + outb(0x00, iobase + IRCC_MASTER); } /* @@ -770,7 +791,7 @@ int smsc_ircc_hard_xmit_sir(struct sk_buff *skb, struct net_device *dev) /* Check if we need to change the speed */ speed = irda_get_next_speed(skb); - if ((speed != self->io.speed) && (speed != -1)) { + if (speed != self->io.speed && speed != -1) { /* Check for empty frame */ if (!skb->len) { /* @@ -787,9 +808,8 @@ int smsc_ircc_hard_xmit_sir(struct sk_buff *skb, struct net_device *dev) spin_unlock_irqrestore(&self->lock, flags); dev_kfree_skb(skb); return 0; - } else { - self->new_speed = speed; } + self->new_speed = speed; } /* Init tx buffer */ @@ -802,7 +822,7 @@ int smsc_ircc_hard_xmit_sir(struct sk_buff *skb, struct net_device *dev) self->stats.tx_bytes += self->tx_buff.len; /* Turn on transmit finished interrupt. Will fire immediately! */ - outb(UART_IER_THRI, iobase+UART_IER); + outb(UART_IER_THRI, iobase + UART_IER); spin_unlock_irqrestore(&self->lock, flags); @@ -826,7 +846,7 @@ static void smsc_ircc_set_fir_speed(struct smsc_ircc_cb *self, u32 speed) self->io.speed = speed; - switch(speed) { + switch (speed) { default: case 576000: ir_mode = IRCC_CFGA_IRDA_HDLC; @@ -853,14 +873,14 @@ static void smsc_ircc_set_fir_speed(struct smsc_ircc_cb *self, u32 speed) Now in tranceiver! /* This causes an interrupt */ register_bank(fir_base, 0); - outb((inb(fir_base+IRCC_LCR_A) & 0xbf) | fast, fir_base+IRCC_LCR_A); + outb((inb(fir_base + IRCC_LCR_A) & 0xbf) | fast, fir_base + IRCC_LCR_A); #endif register_bank(fir_base, 1); - outb(((inb(fir_base+IRCC_SCE_CFGA) & IRCC_SCE_CFGA_BLOCK_CTRL_BITS_MASK) | ir_mode), fir_base+IRCC_SCE_CFGA); + outb(((inb(fir_base + IRCC_SCE_CFGA) & IRCC_SCE_CFGA_BLOCK_CTRL_BITS_MASK) | ir_mode), fir_base + IRCC_SCE_CFGA); register_bank(fir_base, 4); - outb((inb(fir_base+IRCC_CONTROL) & 0x30) | ctrl, fir_base+IRCC_CONTROL); + outb((inb(fir_base + IRCC_CONTROL) & 0x30) | ctrl, fir_base + IRCC_CONTROL); } /* @@ -888,28 +908,28 @@ static void smsc_ircc_fir_start(struct smsc_ircc_cb *self) dev->hard_start_xmit = smsc_ircc_hard_xmit_fir; /* Clear FIFO */ - outb(inb(fir_base+IRCC_LCR_A)|IRCC_LCR_A_FIFO_RESET, fir_base+IRCC_LCR_A); + outb(inb(fir_base + IRCC_LCR_A) | IRCC_LCR_A_FIFO_RESET, fir_base + IRCC_LCR_A); /* Enable interrupt */ - /*outb(IRCC_IER_ACTIVE_FRAME|IRCC_IER_EOM, fir_base+IRCC_IER);*/ + /*outb(IRCC_IER_ACTIVE_FRAME|IRCC_IER_EOM, fir_base + IRCC_IER);*/ register_bank(fir_base, 1); /* Select the TX/RX interface */ #ifdef SMSC_669 /* Uses pin 88/89 for Rx/Tx */ - outb(((inb(fir_base+IRCC_SCE_CFGB) & 0x3f) | IRCC_CFGB_MUX_COM), - fir_base+IRCC_SCE_CFGB); + outb(((inb(fir_base + IRCC_SCE_CFGB) & 0x3f) | IRCC_CFGB_MUX_COM), + fir_base + IRCC_SCE_CFGB); #else - outb(((inb(fir_base+IRCC_SCE_CFGB) & 0x3f) | IRCC_CFGB_MUX_IR), - fir_base+IRCC_SCE_CFGB); + outb(((inb(fir_base + IRCC_SCE_CFGB) & 0x3f) | IRCC_CFGB_MUX_IR), + fir_base + IRCC_SCE_CFGB); #endif - (void) inb(fir_base+IRCC_FIFO_THRESHOLD); + (void) inb(fir_base + IRCC_FIFO_THRESHOLD); /* Enable SCE interrupts */ - outb(0, fir_base+IRCC_MASTER); + outb(0, fir_base + IRCC_MASTER); register_bank(fir_base, 0); - outb(IRCC_IER_ACTIVE_FRAME|IRCC_IER_EOM, fir_base+IRCC_IER); - outb(IRCC_MASTER_INT_EN, fir_base+IRCC_MASTER); + outb(IRCC_IER_ACTIVE_FRAME | IRCC_IER_EOM, fir_base + IRCC_IER); + outb(IRCC_MASTER_INT_EN, fir_base + IRCC_MASTER); } /* @@ -928,8 +948,8 @@ static void smsc_ircc_fir_stop(struct smsc_ircc_cb *self) fir_base = self->io.fir_base; register_bank(fir_base, 0); - /*outb(IRCC_MASTER_RESET, fir_base+IRCC_MASTER);*/ - outb(inb(fir_base+IRCC_LCR_B) & IRCC_LCR_B_SIP_ENABLE, fir_base+IRCC_LCR_B); + /*outb(IRCC_MASTER_RESET, fir_base + IRCC_MASTER);*/ + outb(inb(fir_base + IRCC_LCR_B) & IRCC_LCR_B_SIP_ENABLE, fir_base + IRCC_LCR_B); } @@ -964,26 +984,26 @@ static void smsc_ircc_change_speed(void *priv, u32 speed) smsc_ircc_fir_start(self); #endif - if(self->io.speed == 0) + if (self->io.speed == 0) smsc_ircc_sir_start(self); #if 0 - if(!last_speed_was_sir) speed = self->io.speed; + if (!last_speed_was_sir) speed = self->io.speed; #endif - if(self->io.speed != speed) smsc_ircc_set_transceiver_for_speed(self, speed); + if (self->io.speed != speed) + smsc_ircc_set_transceiver_for_speed(self, speed); self->io.speed = speed; - if(speed <= SMSC_IRCC2_MAX_SIR_SPEED) { - if(!last_speed_was_sir) { + if (speed <= SMSC_IRCC2_MAX_SIR_SPEED) { + if (!last_speed_was_sir) { smsc_ircc_fir_stop(self); smsc_ircc_sir_start(self); } smsc_ircc_set_sir_speed(self, speed); - } - else { - if(last_speed_was_sir) { + } else { + if (last_speed_was_sir) { #if SMSC_IRCC2_C_SIR_STOP smsc_ircc_sir_stop(self); #endif @@ -1027,9 +1047,9 @@ void smsc_ircc_set_sir_speed(void *priv, __u32 speed) self->io.speed = speed; /* Turn off interrupts */ - outb(0, iobase+UART_IER); + outb(0, iobase + UART_IER); - divisor = SMSC_IRCC2_MAX_SIR_SPEED/speed; + divisor = SMSC_IRCC2_MAX_SIR_SPEED / speed; fcr = UART_FCR_ENABLE_FIFO; @@ -1038,22 +1058,20 @@ void smsc_ircc_set_sir_speed(void *priv, __u32 speed) * almost 1,7 ms at 19200 bps. At speeds above that we can just forget * about this timeout since it will always be fast enough. */ - if (self->io.speed < 38400) - fcr |= UART_FCR_TRIGGER_1; - else - fcr |= UART_FCR_TRIGGER_14; + fcr |= self->io.speed < 38400 ? + UART_FCR_TRIGGER_1 : UART_FCR_TRIGGER_14; /* IrDA ports use 8N1 */ lcr = UART_LCR_WLEN8; - outb(UART_LCR_DLAB | lcr, iobase+UART_LCR); /* Set DLAB */ - outb(divisor & 0xff, iobase+UART_DLL); /* Set speed */ - outb(divisor >> 8, iobase+UART_DLM); - outb(lcr, iobase+UART_LCR); /* Set 8N1 */ - outb(fcr, iobase+UART_FCR); /* Enable FIFO's */ + outb(UART_LCR_DLAB | lcr, iobase + UART_LCR); /* Set DLAB */ + outb(divisor & 0xff, iobase + UART_DLL); /* Set speed */ + outb(divisor >> 8, iobase + UART_DLM); + outb(lcr, iobase + UART_LCR); /* Set 8N1 */ + outb(fcr, iobase + UART_FCR); /* Enable FIFO's */ /* Turn on interrups */ - outb(UART_IER_RLSI|UART_IER_RDI|UART_IER_THRI, iobase+UART_IER); + outb(UART_IER_RLSI | UART_IER_RDI | UART_IER_THRI, iobase + UART_IER); IRDA_DEBUG(2, "%s() speed changed to: %d\n", __FUNCTION__, speed); } @@ -1086,7 +1104,7 @@ static int smsc_ircc_hard_xmit_fir(struct sk_buff *skb, struct net_device *dev) /* Check if we need to change the speed after this frame */ speed = irda_get_next_speed(skb); - if ((speed != self->io.speed) && (speed != -1)) { + if (speed != self->io.speed && speed != -1) { /* Check for empty frame */ if (!skb->len) { /* Note : you should make sure that speed changes @@ -1096,8 +1114,9 @@ static int smsc_ircc_hard_xmit_fir(struct sk_buff *skb, struct net_device *dev) spin_unlock_irqrestore(&self->lock, flags); dev_kfree_skb(skb); return 0; - } else - self->new_speed = speed; + } + + self->new_speed = speed; } memcpy(self->tx_buff.head, skb->data, skb->len); @@ -1122,6 +1141,7 @@ static int smsc_ircc_hard_xmit_fir(struct sk_buff *skb, struct net_device *dev) /* Transmit frame */ smsc_ircc_dma_xmit(self, iobase, 0); } + spin_unlock_irqrestore(&self->lock, flags); dev_kfree_skb(skb); @@ -1142,30 +1162,30 @@ static void smsc_ircc_dma_xmit(struct smsc_ircc_cb *self, int iobase, int bofs) #if 1 /* Disable Rx */ register_bank(iobase, 0); - outb(0x00, iobase+IRCC_LCR_B); + outb(0x00, iobase + IRCC_LCR_B); #endif register_bank(iobase, 1); - outb(inb(iobase+IRCC_SCE_CFGB) & ~IRCC_CFGB_DMA_ENABLE, - iobase+IRCC_SCE_CFGB); + outb(inb(iobase + IRCC_SCE_CFGB) & ~IRCC_CFGB_DMA_ENABLE, + iobase + IRCC_SCE_CFGB); self->io.direction = IO_XMIT; /* Set BOF additional count for generating the min turn time */ register_bank(iobase, 4); - outb(bofs & 0xff, iobase+IRCC_BOF_COUNT_LO); - ctrl = inb(iobase+IRCC_CONTROL) & 0xf0; - outb(ctrl | ((bofs >> 8) & 0x0f), iobase+IRCC_BOF_COUNT_HI); + outb(bofs & 0xff, iobase + IRCC_BOF_COUNT_LO); + ctrl = inb(iobase + IRCC_CONTROL) & 0xf0; + outb(ctrl | ((bofs >> 8) & 0x0f), iobase + IRCC_BOF_COUNT_HI); /* Set max Tx frame size */ - outb(self->tx_buff.len >> 8, iobase+IRCC_TX_SIZE_HI); - outb(self->tx_buff.len & 0xff, iobase+IRCC_TX_SIZE_LO); + outb(self->tx_buff.len >> 8, iobase + IRCC_TX_SIZE_HI); + outb(self->tx_buff.len & 0xff, iobase + IRCC_TX_SIZE_LO); /*outb(UART_MCR_OUT2, self->io.sir_base + UART_MCR);*/ /* Enable burst mode chip Tx DMA */ register_bank(iobase, 1); - outb(inb(iobase+IRCC_SCE_CFGB) | IRCC_CFGB_DMA_ENABLE | - IRCC_CFGB_DMA_BURST, iobase+IRCC_SCE_CFGB); + outb(inb(iobase + IRCC_SCE_CFGB) | IRCC_CFGB_DMA_ENABLE | + IRCC_CFGB_DMA_BURST, iobase + IRCC_SCE_CFGB); /* Setup DMA controller (must be done after enabling chip DMA) */ irda_setup_dma(self->io.dma, self->tx_buff_dma, self->tx_buff.len, @@ -1174,11 +1194,11 @@ static void smsc_ircc_dma_xmit(struct smsc_ircc_cb *self, int iobase, int bofs) /* Enable interrupt */ register_bank(iobase, 0); - outb(IRCC_IER_ACTIVE_FRAME | IRCC_IER_EOM, iobase+IRCC_IER); - outb(IRCC_MASTER_INT_EN, iobase+IRCC_MASTER); + outb(IRCC_IER_ACTIVE_FRAME | IRCC_IER_EOM, iobase + IRCC_IER); + outb(IRCC_MASTER_INT_EN, iobase + IRCC_MASTER); /* Enable transmit */ - outb(IRCC_LCR_B_SCE_TRANSMIT | IRCC_LCR_B_SIP_ENABLE, iobase+IRCC_LCR_B); + outb(IRCC_LCR_B_SCE_TRANSMIT | IRCC_LCR_B_SIP_ENABLE, iobase + IRCC_LCR_B); } /* @@ -1194,25 +1214,25 @@ static void smsc_ircc_dma_xmit_complete(struct smsc_ircc_cb *self, int iobase) #if 0 /* Disable Tx */ register_bank(iobase, 0); - outb(0x00, iobase+IRCC_LCR_B); + outb(0x00, iobase + IRCC_LCR_B); #endif register_bank(self->io.fir_base, 1); - outb(inb(self->io.fir_base+IRCC_SCE_CFGB) & ~IRCC_CFGB_DMA_ENABLE, - self->io.fir_base+IRCC_SCE_CFGB); + outb(inb(self->io.fir_base + IRCC_SCE_CFGB) & ~IRCC_CFGB_DMA_ENABLE, + self->io.fir_base + IRCC_SCE_CFGB); /* Check for underrun! */ register_bank(iobase, 0); - if (inb(iobase+IRCC_LSR) & IRCC_LSR_UNDERRUN) { + if (inb(iobase + IRCC_LSR) & IRCC_LSR_UNDERRUN) { self->stats.tx_errors++; self->stats.tx_fifo_errors++; /* Reset error condition */ register_bank(iobase, 0); - outb(IRCC_MASTER_ERROR_RESET, iobase+IRCC_MASTER); - outb(0x00, iobase+IRCC_MASTER); + outb(IRCC_MASTER_ERROR_RESET, iobase + IRCC_MASTER); + outb(0x00, iobase + IRCC_MASTER); } else { self->stats.tx_packets++; - self->stats.tx_bytes += self->tx_buff.len; + self->stats.tx_bytes += self->tx_buff.len; } /* Check if it's time to change the speed */ @@ -1236,26 +1256,26 @@ static int smsc_ircc_dma_receive(struct smsc_ircc_cb *self, int iobase) #if 0 /* Turn off chip DMA */ register_bank(iobase, 1); - outb(inb(iobase+IRCC_SCE_CFGB) & ~IRCC_CFGB_DMA_ENABLE, - iobase+IRCC_SCE_CFGB); + outb(inb(iobase + IRCC_SCE_CFGB) & ~IRCC_CFGB_DMA_ENABLE, + iobase + IRCC_SCE_CFGB); #endif /* Disable Tx */ register_bank(iobase, 0); - outb(0x00, iobase+IRCC_LCR_B); + outb(0x00, iobase + IRCC_LCR_B); /* Turn off chip DMA */ register_bank(iobase, 1); - outb(inb(iobase+IRCC_SCE_CFGB) & ~IRCC_CFGB_DMA_ENABLE, - iobase+IRCC_SCE_CFGB); + outb(inb(iobase + IRCC_SCE_CFGB) & ~IRCC_CFGB_DMA_ENABLE, + iobase + IRCC_SCE_CFGB); self->io.direction = IO_RECV; self->rx_buff.data = self->rx_buff.head; /* Set max Rx frame size */ register_bank(iobase, 4); - outb((2050 >> 8) & 0x0f, iobase+IRCC_RX_SIZE_HI); - outb(2050 & 0xff, iobase+IRCC_RX_SIZE_LO); + outb((2050 >> 8) & 0x0f, iobase + IRCC_RX_SIZE_HI); + outb(2050 & 0xff, iobase + IRCC_RX_SIZE_LO); /* Setup DMA controller */ irda_setup_dma(self->io.dma, self->rx_buff_dma, self->rx_buff.truesize, @@ -1263,19 +1283,18 @@ static int smsc_ircc_dma_receive(struct smsc_ircc_cb *self, int iobase) /* Enable burst mode chip Rx DMA */ register_bank(iobase, 1); - outb(inb(iobase+IRCC_SCE_CFGB) | IRCC_CFGB_DMA_ENABLE | - IRCC_CFGB_DMA_BURST, iobase+IRCC_SCE_CFGB); + outb(inb(iobase + IRCC_SCE_CFGB) | IRCC_CFGB_DMA_ENABLE | + IRCC_CFGB_DMA_BURST, iobase + IRCC_SCE_CFGB); /* Enable interrupt */ register_bank(iobase, 0); - outb(IRCC_IER_ACTIVE_FRAME | IRCC_IER_EOM, iobase+IRCC_IER); - outb(IRCC_MASTER_INT_EN, iobase+IRCC_MASTER); - + outb(IRCC_IER_ACTIVE_FRAME | IRCC_IER_EOM, iobase + IRCC_IER); + outb(IRCC_MASTER_INT_EN, iobase + IRCC_MASTER); /* Enable receiver */ register_bank(iobase, 0); outb(IRCC_LCR_B_SCE_RECEIVE | IRCC_LCR_B_SIP_ENABLE, - iobase+IRCC_LCR_B); + iobase + IRCC_LCR_B); return 0; } @@ -1297,43 +1316,43 @@ static void smsc_ircc_dma_receive_complete(struct smsc_ircc_cb *self, int iobase #if 0 /* Disable Rx */ register_bank(iobase, 0); - outb(0x00, iobase+IRCC_LCR_B); + outb(0x00, iobase + IRCC_LCR_B); #endif register_bank(iobase, 0); - outb(inb(iobase+IRCC_LSAR) & ~IRCC_LSAR_ADDRESS_MASK, iobase+IRCC_LSAR); - lsr= inb(iobase+IRCC_LSR); - msgcnt = inb(iobase+IRCC_LCR_B) & 0x08; + outb(inb(iobase + IRCC_LSAR) & ~IRCC_LSAR_ADDRESS_MASK, iobase + IRCC_LSAR); + lsr= inb(iobase + IRCC_LSR); + msgcnt = inb(iobase + IRCC_LCR_B) & 0x08; IRDA_DEBUG(2, "%s: dma count = %d\n", __FUNCTION__, get_dma_residue(self->io.dma)); len = self->rx_buff.truesize - get_dma_residue(self->io.dma); - /* Look for errors - */ - - if(lsr & (IRCC_LSR_FRAME_ERROR | IRCC_LSR_CRC_ERROR | IRCC_LSR_SIZE_ERROR)) { + /* Look for errors */ + if (lsr & (IRCC_LSR_FRAME_ERROR | IRCC_LSR_CRC_ERROR | IRCC_LSR_SIZE_ERROR)) { self->stats.rx_errors++; - if(lsr & IRCC_LSR_FRAME_ERROR) self->stats.rx_frame_errors++; - if(lsr & IRCC_LSR_CRC_ERROR) self->stats.rx_crc_errors++; - if(lsr & IRCC_LSR_SIZE_ERROR) self->stats.rx_length_errors++; - if(lsr & (IRCC_LSR_UNDERRUN | IRCC_LSR_OVERRUN)) self->stats.rx_length_errors++; + if (lsr & IRCC_LSR_FRAME_ERROR) + self->stats.rx_frame_errors++; + if (lsr & IRCC_LSR_CRC_ERROR) + self->stats.rx_crc_errors++; + if (lsr & IRCC_LSR_SIZE_ERROR) + self->stats.rx_length_errors++; + if (lsr & (IRCC_LSR_UNDERRUN | IRCC_LSR_OVERRUN)) + self->stats.rx_length_errors++; return; } + /* Remove CRC */ - if (self->io.speed < 4000000) - len -= 2; - else - len -= 4; + len -= self->io.speed < 4000000 ? 2 : 4; - if ((len < 2) || (len > 2050)) { + if (len < 2 || len > 2050) { IRDA_WARNING("%s(), bogus len=%d\n", __FUNCTION__, len); return; } IRDA_DEBUG(2, "%s: msgcnt = %d, len=%d\n", __FUNCTION__, msgcnt, len); - skb = dev_alloc_skb(len+1); - if (!skb) { + skb = dev_alloc_skb(len + 1); + if (!skb) { IRDA_WARNING("%s(), memory squeeze, dropping frame.\n", __FUNCTION__); return; @@ -1372,14 +1391,14 @@ static void smsc_ircc_sir_receive(struct smsc_ircc_cb *self) */ do { async_unwrap_char(self->netdev, &self->stats, &self->rx_buff, - inb(iobase+UART_RX)); + inb(iobase + UART_RX)); /* Make sure we don't stay here to long */ if (boguscount++ > 32) { IRDA_DEBUG(2, "%s(), breaking!\n", __FUNCTION__); break; } - } while (inb(iobase+UART_LSR) & UART_LSR_DR); + } while (inb(iobase + UART_LSR) & UART_LSR_DR); } @@ -1408,7 +1427,7 @@ static irqreturn_t smsc_ircc_interrupt(int irq, void *dev_id, struct pt_regs *re spin_lock(&self->lock); /* Check if we should use the SIR interrupt handler */ - if (self->io.speed <= SMSC_IRCC2_MAX_SIR_SPEED) { + if (self->io.speed <= SMSC_IRCC2_MAX_SIR_SPEED) { ret = smsc_ircc_interrupt_sir(dev); goto irq_ret_unlock; } @@ -1416,15 +1435,15 @@ static irqreturn_t smsc_ircc_interrupt(int irq, void *dev_id, struct pt_regs *re iobase = self->io.fir_base; register_bank(iobase, 0); - iir = inb(iobase+IRCC_IIR); + iir = inb(iobase + IRCC_IIR); if (iir == 0) goto irq_ret_unlock; ret = IRQ_HANDLED; /* Disable interrupts */ - outb(0, iobase+IRCC_IER); - lcra = inb(iobase+IRCC_LCR_A); - lsr = inb(iobase+IRCC_LSR); + outb(0, iobase + IRCC_IER); + lcra = inb(iobase + IRCC_LCR_A); + lsr = inb(iobase + IRCC_LSR); IRDA_DEBUG(2, "%s(), iir = 0x%02x\n", __FUNCTION__, iir); @@ -1444,7 +1463,7 @@ static irqreturn_t smsc_ircc_interrupt(int irq, void *dev_id, struct pt_regs *re /* Enable interrupts again */ register_bank(iobase, 0); - outb(IRCC_IER_ACTIVE_FRAME|IRCC_IER_EOM, iobase+IRCC_IER); + outb(IRCC_IER_ACTIVE_FRAME | IRCC_IER_EOM, iobase + IRCC_IER); irq_ret_unlock: spin_unlock(&self->lock); @@ -1469,12 +1488,12 @@ static irqreturn_t smsc_ircc_interrupt_sir(struct net_device *dev) iobase = self->io.sir_base; - iir = inb(iobase+UART_IIR) & UART_IIR_ID; + iir = inb(iobase + UART_IIR) & UART_IIR_ID; if (iir == 0) return IRQ_NONE; while (iir) { /* Clear interrupt */ - lsr = inb(iobase+UART_LSR); + lsr = inb(iobase + UART_LSR); IRDA_DEBUG(4, "%s(), iir=%02x, lsr=%02x, iobase=%#x\n", __FUNCTION__, iir, lsr, iobase); @@ -1624,9 +1643,7 @@ static int smsc_ircc_net_close(struct net_device *dev) self->irlap = NULL; free_irq(self->io.irq, dev); - disable_dma(self->io.dma); - free_dma(self->io.dma); return 0; @@ -1637,12 +1654,10 @@ static void smsc_ircc_suspend(struct smsc_ircc_cb *self) { IRDA_MESSAGE("%s, Suspending\n", driver_name); - if (self->io.suspended) - return; - - smsc_ircc_net_close(self->netdev); - - self->io.suspended = 1; + if (!self->io.suspended) { + smsc_ircc_net_close(self->netdev); + self->io.suspended = 1; + } } static void smsc_ircc_wakeup(struct smsc_ircc_cb *self) @@ -1703,14 +1718,14 @@ static int __exit smsc_ircc_close(struct smsc_ircc_cb *self) /* Stop interrupts */ register_bank(iobase, 0); - outb(0, iobase+IRCC_IER); - outb(IRCC_MASTER_RESET, iobase+IRCC_MASTER); - outb(0x00, iobase+IRCC_MASTER); + outb(0, iobase + IRCC_IER); + outb(IRCC_MASTER_RESET, iobase + IRCC_MASTER); + outb(0x00, iobase + IRCC_MASTER); #if 0 /* Reset to SIR mode */ register_bank(iobase, 1); - outb(IRCC_CFGA_IRDA_SIR_A|IRCC_CFGA_TX_POLARITY, iobase+IRCC_SCE_CFGA); - outb(IRCC_CFGB_IR, iobase+IRCC_SCE_CFGB); + outb(IRCC_CFGA_IRDA_SIR_A|IRCC_CFGA_TX_POLARITY, iobase + IRCC_SCE_CFGA); + outb(IRCC_CFGB_IR, iobase + IRCC_SCE_CFGB); #endif spin_unlock_irqrestore(&self->lock, flags); @@ -1744,7 +1759,7 @@ static void __exit smsc_ircc_cleanup(void) IRDA_DEBUG(1, "%s\n", __FUNCTION__); - for (i=0; i < 2; i++) { + for (i = 0; i < 2; i++) { if (dev_self[i]) smsc_ircc_close(dev_self[i]); } @@ -1764,7 +1779,7 @@ void smsc_ircc_sir_start(struct smsc_ircc_cb *self) IRDA_DEBUG(3, "%s\n", __FUNCTION__); IRDA_ASSERT(self != NULL, return;); - dev= self->netdev; + dev = self->netdev; IRDA_ASSERT(dev != NULL, return;); dev->hard_start_xmit = &smsc_ircc_hard_xmit_sir; @@ -1772,25 +1787,25 @@ void smsc_ircc_sir_start(struct smsc_ircc_cb *self) sir_base = self->io.sir_base; /* Reset everything */ - outb(IRCC_MASTER_RESET, fir_base+IRCC_MASTER); + outb(IRCC_MASTER_RESET, fir_base + IRCC_MASTER); #if SMSC_IRCC2_C_SIR_STOP /*smsc_ircc_sir_stop(self);*/ #endif register_bank(fir_base, 1); - outb(((inb(fir_base+IRCC_SCE_CFGA) & IRCC_SCE_CFGA_BLOCK_CTRL_BITS_MASK) | IRCC_CFGA_IRDA_SIR_A), fir_base+IRCC_SCE_CFGA); + outb(((inb(fir_base + IRCC_SCE_CFGA) & IRCC_SCE_CFGA_BLOCK_CTRL_BITS_MASK) | IRCC_CFGA_IRDA_SIR_A), fir_base + IRCC_SCE_CFGA); /* Initialize UART */ - outb(UART_LCR_WLEN8, sir_base+UART_LCR); /* Reset DLAB */ - outb((UART_MCR_DTR | UART_MCR_RTS | UART_MCR_OUT2), sir_base+UART_MCR); + outb(UART_LCR_WLEN8, sir_base + UART_LCR); /* Reset DLAB */ + outb((UART_MCR_DTR | UART_MCR_RTS | UART_MCR_OUT2), sir_base + UART_MCR); /* Turn on interrups */ - outb(UART_IER_RLSI | UART_IER_RDI |UART_IER_THRI, sir_base+UART_IER); + outb(UART_IER_RLSI | UART_IER_RDI |UART_IER_THRI, sir_base + UART_IER); IRDA_DEBUG(3, "%s() - exit\n", __FUNCTION__); - outb(0x00, fir_base+IRCC_MASTER); + outb(0x00, fir_base + IRCC_MASTER); } #if SMSC_IRCC2_C_SIR_STOP @@ -1802,10 +1817,10 @@ void smsc_ircc_sir_stop(struct smsc_ircc_cb *self) iobase = self->io.sir_base; /* Reset UART */ - outb(0, iobase+UART_MCR); + outb(0, iobase + UART_MCR); /* Turn off interrupts */ - outb(0, iobase+UART_IER); + outb(0, iobase + UART_IER); } #endif @@ -1856,21 +1871,19 @@ static void smsc_ircc_sir_write_wakeup(struct smsc_ircc_cb *self) } self->stats.tx_packets++; - if(self->io.speed <= 115200) { - /* - * Reset Rx FIFO to make sure that all reflected transmit data - * is discarded. This is needed for half duplex operation - */ - fcr = UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR; - if (self->io.speed < 38400) - fcr |= UART_FCR_TRIGGER_1; - else - fcr |= UART_FCR_TRIGGER_14; + if (self->io.speed <= 115200) { + /* + * Reset Rx FIFO to make sure that all reflected transmit data + * is discarded. This is needed for half duplex operation + */ + fcr = UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR; + fcr |= self->io.speed < 38400 ? + UART_FCR_TRIGGER_1 : UART_FCR_TRIGGER_14; - outb(fcr, iobase+UART_FCR); + outb(fcr, iobase + UART_FCR); - /* Turn on receive interrupts */ - outb(UART_IER_RDI, iobase+UART_IER); + /* Turn on receive interrupts */ + outb(UART_IER_RDI, iobase + UART_IER); } } } @@ -1886,15 +1899,15 @@ static int smsc_ircc_sir_write(int iobase, int fifo_size, __u8 *buf, int len) int actual = 0; /* Tx FIFO should be empty! */ - if (!(inb(iobase+UART_LSR) & UART_LSR_THRE)) { + if (!(inb(iobase + UART_LSR) & UART_LSR_THRE)) { IRDA_WARNING("%s(), failed, fifo not empty!\n", __FUNCTION__); return 0; } /* Fill FIFO with current frame */ - while ((fifo_size-- > 0) && (actual < len)) { + while (fifo_size-- > 0 && actual < len) { /* Transmit next byte */ - outb(buf[actual], iobase+UART_TX); + outb(buf[actual], iobase + UART_TX); actual++; } return actual; @@ -1924,17 +1937,18 @@ static void smsc_ircc_probe_transceiver(struct smsc_ircc_cb *self) IRDA_ASSERT(self != NULL, return;); - for(i=0; smsc_transceivers[i].name!=NULL; i++) - if((*smsc_transceivers[i].probe)(self->io.fir_base)) { + for (i = 0; smsc_transceivers[i].name != NULL; i++) + if (smsc_transceivers[i].probe(self->io.fir_base)) { IRDA_MESSAGE(" %s transceiver found\n", smsc_transceivers[i].name); - self->transceiver= i+1; + self->transce |