[wireless ieee80211,ipw2200] Lindent source code

No code changes, just Lindent + manual fixups.

This prepares us for updating to the latest Intel driver code, plus
gives the source code a nice facelift.

2 files changed, 1321 insertions, 1355 deletions

diff --git a/drivers/net/wireless/ipw2200.c b/drivers/net/wireless/ipw2200.c
index 2a3bd607a5cd..b7f275c00de3 100644
--- a/drivers/net/wireless/ipw2200.c
+++ b/drivers/net/wireless/ipw2200.c
@@ -72,7 +72,8 @@ static void ipw_rx_queue_replenish(void *);
 static int ipw_up(struct ipw_priv *);
 static void ipw_down(struct ipw_priv *);
 static int ipw_config(struct ipw_priv *);
-static int init_supported_rates(struct ipw_priv *priv, struct ipw_supported_rates *prates);
+static int init_supported_rates(struct ipw_priv *priv,
+				struct ipw_supported_rates *prates);
 
 static u8 band_b_active_channel[MAX_B_CHANNELS] = {
 	1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 0
@@ -102,7 +103,7 @@ static int is_valid_channel(int mode_mask, int channel)
 }
 
 static char *snprint_line(char *buf, size_t count,
-			  const u8 *data, u32 len, u32 ofs)
+			  const u8 * data, u32 len, u32 ofs)
 {
 	int out, i, j, l;
 	char c;
@@ -136,7 +137,7 @@ static char *snprint_line(char *buf, size_t count,
 	return buf;
 }
 
-static void printk_buf(int level, const u8 *data, u32 len)
+static void printk_buf(int level, const u8 * data, u32 len)
 {
 	char line[81];
 	u32 ofs = 0;
@@ -161,21 +162,24 @@ static u8 _ipw_read_reg8(struct ipw_priv *ipw, u32 reg);
 static void _ipw_write_reg8(struct ipw_priv *priv, u32 reg, u8 value);
 static inline void ipw_write_reg8(struct ipw_priv *a, u32 b, u8 c)
 {
-	IPW_DEBUG_IO("%s %d: write_indirect8(0x%08X, 0x%08X)\n", __FILE__, __LINE__, (u32)(b), (u32)(c));
+	IPW_DEBUG_IO("%s %d: write_indirect8(0x%08X, 0x%08X)\n", __FILE__,
+		     __LINE__, (u32) (b), (u32) (c));
 	_ipw_write_reg8(a, b, c);
 }
 
 static void _ipw_write_reg16(struct ipw_priv *priv, u32 reg, u16 value);
 static inline void ipw_write_reg16(struct ipw_priv *a, u32 b, u16 c)
 {
-	IPW_DEBUG_IO("%s %d: write_indirect16(0x%08X, 0x%08X)\n", __FILE__, __LINE__, (u32)(b), (u32)(c));
+	IPW_DEBUG_IO("%s %d: write_indirect16(0x%08X, 0x%08X)\n", __FILE__,
+		     __LINE__, (u32) (b), (u32) (c));
 	_ipw_write_reg16(a, b, c);
 }
 
 static void _ipw_write_reg32(struct ipw_priv *priv, u32 reg, u32 value);
 static inline void ipw_write_reg32(struct ipw_priv *a, u32 b, u32 c)
 {
-	IPW_DEBUG_IO("%s %d: write_indirect32(0x%08X, 0x%08X)\n", __FILE__, __LINE__, (u32)(b), (u32)(c));
+	IPW_DEBUG_IO("%s %d: write_indirect32(0x%08X, 0x%08X)\n", __FILE__,
+		     __LINE__, (u32) (b), (u32) (c));
 	_ipw_write_reg32(a, b, c);
 }
 
@@ -195,24 +199,30 @@ static inline void ipw_write_reg32(struct ipw_priv *a, u32 b, u32 c)
  _ipw_write32(ipw, ofs, val)
 
 #define _ipw_read8(ipw, ofs) readb((ipw)->hw_base + (ofs))
-static inline u8 __ipw_read8(char *f, u32 l, struct ipw_priv *ipw, u32 ofs) {
-	IPW_DEBUG_IO("%s %d: read_direct8(0x%08X)\n", f, l, (u32)(ofs));
+static inline u8 __ipw_read8(char *f, u32 l, struct ipw_priv *ipw, u32 ofs)
+{
+	IPW_DEBUG_IO("%s %d: read_direct8(0x%08X)\n", f, l, (u32) (ofs));
 	return _ipw_read8(ipw, ofs);
 }
+
 #define ipw_read8(ipw, ofs) __ipw_read8(__FILE__, __LINE__, ipw, ofs)
 
 #define _ipw_read16(ipw, ofs) readw((ipw)->hw_base + (ofs))
-static inline u16 __ipw_read16(char *f, u32 l, struct ipw_priv *ipw, u32 ofs) {
-	IPW_DEBUG_IO("%s %d: read_direct16(0x%08X)\n", f, l, (u32)(ofs));
+static inline u16 __ipw_read16(char *f, u32 l, struct ipw_priv *ipw, u32 ofs)
+{
+	IPW_DEBUG_IO("%s %d: read_direct16(0x%08X)\n", f, l, (u32) (ofs));
 	return _ipw_read16(ipw, ofs);
 }
+
 #define ipw_read16(ipw, ofs) __ipw_read16(__FILE__, __LINE__, ipw, ofs)
 
 #define _ipw_read32(ipw, ofs) readl((ipw)->hw_base + (ofs))
-static inline u32 __ipw_read32(char *f, u32 l, struct ipw_priv *ipw, u32 ofs) {
-	IPW_DEBUG_IO("%s %d: read_direct32(0x%08X)\n", f, l, (u32)(ofs));
+static inline u32 __ipw_read32(char *f, u32 l, struct ipw_priv *ipw, u32 ofs)
+{
+	IPW_DEBUG_IO("%s %d: read_direct32(0x%08X)\n", f, l, (u32) (ofs));
 	return _ipw_read32(ipw, ofs);
 }
+
 #define ipw_read32(ipw, ofs) __ipw_read32(__FILE__, __LINE__, ipw, ofs)
 
 static void _ipw_read_indirect(struct ipw_priv *, u32, u8 *, int);
@@ -220,34 +230,30 @@ static void _ipw_read_indirect(struct ipw_priv *, u32, u8 *, int);
 	IPW_DEBUG_IO("%s %d: read_inddirect(0x%08X) %d bytes\n", __FILE__, __LINE__, (u32)(b), d); \
 	_ipw_read_indirect(a, b, c, d)
 
-static void _ipw_write_indirect(struct ipw_priv *priv, u32 addr, u8 *data, int num);
+static void _ipw_write_indirect(struct ipw_priv *priv, u32 addr, u8 * data,
+				int num);
 #define ipw_write_indirect(a, b, c, d) \
 	IPW_DEBUG_IO("%s %d: write_indirect(0x%08X) %d bytes\n", __FILE__, __LINE__, (u32)(b), d); \
         _ipw_write_indirect(a, b, c, d)
 
 /* indirect write s */
-static void _ipw_write_reg32(struct ipw_priv *priv, u32 reg,
-			     u32 value)
+static void _ipw_write_reg32(struct ipw_priv *priv, u32 reg, u32 value)
 {
-	IPW_DEBUG_IO(" %p : reg = 0x%8X : value = 0x%8X\n",
-		     priv, reg, value);
+	IPW_DEBUG_IO(" %p : reg = 0x%8X : value = 0x%8X\n", priv, reg, value);
 	_ipw_write32(priv, CX2_INDIRECT_ADDR, reg);
 	_ipw_write32(priv, CX2_INDIRECT_DATA, value);
 }
 
-
 static void _ipw_write_reg8(struct ipw_priv *priv, u32 reg, u8 value)
 {
 	IPW_DEBUG_IO(" reg = 0x%8X : value = 0x%8X\n", reg, value);
 	_ipw_write32(priv, CX2_INDIRECT_ADDR, reg & CX2_INDIRECT_ADDR_MASK);
 	_ipw_write8(priv, CX2_INDIRECT_DATA, value);
 	IPW_DEBUG_IO(" reg = 0x%8lX : value = 0x%8X\n",
-		     (unsigned long)(priv->hw_base + CX2_INDIRECT_DATA),
-		     value);
+		     (unsigned long)(priv->hw_base + CX2_INDIRECT_DATA), value);
 }
 
-static void _ipw_write_reg16(struct ipw_priv *priv, u32 reg,
-			     u16 value)
+static void _ipw_write_reg16(struct ipw_priv *priv, u32 reg, u16 value)
 {
 	IPW_DEBUG_IO(" reg = 0x%8X : value = 0x%8X\n", reg, value);
 	_ipw_write32(priv, CX2_INDIRECT_ADDR, reg & CX2_INDIRECT_ADDR_MASK);
@@ -262,7 +268,7 @@ static u8 _ipw_read_reg8(struct ipw_priv *priv, u32 reg)
 	_ipw_write32(priv, CX2_INDIRECT_ADDR, reg & CX2_INDIRECT_ADDR_MASK);
 	IPW_DEBUG_IO(" reg = 0x%8X : \n", reg);
 	word = _ipw_read32(priv, CX2_INDIRECT_DATA);
-	return (word >> ((reg & 0x3)*8)) & 0xff;
+	return (word >> ((reg & 0x3) * 8)) & 0xff;
 }
 
 static u32 _ipw_read_reg32(struct ipw_priv *priv, u32 reg)
@@ -302,7 +308,7 @@ static void _ipw_read_indirect(struct ipw_priv *priv, u32 addr, u8 * buf,
 	_ipw_write32(priv, CX2_AUTOINC_ADDR, aligned_addr);
 	aligned_len = num & CX2_INDIRECT_ADDR_MASK;
 	for (i = 0; i < aligned_len; i += 4, buf += 4, aligned_addr += 4)
-		*(u32*)buf = ipw_read32(priv, CX2_AUTOINC_DATA);
+		*(u32 *) buf = ipw_read32(priv, CX2_AUTOINC_DATA);
 
 	/* Copy the last nibble */
 	dif_len = num - aligned_len;
@@ -311,7 +317,7 @@ static void _ipw_read_indirect(struct ipw_priv *priv, u32 addr, u8 * buf,
 		*buf = ipw_read8(priv, CX2_INDIRECT_DATA + i);
 }
 
-static void _ipw_write_indirect(struct ipw_priv *priv, u32 addr, u8 *buf,
+static void _ipw_write_indirect(struct ipw_priv *priv, u32 addr, u8 * buf,
 				int num)
 {
 	u32 aligned_addr = addr & CX2_INDIRECT_ADDR_MASK;
@@ -335,7 +341,7 @@ static void _ipw_write_indirect(struct ipw_priv *priv, u32 addr, u8 *buf,
 	_ipw_write32(priv, CX2_AUTOINC_ADDR, aligned_addr);
 	aligned_len = num & CX2_INDIRECT_ADDR_MASK;
 	for (i = 0; i < aligned_len; i += 4, buf += 4, aligned_addr += 4)
-		_ipw_write32(priv, CX2_AUTOINC_DATA, *(u32*)buf);
+		_ipw_write32(priv, CX2_AUTOINC_DATA, *(u32 *) buf);
 
 	/* Copy the last nibble */
 	dif_len = num - aligned_len;
@@ -428,20 +434,18 @@ static void ipw_dump_nic_error_log(struct ipw_priv *priv)
 	}
 
 	for (i = ERROR_START_OFFSET;
-	     i <= count * ERROR_ELEM_SIZE;
-	     i += ERROR_ELEM_SIZE) {
-		desc   = ipw_read_reg32(priv, base + i);
-		time   = ipw_read_reg32(priv, base + i + 1*sizeof(u32));
-		blink1 = ipw_read_reg32(priv, base + i + 2*sizeof(u32));
-		blink2 = ipw_read_reg32(priv, base + i + 3*sizeof(u32));
-		ilink1 = ipw_read_reg32(priv, base + i + 4*sizeof(u32));
-		ilink2 = ipw_read_reg32(priv, base + i + 5*sizeof(u32));
-		idata =  ipw_read_reg32(priv, base + i + 6*sizeof(u32));
+	     i <= count * ERROR_ELEM_SIZE; i += ERROR_ELEM_SIZE) {
+		desc = ipw_read_reg32(priv, base + i);
+		time = ipw_read_reg32(priv, base + i + 1 * sizeof(u32));
+		blink1 = ipw_read_reg32(priv, base + i + 2 * sizeof(u32));
+		blink2 = ipw_read_reg32(priv, base + i + 3 * sizeof(u32));
+		ilink1 = ipw_read_reg32(priv, base + i + 4 * sizeof(u32));
+		ilink2 = ipw_read_reg32(priv, base + i + 5 * sizeof(u32));
+		idata = ipw_read_reg32(priv, base + i + 6 * sizeof(u32));
 
-		IPW_ERROR(
-			"%s %i 0x%08x  0x%08x  0x%08x  0x%08x  0x%08x\n",
-			ipw_error_desc(desc), time, blink1, blink2,
-			ilink1, ilink2, idata);
+		IPW_ERROR("%s %i 0x%08x  0x%08x  0x%08x  0x%08x  0x%08x\n",
+			  ipw_error_desc(desc), time, blink1, blink2,
+			  ilink1, ilink2, idata);
 	}
 }
 
@@ -456,11 +460,10 @@ static void ipw_dump_nic_event_log(struct ipw_priv *priv)
 		IPW_ERROR("Start IPW Event Log Dump:\n");
 
 	for (i = EVENT_START_OFFSET;
-	     i <= count * EVENT_ELEM_SIZE;
-	     i += EVENT_ELEM_SIZE) {
+	     i <= count * EVENT_ELEM_SIZE; i += EVENT_ELEM_SIZE) {
 		ev = ipw_read_reg32(priv, base + i);
-		time  = ipw_read_reg32(priv, base + i + 1*sizeof(u32));
-		data  = ipw_read_reg32(priv, base + i + 2*sizeof(u32));
+		time = ipw_read_reg32(priv, base + i + 1 * sizeof(u32));
+		data = ipw_read_reg32(priv, base + i + 2 * sizeof(u32));
 
 #ifdef CONFIG_IPW_DEBUG
 		IPW_ERROR("%i\t0x%08x\t%i\n", time, data, ev);
@@ -468,8 +471,7 @@ static void ipw_dump_nic_event_log(struct ipw_priv *priv)
 	}
 }
 
-static int ipw_get_ordinal(struct ipw_priv *priv, u32 ord, void *val,
-			   u32 *len)
+static int ipw_get_ordinal(struct ipw_priv *priv, u32 ord, void *val, u32 * len)
 {
 	u32 addr, field_info, field_len, field_count, total_len;
 
@@ -513,11 +515,11 @@ static int ipw_get_ordinal(struct ipw_priv *priv, u32 ord, void *val,
 		}
 
 		IPW_DEBUG_ORD("Reading TABLE0[%i] from offset 0x%08x\n",
-			      ord, priv->table0_addr + (ord  << 2));
+			      ord, priv->table0_addr + (ord << 2));
 
 		*len = sizeof(u32);
 		ord <<= 2;
-		*((u32 *)val) = ipw_read32(priv, priv->table0_addr + ord);
+		*((u32 *) val) = ipw_read32(priv, priv->table0_addr + ord);
 		break;
 
 	case IPW_ORD_TABLE_1_MASK:
@@ -545,7 +547,8 @@ static int ipw_get_ordinal(struct ipw_priv *priv, u32 ord, void *val,
 			return -EINVAL;
 		}
 
-		*((u32 *)val) = ipw_read_reg32(priv, (priv->table1_addr + (ord << 2)));
+		*((u32 *) val) =
+		    ipw_read_reg32(priv, (priv->table1_addr + (ord << 2)));
 		*len = sizeof(u32);
 		break;
 
@@ -573,13 +576,16 @@ static int ipw_get_ordinal(struct ipw_priv *priv, u32 ord, void *val,
 
 		/* get the second DW of statistics ;
 		 * two 16-bit words - first is length, second is count */
-		field_info = ipw_read_reg32(priv, priv->table2_addr + (ord << 3) + sizeof(u32));
+		field_info =
+		    ipw_read_reg32(priv,
+				   priv->table2_addr + (ord << 3) +
+				   sizeof(u32));
 
 		/* get each entry length */
-		field_len = *((u16 *)&field_info);
+		field_len = *((u16 *) & field_info);
 
 		/* get number of entries */
-		field_count = *(((u16 *)&field_info) + 1);
+		field_count = *(((u16 *) & field_info) + 1);
 
 		/* abort if not enought memory */
 		total_len = field_len * field_count;
@@ -604,7 +610,6 @@ static int ipw_get_ordinal(struct ipw_priv *priv, u32 ord, void *val,
 
 	}
 
-
 	return 0;
 }
 
@@ -624,7 +629,7 @@ static void ipw_init_ordinals(struct ipw_priv *priv)
 
 	priv->table2_addr = ipw_read32(priv, IPW_ORDINALS_TABLE_2);
 	priv->table2_len = ipw_read_reg32(priv, priv->table2_addr);
-	priv->table2_len &= 0x0000ffff; /* use first two bytes */
+	priv->table2_len &= 0x0000ffff;	/* use first two bytes */
 
 	IPW_DEBUG_ORD("table 2 offset at 0x%08x, len = %i\n",
 		      priv->table2_addr, priv->table2_len);
@@ -643,7 +648,7 @@ static ssize_t show_debug_level(struct device_driver *d, char *buf)
 	return sprintf(buf, "0x%08X\n", ipw_debug_level);
 }
 static ssize_t store_debug_level(struct device_driver *d,
-				const char *buf, size_t count)
+				 const char *buf, size_t count)
 {
 	char *p = (char *)buf;
 	u32 val;
@@ -668,11 +673,12 @@ static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO,
 		   show_debug_level, store_debug_level);
 
 static ssize_t show_status(struct device *d,
-			struct device_attribute *attr, char *buf)
+			   struct device_attribute *attr, char *buf)
 {
 	struct ipw_priv *p = d->driver_data;
 	return sprintf(buf, "0x%08x\n", (int)p->status);
 }
+
 static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
 
 static ssize_t show_cfg(struct device *d, struct device_attribute *attr,
@@ -681,10 +687,11 @@ static ssize_t show_cfg(struct device *d, struct device_attribute *attr,
 	struct ipw_priv *p = d->driver_data;
 	return sprintf(buf, "0x%08x\n", (int)p->config);
 }
+
 static DEVICE_ATTR(cfg, S_IRUGO, show_cfg, NULL);
 
 static ssize_t show_nic_type(struct device *d,
-			struct device_attribute *attr, char *buf)
+			     struct device_attribute *attr, char *buf)
 {
 	struct ipw_priv *p = d->driver_data;
 	u8 type = p->eeprom[EEPROM_NIC_TYPE];
@@ -704,44 +711,50 @@ static ssize_t show_nic_type(struct device *d,
 
 	return sprintf(buf, "UNKNOWN\n");
 }
+
 static DEVICE_ATTR(nic_type, S_IRUGO, show_nic_type, NULL);
 
 static ssize_t dump_error_log(struct device *d,
-		struct device_attribute *attr, const char *buf, size_t count)
+			      struct device_attribute *attr, const char *buf,
+			      size_t count)
 {
 	char *p = (char *)buf;
 
 	if (p[0] == '1')
-		ipw_dump_nic_error_log((struct ipw_priv*)d->driver_data);
+		ipw_dump_nic_error_log((struct ipw_priv *)d->driver_data);
 
 	return strnlen(buf, count);
 }
+
 static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
 
 static ssize_t dump_event_log(struct device *d,
-		struct device_attribute *attr, const char *buf, size_t count)
+			      struct device_attribute *attr, const char *buf,
+			      size_t count)
 {
 	char *p = (char *)buf;
 
 	if (p[0] == '1')
-		ipw_dump_nic_event_log((struct ipw_priv*)d->driver_data);
+		ipw_dump_nic_event_log((struct ipw_priv *)d->driver_data);
 
 	return strnlen(buf, count);
 }
+
 static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
 
 static ssize_t show_ucode_version(struct device *d,
-			struct device_attribute *attr, char *buf)
+				  struct device_attribute *attr, char *buf)
 {
 	u32 len = sizeof(u32), tmp = 0;
 	struct ipw_priv *p = d->driver_data;
 
-	if(ipw_get_ordinal(p, IPW_ORD_STAT_UCODE_VERSION, &tmp, &len))
+	if (ipw_get_ordinal(p, IPW_ORD_STAT_UCODE_VERSION, &tmp, &len))
 		return 0;
 
 	return sprintf(buf, "0x%08x\n", tmp);
 }
-static DEVICE_ATTR(ucode_version, S_IWUSR|S_IRUGO, show_ucode_version, NULL);
+
+static DEVICE_ATTR(ucode_version, S_IWUSR | S_IRUGO, show_ucode_version, NULL);
 
 static ssize_t show_rtc(struct device *d, struct device_attribute *attr,
 			char *buf)
@@ -749,36 +762,38 @@ static ssize_t show_rtc(struct device *d, struct device_attribute *attr,
 	u32 len = sizeof(u32), tmp = 0;
 	struct ipw_priv *p = d->driver_data;
 
-	if(ipw_get_ordinal(p, IPW_ORD_STAT_RTC, &tmp, &len))
+	if (ipw_get_ordinal(p, IPW_ORD_STAT_RTC, &tmp, &len))
 		return 0;
 
 	return sprintf(buf, "0x%08x\n", tmp);
 }
-static DEVICE_ATTR(rtc, S_IWUSR|S_IRUGO, show_rtc, NULL);
+
+static DEVICE_ATTR(rtc, S_IWUSR | S_IRUGO, show_rtc, NULL);
 
 /*
  * Add a device attribute to view/control the delay between eeprom
  * operations.
  */
 static ssize_t show_eeprom_delay(struct device *d,
-			struct device_attribute *attr, char *buf)
+				 struct device_attribute *attr, char *buf)
 {
-	int n = ((struct ipw_priv*)d->driver_data)->eeprom_delay;
+	int n = ((struct ipw_priv *)d->driver_data)->eeprom_delay;
 	return sprintf(buf, "%i\n", n);
 }
 static ssize_t store_eeprom_delay(struct device *d,
-			struct device_attribute *attr, const char *buf,
-			size_t count)
+				  struct device_attribute *attr,
+				  const char *buf, size_t count)
 {
 	struct ipw_priv *p = d->driver_data;
 	sscanf(buf, "%i", &p->eeprom_delay);
 	return strnlen(buf, count);
 }
-static DEVICE_ATTR(eeprom_delay, S_IWUSR|S_IRUGO,
-		   show_eeprom_delay,store_eeprom_delay);
+
+static DEVICE_ATTR(eeprom_delay, S_IWUSR | S_IRUGO,
+		   show_eeprom_delay, store_eeprom_delay);
 
 static ssize_t show_command_event_reg(struct device *d,
-			struct device_attribute *attr, char *buf)
+				      struct device_attribute *attr, char *buf)
 {
 	u32 reg = 0;
 	struct ipw_priv *p = d->driver_data;
@@ -787,8 +802,8 @@ static ssize_t show_command_event_reg(struct device *d,
 	return sprintf(buf, "0x%08x\n", reg);
 }
 static ssize_t store_command_event_reg(struct device *d,
-				struct device_attribute *attr, const char *buf,
-				size_t count)
+				       struct device_attribute *attr,
+				       const char *buf, size_t count)
 {
 	u32 reg;
 	struct ipw_priv *p = d->driver_data;
@@ -797,11 +812,12 @@ static ssize_t store_command_event_reg(struct device *d,
 	ipw_write_reg32(p, CX2_INTERNAL_CMD_EVENT, reg);
 	return strnlen(buf, count);
 }
-static DEVICE_ATTR(command_event_reg, S_IWUSR|S_IRUGO,
-		   show_command_event_reg,store_command_event_reg);
+
+static DEVICE_ATTR(command_event_reg, S_IWUSR | S_IRUGO,
+		   show_command_event_reg, store_command_event_reg);
 
 static ssize_t show_mem_gpio_reg(struct device *d,
-				struct device_attribute *attr, char *buf)
+				 struct device_attribute *attr, char *buf)
 {
 	u32 reg = 0;
 	struct ipw_priv *p = d->driver_data;
@@ -810,8 +826,8 @@ static ssize_t show_mem_gpio_reg(struct device *d,
 	return sprintf(buf, "0x%08x\n", reg);
 }
 static ssize_t store_mem_gpio_reg(struct device *d,
-			struct device_attribute *attr, const char *buf,
-			size_t count)
+				  struct device_attribute *attr,
+				  const char *buf, size_t count)
 {
 	u32 reg;
 	struct ipw_priv *p = d->driver_data;
@@ -820,11 +836,12 @@ static ssize_t store_mem_gpio_reg(struct device *d,
 	ipw_write_reg32(p, 0x301100, reg);
 	return strnlen(buf, count);
 }
-static DEVICE_ATTR(mem_gpio_reg, S_IWUSR|S_IRUGO,
-		   show_mem_gpio_reg,store_mem_gpio_reg);
+
+static DEVICE_ATTR(mem_gpio_reg, S_IWUSR | S_IRUGO,
+		   show_mem_gpio_reg, store_mem_gpio_reg);
 
 static ssize_t show_indirect_dword(struct device *d,
-				struct device_attribute *attr, char *buf)
+				   struct device_attribute *attr, char *buf)
 {
 	u32 reg = 0;
 	struct ipw_priv *priv = d->driver_data;
@@ -836,8 +853,8 @@ static ssize_t show_indirect_dword(struct device *d,
 	return sprintf(buf, "0x%08x\n", reg);
 }
 static ssize_t store_indirect_dword(struct device *d,
-				struct device_attribute *attr, const char *buf,
-				size_t count)
+				    struct device_attribute *attr,
+				    const char *buf, size_t count)
 {
 	struct ipw_priv *priv = d->driver_data;
 
@@ -845,11 +862,12 @@ static ssize_t store_indirect_dword(struct device *d,
 	priv->status |= STATUS_INDIRECT_DWORD;
 	return strnlen(buf, count);
 }
-static DEVICE_ATTR(indirect_dword, S_IWUSR|S_IRUGO,
-		   show_indirect_dword,store_indirect_dword);
+
+static DEVICE_ATTR(indirect_dword, S_IWUSR | S_IRUGO,
+		   show_indirect_dword, store_indirect_dword);
 
 static ssize_t show_indirect_byte(struct device *d,
-			struct device_attribute *attr, char *buf)
+				  struct device_attribute *attr, char *buf)
 {
 	u8 reg = 0;
 	struct ipw_priv *priv = d->driver_data;
@@ -861,8 +879,8 @@ static ssize_t show_indirect_byte(struct device *d,
 	return sprintf(buf, "0x%02x\n", reg);
 }
 static ssize_t store_indirect_byte(struct device *d,
-				struct device_attribute *attr, const char *buf,
-				size_t count)
+				   struct device_attribute *attr,
+				   const char *buf, size_t count)
 {
 	struct ipw_priv *priv = d->driver_data;
 
@@ -870,11 +888,12 @@ static ssize_t store_indirect_byte(struct device *d,
 	priv->status |= STATUS_INDIRECT_BYTE;
 	return strnlen(buf, count);
 }
-static DEVICE_ATTR(indirect_byte, S_IWUSR|S_IRUGO,
+
+static DEVICE_ATTR(indirect_byte, S_IWUSR | S_IRUGO,
 		   show_indirect_byte, store_indirect_byte);
 
 static ssize_t show_direct_dword(struct device *d,
-				struct device_attribute *attr, char *buf)
+				 struct device_attribute *attr, char *buf)
 {
 	u32 reg = 0;
 	struct ipw_priv *priv = d->driver_data;
@@ -887,8 +906,8 @@ static ssize_t show_direct_dword(struct device *d,
 	return sprintf(buf, "0x%08x\n", reg);
 }
 static ssize_t store_direct_dword(struct device *d,
-			struct device_attribute *attr, const char *buf,
-			size_t count)
+				  struct device_attribute *attr,
+				  const char *buf, size_t count)
 {
 	struct ipw_priv *priv = d->driver_data;
 
@@ -896,9 +915,9 @@ static ssize_t store_direct_dword(struct device *d,
 	priv->status |= STATUS_DIRECT_DWORD;
 	return strnlen(buf, count);
 }
-static DEVICE_ATTR(direct_dword, S_IWUSR|S_IRUGO,
-		   show_direct_dword,store_direct_dword);
 
+static DEVICE_ATTR(direct_dword, S_IWUSR | S_IRUGO,
+		   show_direct_dword, store_direct_dword);
 
 static inline int rf_kill_active(struct ipw_priv *priv)
 {
@@ -911,7 +930,7 @@ static inline int rf_kill_active(struct ipw_priv *priv)
 }
 
 static ssize_t show_rf_kill(struct device *d, struct device_attribute *attr,
-				char *buf)
+			    char *buf)
 {
 	/* 0 - RF kill not enabled
 	   1 - SW based RF kill active (sysfs)
@@ -919,7 +938,7 @@ static ssize_t show_rf_kill(struct device *d, struct device_attribute *attr,
 	   3 - Both HW and SW baed RF kill active */
 	struct ipw_priv *priv = d->driver_data;
 	int val = ((priv->status & STATUS_RF_KILL_SW) ? 0x1 : 0x0) |
-		(rf_kill_active(priv) ? 0x2 : 0x0);
+	    (rf_kill_active(priv) ? 0x2 : 0x0);
 	return sprintf(buf, "%i\n", val);
 }
 
@@ -927,7 +946,7 @@ static int ipw_radio_kill_sw(struct ipw_priv *priv, int disable_radio)
 {
 	if ((disable_radio ? 1 : 0) ==
 	    (priv->status & STATUS_RF_KILL_SW ? 1 : 0))
-		return 0 ;
+		return 0;
 
 	IPW_DEBUG_RF_KILL("Manual SW RF Kill set to: RADIO  %s\n",
 			  disable_radio ? "OFF" : "ON");
@@ -956,8 +975,8 @@ static int ipw_radio_kill_sw(struct ipw_priv *priv, int disable_radio)
 	return 1;
 }
 
-static ssize_t store_rf_kill(struct device *d,  struct device_attribute *attr,
-				const char *buf, size_t count)
+static ssize_t store_rf_kill(struct device *d, struct device_attribute *attr,
+			     const char *buf, size_t count)
 {
 	struct ipw_priv *priv = d->driver_data;
 
@@ -965,7 +984,8 @@ static ssize_t store_rf_kill(struct device *d,  struct device_attribute *attr,
 
 	return count;
 }
-static DEVICE_ATTR(rf_kill, S_IWUSR|S_IRUGO, show_rf_kill, store_rf_kill);
+
+static DEVICE_ATTR(rf_kill, S_IWUSR | S_IRUGO, show_rf_kill, store_rf_kill);
 
 static void ipw_irq_tasklet(struct ipw_priv *priv)
 {
@@ -990,7 +1010,7 @@ static void ipw_irq_tasklet(struct ipw_priv *priv)
 
 	if (inta & CX2_INTA_BIT_TX_CMD_QUEUE) {
 		IPW_DEBUG_HC("Command completed.\n");
-		rc = ipw_queue_tx_reclaim( priv, &priv->txq_cmd, -1);
+		rc = ipw_queue_tx_reclaim(priv, &priv->txq_cmd, -1);
 		priv->status &= ~STATUS_HCMD_ACTIVE;
 		wake_up_interruptible(&priv->wait_command_queue);
 		handled |= CX2_INTA_BIT_TX_CMD_QUEUE;
@@ -998,25 +1018,25 @@ static void ipw_irq_tasklet(struct ipw_priv *priv)
 
 	if (inta & CX2_INTA_BIT_TX_QUEUE_1) {
 		IPW_DEBUG_TX("TX_QUEUE_1\n");
-		rc = ipw_queue_tx_reclaim( priv, &priv->txq[0], 0);
+		rc = ipw_queue_tx_reclaim(priv, &priv->txq[0], 0);
 		handled |= CX2_INTA_BIT_TX_QUEUE_1;
 	}
 
 	if (inta & CX2_INTA_BIT_TX_QUEUE_2) {
 		IPW_DEBUG_TX("TX_QUEUE_2\n");
-		rc = ipw_queue_tx_reclaim( priv, &priv->txq[1], 1);
+		rc = ipw_queue_tx_reclaim(priv, &priv->txq[1], 1);
 		handled |= CX2_INTA_BIT_TX_QUEUE_2;
 	}
 
 	if (inta & CX2_INTA_BIT_TX_QUEUE_3) {
 		IPW_DEBUG_TX("TX_QUEUE_3\n");
-		rc = ipw_queue_tx_reclaim( priv, &priv->txq[2], 2);
+		rc = ipw_queue_tx_reclaim(priv, &priv->txq[2], 2);
 		handled |= CX2_INTA_BIT_TX_QUEUE_3;
 	}
 
 	if (inta & CX2_INTA_BIT_TX_QUEUE_4) {
 		IPW_DEBUG_TX("TX_QUEUE_4\n");
-		rc = ipw_queue_tx_reclaim( priv, &priv->txq[3], 3);
+		rc = ipw_queue_tx_reclaim(priv, &priv->txq[3], 3);
 		handled |= CX2_INTA_BIT_TX_QUEUE_4;
 	}
 
@@ -1074,8 +1094,7 @@ static void ipw_irq_tasklet(struct ipw_priv *priv)
 	}
 
 	if (handled != inta) {
-		IPW_ERROR("Unhandled INTA bits 0x%08x\n",
-				inta & ~handled);
+		IPW_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
 	}
 
 	/* enable all interrupts */
@@ -1143,7 +1162,7 @@ static char *get_cmd_string(u8 cmd)
 		return "UNKNOWN";
 	}
 }
-#endif /* CONFIG_IPW_DEBUG */
+#endif				/* CONFIG_IPW_DEBUG */
 
 #define HOST_COMPLETE_TIMEOUT HZ
 static int ipw_send_cmd(struct ipw_priv *priv, struct host_cmd *cmd)
@@ -1159,15 +1178,16 @@ static int ipw_send_cmd(struct ipw_priv *priv, struct host_cmd *cmd)
 
 	IPW_DEBUG_HC("Sending %s command (#%d), %d bytes\n",
 		     get_cmd_string(cmd->cmd), cmd->cmd, cmd->len);
-	printk_buf(IPW_DL_HOST_COMMAND, (u8*)cmd->param, cmd->len);
+	printk_buf(IPW_DL_HOST_COMMAND, (u8 *) cmd->param, cmd->len);
 
 	rc = ipw_queue_tx_hcmd(priv, cmd->cmd, &cmd->param, cmd->len, 0);
 	if (rc)
 		return rc;
 
-	rc = wait_event_interruptible_timeout(
-		priv->wait_command_queue, !(priv->status & STATUS_HCMD_ACTIVE),
-		HOST_COMPLETE_TIMEOUT);
+	rc = wait_event_interruptible_timeout(priv->wait_command_queue,
+					      !(priv->
+						status & STATUS_HCMD_ACTIVE),
+					      HOST_COMPLETE_TIMEOUT);
 	if (rc == 0) {
 		IPW_DEBUG_INFO("Command completion failed out after %dms.\n",
 			       jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
@@ -1215,7 +1235,7 @@ static int ipw_send_system_config(struct ipw_priv *priv,
 		return -1;
 	}
 
-	memcpy(&cmd.param,config,sizeof(*config));
+	memcpy(&cmd.param, config, sizeof(*config));
 	if (ipw_send_cmd(priv, &cmd)) {
 		IPW_ERROR("failed to send SYSTEM_CONFIG command\n");
 		return -1;
@@ -1224,7 +1244,7 @@ static int ipw_send_system_config(struct ipw_priv *priv,
 	return 0;
 }
 
-static int ipw_send_ssid(struct ipw_priv *priv, u8 *ssid, int len)
+static int ipw_send_ssid(struct ipw_priv *priv, u8 * ssid, int len)
 {
 	struct host_cmd cmd = {
 		.cmd = IPW_CMD_SSID,
@@ -1245,7 +1265,7 @@ static int ipw_send_ssid(struct ipw_priv *priv, u8 *ssid, int len)
 	return 0;
 }
 
-static int ipw_send_adapter_address(struct ipw_priv *priv, u8 *mac)
+static int ipw_send_adapter_address(struct ipw_priv *priv, u8 * mac)
 {
 	struct host_cmd cmd = {
 		.cmd = IPW_CMD_ADAPTER_ADDRESS,
@@ -1284,9 +1304,6 @@ static void ipw_adapter_restart(void *adapter)
 	}
 }
 
-
-
-
 #define IPW_SCAN_CHECK_WATCHDOG (5 * HZ)
 
 static void ipw_scan_check(void *data)
@@ -1313,7 +1330,7 @@ static int ipw_send_scan_request_ext(struct ipw_priv *priv,
 		return -1;
 	}
 
-	memcpy(&cmd.param,request,sizeof(*request));
+	memcpy(&cmd.param, request, sizeof(*request));
 	if (ipw_send_cmd(priv, &cmd)) {
 		IPW_ERROR("failed to send SCAN_REQUEST_EXT command\n");
 		return -1;
@@ -1351,7 +1368,7 @@ static int ipw_set_sensitivity(struct ipw_priv *priv, u16 sens)
 		.len = sizeof(struct ipw_sensitivity_calib)
 	};
 	struct ipw_sensitivity_calib *calib = (struct ipw_sensitivity_calib *)
-		&cmd.param;
+	    &cmd.param;
 	calib->beacon_rssi_raw = sens;
 	if (ipw_send_cmd(priv, &cmd)) {
 		IPW_ERROR("failed to send SENSITIVITY CALIB command\n");
@@ -1374,7 +1391,7 @@ static int ipw_send_associate(struct ipw_priv *priv,
 		return -1;
 	}
 
-	memcpy(&cmd.param,associate,sizeof(*associate));
+	memcpy(&cmd.param, associate, sizeof(*associate));
 	if (ipw_send_cmd(priv, &cmd)) {
 		IPW_ERROR("failed to send ASSOCIATE command\n");
 		return -1;
@@ -1396,7 +1413,7 @@ static int ipw_send_supported_rates(struct ipw_priv *priv,
 		return -1;
 	}
 
-	memcpy(&cmd.param,rates,sizeof(*rates));
+	memcpy(&cmd.param, rates, sizeof(*rates));
 	if (ipw_send_cmd(priv, &cmd)) {
 		IPW_ERROR("failed to send SUPPORTED_RATES command\n");
 		return -1;
@@ -1440,7 +1457,7 @@ static int ipw_send_card_disable(struct ipw_priv *priv, u32 phy_off)
 		return -1;
 	}
 
-	*((u32*)&cmd.param) = phy_off;
+	*((u32 *) & cmd.param) = phy_off;
 
 	if (ipw_send_cmd(priv, &cmd)) {
 		IPW_ERROR("failed to send CARD_DISABLE command\n");
@@ -1451,8 +1468,7 @@ static int ipw_send_card_disable(struct ipw_priv *priv, u32 phy_off)
 }
 #endif
 
-static int ipw_send_tx_power(struct ipw_priv *priv,
-			     struct ipw_tx_power *power)
+static int ipw_send_tx_power(struct ipw_priv *priv, struct ipw_tx_power *power)
 {
 	struct host_cmd cmd = {
 		.cmd = IPW_CMD_TX_POWER,
@@ -1464,7 +1480,7 @@ static int ipw_send_tx_power(struct ipw_priv *priv,
 		return -1;
 	}
 
-	memcpy(&cmd.param,power,sizeof(*power));
+	memcpy(&cmd.param, power, sizeof(*power));
 	if (ipw_send_cmd(priv, &cmd)) {
 		IPW_ERROR("failed to send TX_POWER command\n");
 		return -1;
@@ -1527,7 +1543,7 @@ static int ipw_send_power_mode(struct ipw_priv *priv, u32 mode)
 		.cmd = IPW_CMD_POWER_MODE,
 		.len = sizeof(u32)
 	};
-	u32 *param = (u32*)(&cmd.param);
+	u32 *param = (u32 *) (&cmd.param);
 
 	if (!priv) {
 		IPW_ERROR("Invalid args\n");
@@ -1585,67 +1601,67 @@ static inline void eeprom_write_reg(struct ipw_priv *p, u32 data)
 }
 
 /* perform a chip select operation */
-static inline void eeprom_cs(struct ipw_priv* priv)
+static inline void eeprom_cs(struct ipw_priv *priv)
 {
-	eeprom_write_reg(priv,0);
-	eeprom_write_reg(priv,EEPROM_BIT_CS);
-	eeprom_write_reg(priv,EEPROM_BIT_CS|EEPROM_BIT_SK);
-	eeprom_write_reg(priv,EEPROM_BIT_CS);
+	eeprom_write_reg(priv, 0);
+	eeprom_write_reg(priv, EEPROM_BIT_CS);
+	eeprom_write_reg(priv, EEPROM_BIT_CS | EEPROM_BIT_SK);
+	eeprom_write_reg(priv, EEPROM_BIT_CS);
 }
 
 /* perform a chip select operation */
-static inline void eeprom_disable_cs(struct ipw_priv* priv)
+static inline void eeprom_disable_cs(struct ipw_priv *priv)
 {
-	eeprom_write_reg(priv,EEPROM_BIT_CS);
-	eeprom_write_reg(priv,0);
-	eeprom_write_reg(priv,EEPROM_BIT_SK);
+	eeprom_write_reg(priv, EEPROM_BIT_CS);
+	eeprom_write_reg(priv, 0);
+	eeprom_write_reg(priv, EEPROM_BIT_SK);
 }
 
 /* push a single bit down to the eeprom */
-static inline void eeprom_write_bit(struct ipw_priv *p,u8 bit)
+static inline void eeprom_write_bit(struct ipw_priv *p, u8 bit)
 {
-	int d = ( bit ? EEPROM_BIT_DI : 0);
-	eeprom_write_reg(p,EEPROM_BIT_CS|d);
-	eeprom_write_reg(p,EEPROM_BIT_CS|d|EEPROM_BIT_SK);
+	int d = (bit ? EEPROM_BIT_DI : 0);
+	eeprom_write_reg(p, EEPROM_BIT_CS | d);
+	eeprom_write_reg(p, EEPROM_BIT_CS | d | EEPROM_BIT_SK);
 }
 
 /* push an opcode followed by an address down to the eeprom */
-static void eeprom_op(struct ipw_priv* priv, u8 op, u8 addr)
+static void eeprom_op(struct ipw_priv *priv, u8 op, u8 addr)
 {
 	int i;
 
 	eeprom_cs(priv);
-	eeprom_write_bit(priv,1);
-	eeprom_write_bit(priv,op&2);
-	eeprom_write_bit(priv,op&1);
-	for ( i=7; i>=0; i-- ) {
-		eeprom_write_bit(priv,addr&(1<<i));
+	eeprom_write_bit(priv, 1);
+	eeprom_write_bit(priv, op & 2);
+	eeprom_write_bit(priv, op & 1);
+	for (i = 7; i >= 0; i--) {
+		eeprom_write_bit(priv, addr & (1 << i));
 	}
 }
 
 /* pull 16 bits off the eeprom, one bit at a time */
-static u16 eeprom_read_u16(struct ipw_priv* priv, u8 addr)
+static u16 eeprom_read_u16(struct ipw_priv *priv, u8 addr)
 {
 	int i;
-	u16 r=0;
+	u16 r = 0;
 
 	/* Send READ Opcode */
-	eeprom_op(priv,EEPROM_CMD_READ,addr);
+	eeprom_op(priv, EEPROM_CMD_READ, addr);
 
 	/* Send dummy bit */
-	eeprom_write_reg(priv,EEPROM_BIT_CS);
+	eeprom_write_reg(priv, EEPROM_BIT_CS);
 
 	/* Read the byte off the eeprom one bit at a time */
-	for ( i=0; i<16; i++ ) {
+	for (i = 0; i < 16; i++) {
 		u32 data = 0;
-		eeprom_write_reg(priv,EEPROM_BIT_CS|EEPROM_BIT_SK);
-		eeprom_write_reg(priv,EEPROM_BIT_CS);
-		data = ipw_read_reg32(priv,FW_MEM_REG_EEPROM_ACCESS);
-		r = (r<<1) | ((data & EEPROM_BIT_DO)?1:0);
+		eeprom_write_reg(priv, EEPROM_BIT_CS | EEPROM_BIT_SK);
+		eeprom_write_reg(priv, EEPROM_BIT_CS);
+		data = ipw_read_reg32(priv, FW_MEM_REG_EEPROM_ACCESS);
+		r = (r << 1) | ((data & EEPROM_BIT_DO) ? 1 : 0);
 	}
 
 	/* Send another dummy bit */
-	eeprom_write_reg(priv,0);
+	eeprom_write_reg(priv, 0);
 	eeprom_disable_cs(priv);
 
 	return r;
@@ -1653,9 +1669,9 @@ static u16 eeprom_read_u16(struct ipw_priv* priv, u8 addr)
 
 /* helper function for pulling the mac address out of the private */
 /* data's copy of the eeprom data                                 */
-static void eeprom_parse_mac(struct ipw_priv* priv, u8* mac)
+static void eeprom_parse_mac(struct ipw_priv *priv, u8 * mac)
 {
-	u8* ee = (u8*)priv->eeprom;
+	u8 *ee = (u8 *) priv->eeprom;
 	memcpy(mac, &ee[EEPROM_MAC_ADDRESS], 6);
 }
 
@@ -1670,26 +1686,25 @@ static void eeprom_parse_mac(struct ipw_priv* priv, u8* mac)
 static void ipw_eeprom_init_sram(struct ipw_priv *priv)
 {
 	int i;
-	u16 *eeprom = (u16 *)priv->eeprom;
+	u16 *eeprom = (u16 *) priv->eeprom;
 
 	IPW_DEBUG_TRACE(">>\n");
 
 	/* read entire contents of eeprom into private buffer */
-	for ( i=0; i<128; i++ )
-		eeprom[i] = eeprom_read_u16(priv,(u8)i);
+	for (i = 0; i < 128; i++)
+		eeprom[i] = eeprom_read_u16(priv, (u8) i);
 
 	/*
 	   If the data looks correct, then copy it to our private
 	   copy.  Otherwise let the firmware know to perform the operation
 	   on it's own
-	*/
+	 */
 	if ((priv->eeprom + EEPROM_VERSION) != 0) {
 		IPW_DEBUG_INFO("Writing EEPROM data into SRAM\n");
 
 		/* write the eeprom data to sram */
-		for( i=0; i<CX2_EEPROM_IMAGE_SIZE; i++ )
-			ipw_write8(priv, IPW_EEPROM_DATA + i,
-				   priv->eeprom[i]);
+		for (i = 0; i < CX2_EEPROM_IMAGE_SIZE; i++)
+			ipw_write8(priv, IPW_EEPROM_DATA + i, priv->eeprom[i]);
 
 		/* Do not load eeprom data on fatal error or suspend */
 		ipw_write32(priv, IPW_EEPROM_LOAD_DISABLE, 0);
@@ -1703,11 +1718,11 @@ static void ipw_eeprom_init_sram(struct ipw_priv *priv)
 	IPW_DEBUG_TRACE("<<\n");
 }
 
-
 static inline void ipw_zero_memory(struct ipw_priv *priv, u32 start, u32 count)
 {
 	count >>= 2;
-	if (!count) return;
+	if (!count)
+		return;
 	_ipw_write32(priv, CX2_AUTOINC_ADDR, start);
 	while (count--)
 		_ipw_write32(priv, CX2_AUTOINC_DATA, 0);
@@ -1721,7 +1736,7 @@ static inline void ipw_fw_dma_reset_command_blocks(struct ipw_priv *priv)
 }
 
 static int ipw_fw_dma_enable(struct ipw_priv *priv)
-{ /* start dma engine but no transfers yet*/
+{				/* start dma engine but no transfers yet */
 
 	IPW_DEBUG_FW(">> : \n");
 
@@ -1749,12 +1764,16 @@ static void ipw_fw_dma_abort(struct ipw_priv *priv)
 	IPW_DEBUG_FW("<< \n");
 }
 
-static int ipw_fw_dma_write_command_block(struct ipw_priv *priv, int index, struct command_block *cb)
+static int ipw_fw_dma_write_command_block(struct ipw_priv *priv, int index,
+					  struct command_block *cb)
 {
-	u32 address = CX2_SHARED_SRAM_DMA_CONTROL + (sizeof(struct command_block) * index);
+	u32 address =
+	    CX2_SHARED_SRAM_DMA_CONTROL +
+	    (sizeof(struct command_block) * index);
 	IPW_DEBUG_FW(">> :\n");
 
-	ipw_write_indirect(priv, address, (u8*)cb, (int)sizeof(struct command_block));
+	ipw_write_indirect(priv, address, (u8 *) cb,
+			   (int)sizeof(struct command_block));
 
 	IPW_DEBUG_FW("<< :\n");
 	return 0;
@@ -1764,17 +1783,20 @@ static int ipw_fw_dma_write_command_block(struct ipw_priv *priv, int index, stru
 static int ipw_fw_dma_kick(struct ipw_priv *priv)
 {
 	u32 control = 0;
-	u32 index=0;
+	u32 index = 0;
 
 	IPW_DEBUG_FW(">> :\n");
 
 	for (index = 0; index < priv->sram_desc.last_cb_index; index++)
-		ipw_fw_dma_write_command_block(priv, index, &priv->sram_desc.cb_list[index]);
+		ipw_fw_dma_write_command_block(priv, index,
+					       &priv->sram_desc.cb_list[index]);
 
 	/* Enable the DMA in the CSR register */
-	ipw_clear_bit(priv, CX2_RESET_REG,CX2_RESET_REG_MASTER_DISABLED | CX2_RESET_REG_STOP_MASTER);
+	ipw_clear_bit(priv, CX2_RESET_REG,
+		      CX2_RESET_REG_MASTER_DISABLED |
+		      CX2_RESET_REG_STOP_MASTER);
 
-