diff options
| author | Tzu-En Huang <tehuang@realtek.com> | 2020-03-26 10:04:08 +0800 |
|---|---|---|
| committer | Kalle Valo <kvalo@codeaurora.org> | 2020-03-26 21:21:43 +0200 |
| commit | 2542469d1258b2b2f2849ce1f4df88e86a761f7c (patch) | |
| tree | c773a3adecbf407284b47bfffa09cd38a1eec47e /drivers/net/wireless/realtek/rtw88/tx.h | |
| parent | 8bc513b9940ae531d8ea970488381f84a2d558be (diff) | |
rtw88: fix non-increase management packet sequence number
In previous setting, management packets' sequence numbers will
not increase and always stay at 0. Add hw sequence number support
for mgmt packets.
The table below shows different sequence number setting in the
tx descriptor.
seq num ctrl | EN_HWSEQ | DISQSELSEL | HW_SSN_SEL
------------------------------------------------------
sw ctrl | 0 | N/A | N/A
hw ctrl per MACID | 1 | 0 | N/A
hw ctrl per HWREG | 1 | 1 |HWREG(0/1/2/3)
Signed-off-by: Tzu-En Huang <tehuang@realtek.com>
Signed-off-by: Yan-Hsuan Chuang <yhchuang@realtek.com>
Reviewed-by: Brian Norris <briannorris@chromium.org>
Tested-by: Brian Norris <briannorris@chromium.org>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
Link: https://lore.kernel.org/r/20200326020408.25218-1-yhchuang@realtek.com
Diffstat (limited to 'drivers/net/wireless/realtek/rtw88/tx.h')
| -rw-r--r-- | drivers/net/wireless/realtek/rtw88/tx.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/net/wireless/realtek/rtw88/tx.h b/drivers/net/wireless/realtek/rtw88/tx.h index e488a2643eb3..b973de0f4dc0 100644 --- a/drivers/net/wireless/realtek/rtw88/tx.h +++ b/drivers/net/wireless/realtek/rtw88/tx.h @@ -53,6 +53,12 @@ le32p_replace_bits((__le32 *)(txdesc) + 0x02, value, BIT(19)) #define SET_TX_DESC_SW_DEFINE(tx_desc, value) \ le32p_replace_bits((__le32 *)(txdesc) + 0x06, value, GENMASK(11, 0)) +#define SET_TX_DESC_DISQSELSEQ(txdesc, value) \ + le32p_replace_bits((__le32 *)(txdesc) + 0x00, value, BIT(31)) +#define SET_TX_DESC_EN_HWSEQ(txdesc, value) \ + le32p_replace_bits((__le32 *)(txdesc) + 0x08, value, BIT(15)) +#define SET_TX_DESC_HW_SSN_SEL(txdesc, value) \ + le32p_replace_bits((__le32 *)(txdesc) + 0x03, value, GENMASK(7, 6)) enum rtw_tx_desc_queue_select { TX_DESC_QSEL_TID0 = 0, |