diff options
| author | Ping-Ke Shih <pkshih@realtek.com> | 2020-05-04 18:50:04 +0800 |
|---|---|---|
| committer | Kalle Valo <kvalo@codeaurora.org> | 2020-05-06 11:34:13 +0300 |
| commit | 158441a2bed49ea294cc79709bf88e17a7b71912 (patch) | |
| tree | f2804f4495c7dd166e447d4dc840defed9e9cfbe /drivers/net/wireless/realtek/rtw88/rtw8723d.h | |
| parent | db39a9ddacada1e4c065d894faa3fa0e1100b10d (diff) | |
rtw88: 8723d: Add query_rx_desc
This ops is used to parse RX descriptor to know the length of received
packet and containing PHY status. If PHY status is existing, the order is
RX descriptor, PHY status and then packet.
There are two types of PHY status, named CCK and OFDM. Their size are the
same, but formats are different.
struct ieee80211_rx_status is also filled depends on above information.
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Yan-Hsuan Chuang <yhchuang@realtek.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
Link: https://lore.kernel.org/r/20200504105010.10780-3-yhchuang@realtek.com
Diffstat (limited to 'drivers/net/wireless/realtek/rtw88/rtw8723d.h')
| -rw-r--r-- | drivers/net/wireless/realtek/rtw88/rtw8723d.h | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/drivers/net/wireless/realtek/rtw88/rtw8723d.h b/drivers/net/wireless/realtek/rtw88/rtw8723d.h index 6321dea83519..035049a29e7c 100644 --- a/drivers/net/wireless/realtek/rtw88/rtw8723d.h +++ b/drivers/net/wireless/realtek/rtw88/rtw8723d.h @@ -44,6 +44,28 @@ struct rtw8723d_efuse { struct rtw8723de_efuse e; }; +/* phy status page0 */ +#define GET_PHY_STAT_P0_PWDB(phy_stat) \ + le32_get_bits(*((__le32 *)(phy_stat) + 0x00), GENMASK(15, 8)) + +/* phy status page1 */ +#define GET_PHY_STAT_P1_PWDB_A(phy_stat) \ + le32_get_bits(*((__le32 *)(phy_stat) + 0x00), GENMASK(15, 8)) +#define GET_PHY_STAT_P1_PWDB_B(phy_stat) \ + le32_get_bits(*((__le32 *)(phy_stat) + 0x00), GENMASK(23, 16)) +#define GET_PHY_STAT_P1_RF_MODE(phy_stat) \ + le32_get_bits(*((__le32 *)(phy_stat) + 0x03), GENMASK(29, 28)) +#define GET_PHY_STAT_P1_L_RXSC(phy_stat) \ + le32_get_bits(*((__le32 *)(phy_stat) + 0x01), GENMASK(11, 8)) +#define GET_PHY_STAT_P1_HT_RXSC(phy_stat) \ + le32_get_bits(*((__le32 *)(phy_stat) + 0x01), GENMASK(15, 12)) +#define GET_PHY_STAT_P1_RXEVM_A(phy_stat) \ + le32_get_bits(*((__le32 *)(phy_stat) + 0x04), GENMASK(7, 0)) +#define GET_PHY_STAT_P1_CFO_TAIL_A(phy_stat) \ + le32_get_bits(*((__le32 *)(phy_stat) + 0x05), GENMASK(7, 0)) +#define GET_PHY_STAT_P1_RXSNR_A(phy_stat) \ + le32_get_bits(*((__le32 *)(phy_stat) + 0x06), GENMASK(7, 0)) + #define REG_OFDM0_XAAGC1 0x0c50 #define REG_OFDM0_XBAGC1 0x0c58 |