diff options
| author | Lorenzo Bianconi <lorenzo@kernel.org> | 2020-11-13 11:11:31 +0100 |
|---|---|---|
| committer | Felix Fietkau <nbd@nbd.name> | 2020-12-04 14:31:15 +0100 |
| commit | 4c430774e01b06337a1aaeabc3f9f62815ed1a58 (patch) | |
| tree | 041f4eb0e45794504c8e658814f0780ea0e82247 /drivers/net/wireless/mediatek/mt76/mt7915/mac.c | |
| parent | 98df2baeb364389948f56d2b235bfc5902d64e01 (diff) | |
mt76: mt7915: introduce dbdc support
Introduce mt7915 dbdc support. If dbdc is available, mt7915 primary phy
will work on 2.4GHz band, while secondary one on 5GHz band.
Co-developed-by: Shayne Chen <shayne.chen@mediatek.com>
Signed-off-by: Shayne Chen <shayne.chen@mediatek.com>
Co-developed-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
Diffstat (limited to 'drivers/net/wireless/mediatek/mt76/mt7915/mac.c')
| -rw-r--r-- | drivers/net/wireless/mediatek/mt76/mt7915/mac.c | 14 |
1 files changed, 11 insertions, 3 deletions
diff --git a/drivers/net/wireless/mediatek/mt76/mt7915/mac.c b/drivers/net/wireless/mediatek/mt76/mt7915/mac.c index 3aedc079d7b6..b509269df60b 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7915/mac.c +++ b/drivers/net/wireless/mediatek/mt76/mt7915/mac.c @@ -1065,6 +1065,7 @@ void mt7915_mac_tx_free(struct mt7915_dev *dev, struct sk_buff *skb) { struct mt7915_tx_free *free = (struct mt7915_tx_free *)skb->data; struct mt76_dev *mdev = &dev->mt76; + struct mt76_phy *mphy_ext = mdev->phy2; struct mt76_txwi_cache *txwi; struct ieee80211_sta *sta = NULL; LIST_HEAD(free_list); @@ -1074,6 +1075,10 @@ void mt7915_mac_tx_free(struct mt7915_dev *dev, struct sk_buff *skb) /* clean DMA queues and unmap buffers first */ mt76_queue_tx_cleanup(dev, dev->mphy.q_tx[MT_TXQ_PSD], false); mt76_queue_tx_cleanup(dev, dev->mphy.q_tx[MT_TXQ_BE], false); + if (mphy_ext) { + mt76_queue_tx_cleanup(dev, mphy_ext->q_tx[MT_TXQ_PSD], false); + mt76_queue_tx_cleanup(dev, mphy_ext->q_tx[MT_TXQ_BE], false); + } /* * TODO: MT_TX_FREE_LATENCY is msdu time from the TXD is queued into PLE, @@ -1309,9 +1314,8 @@ mt7915_phy_get_nf(struct mt7915_phy *phy, int idx) u32 val, sum = 0, n = 0; int nss, i; - /* TODO: DBDC: 0,1 for 2.4G, 2,3 for 5G */ for (nss = 0; nss < hweight8(phy->chainmask); nss++) { - u32 reg = MT_WF_IRPI(nss); + u32 reg = MT_WF_IRPI(nss + (idx << dev->dbdc_support)); for (i = 0; i < ARRAY_SIZE(nf_power); i++, reg += 4) { val = mt7915_l2_rr(dev, reg); @@ -1413,6 +1417,7 @@ static void mt7915_dma_reset(struct mt7915_phy *phy) { struct mt7915_dev *dev = phy->dev; + struct mt76_phy *mphy_ext = dev->mt76.phy2; int i; mt76_clear(dev, MT_WFDMA0_GLO_CFG, @@ -1422,8 +1427,11 @@ mt7915_dma_reset(struct mt7915_phy *phy) usleep_range(1000, 2000); mt76_queue_tx_cleanup(dev, dev->mt76.q_mcu[MT_MCUQ_WA], true); - for (i = 0; i < __MT_TXQ_MAX; i++) + for (i = 0; i < __MT_TXQ_MAX; i++) { mt76_queue_tx_cleanup(dev, phy->mt76->q_tx[i], true); + if (mphy_ext) + mt76_queue_tx_cleanup(dev, mphy_ext->q_tx[i], true); + } mt76_for_each_q_rx(&dev->mt76, i) { mt76_queue_rx_reset(dev, i); |