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authorLuis R. Rodriguez <lrodriguez@atheros.com>2010-08-30 19:26:33 -0400
committerJohn W. Linville <linville@tuxdriver.com>2010-08-31 14:52:23 -0400
commit904879748d7439a6dabdc6be9aad983e216b027d (patch)
treed145dce26e172efa824dd4bbcfb1aa9381cca197 /drivers/net/wireless/ath/regd.h
parent803288e61e346ba367373bc7d5eeb6e11c81a33c (diff)
ath9k_hw: fix parsing of HT40 5 GHz CTLs
The 5 GHz CTL indexes were not being read for all hardware devices due to the masking out through the CTL_MODE_M mask being one bit too short. Without this the calibrated regulatory maximum values were not being picked up when devices operate on 5 GHz in HT40 mode. The final output power used for Atheros devices is the minimum between the calibrated CTL values and what CRDA provides. Cc: stable@kernel.org [2.6.27+] Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/ath/regd.h')
-rw-r--r--drivers/net/wireless/ath/regd.h1
1 files changed, 0 insertions, 1 deletions
diff --git a/drivers/net/wireless/ath/regd.h b/drivers/net/wireless/ath/regd.h
index a1c39526161a..345dd9721b41 100644
--- a/drivers/net/wireless/ath/regd.h
+++ b/drivers/net/wireless/ath/regd.h
@@ -31,7 +31,6 @@ enum ctl_group {
#define NO_CTL 0xff
#define SD_NO_CTL 0xE0
#define NO_CTL 0xff
-#define CTL_MODE_M 7
#define CTL_11A 0
#define CTL_11B 1
#define CTL_11G 2