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authorJeff Kirsher <jeffrey.t.kirsher@intel.com>2011-07-31 00:06:29 -0700
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>2011-08-27 00:58:13 -0700
commit33f810b2036f13f1b123062a9e5c1794d400ce81 (patch)
tree370b55026f4bd856e96842f86af631ca2bab3da2 /drivers/net/skfp/hwmtm.c
parent3cd0999d134235d64b175edd2eb1d46ebc97b377 (diff)
fddi: Move the FDDI drivers
Move the FDDI drivers into drivers/net/fddi/ and make the necessary Kconfig and Makefile changes. CC: "Maciej W. Rozycki" <macro@linux-mips.org> CC: Christoph Goos <cgoos@syskonnect.de> CC: <linux@syskonnect.de> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Diffstat (limited to 'drivers/net/skfp/hwmtm.c')
-rw-r--r--drivers/net/skfp/hwmtm.c2178
1 files changed, 0 insertions, 2178 deletions
diff --git a/drivers/net/skfp/hwmtm.c b/drivers/net/skfp/hwmtm.c
deleted file mode 100644
index e26398b5a7dc..000000000000
--- a/drivers/net/skfp/hwmtm.c
+++ /dev/null
@@ -1,2178 +0,0 @@
-/******************************************************************************
- *
- * (C)Copyright 1998,1999 SysKonnect,
- * a business unit of Schneider & Koch & Co. Datensysteme GmbH.
- *
- * See the file "skfddi.c" for further information.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * The information in this file is provided "AS IS" without warranty.
- *
- ******************************************************************************/
-
-#ifndef lint
-static char const ID_sccs[] = "@(#)hwmtm.c 1.40 99/05/31 (C) SK" ;
-#endif
-
-#define HWMTM
-
-#ifndef FDDI
-#define FDDI
-#endif
-
-#include "h/types.h"
-#include "h/fddi.h"
-#include "h/smc.h"
-#include "h/supern_2.h"
-#include "h/skfbiinc.h"
-
-/*
- -------------------------------------------------------------
- DOCUMENTATION
- -------------------------------------------------------------
- BEGIN_MANUAL_ENTRY(DOCUMENTATION)
-
- T B D
-
- END_MANUAL_ENTRY
-*/
-/*
- -------------------------------------------------------------
- LOCAL VARIABLES:
- -------------------------------------------------------------
-*/
-#ifdef COMMON_MB_POOL
-static SMbuf *mb_start = 0 ;
-static SMbuf *mb_free = 0 ;
-static int mb_init = FALSE ;
-static int call_count = 0 ;
-#endif
-
-/*
- -------------------------------------------------------------
- EXTERNE VARIABLES:
- -------------------------------------------------------------
-*/
-
-#ifdef DEBUG
-#ifndef DEBUG_BRD
-extern struct smt_debug debug ;
-#endif
-#endif
-
-#ifdef NDIS_OS2
-extern u_char offDepth ;
-extern u_char force_irq_pending ;
-#endif
-
-/*
- -------------------------------------------------------------
- LOCAL FUNCTIONS:
- -------------------------------------------------------------
-*/
-
-static void queue_llc_rx(struct s_smc *smc, SMbuf *mb);
-static void smt_to_llc(struct s_smc *smc, SMbuf *mb);
-static void init_txd_ring(struct s_smc *smc);
-static void init_rxd_ring(struct s_smc *smc);
-static void queue_txd_mb(struct s_smc *smc, SMbuf *mb);
-static u_long init_descr_ring(struct s_smc *smc, union s_fp_descr volatile *start,
- int count);
-static u_long repair_txd_ring(struct s_smc *smc, struct s_smt_tx_queue *queue);
-static u_long repair_rxd_ring(struct s_smc *smc, struct s_smt_rx_queue *queue);
-static SMbuf* get_llc_rx(struct s_smc *smc);
-static SMbuf* get_txd_mb(struct s_smc *smc);
-static void mac_drv_clear_txd(struct s_smc *smc);
-
-/*
- -------------------------------------------------------------
- EXTERNAL FUNCTIONS:
- -------------------------------------------------------------
-*/
-/* The external SMT functions are listed in cmtdef.h */
-
-extern void* mac_drv_get_space(struct s_smc *smc, unsigned int size);
-extern void* mac_drv_get_desc_mem(struct s_smc *smc, unsigned int size);
-extern void mac_drv_fill_rxd(struct s_smc *smc);
-extern void mac_drv_tx_complete(struct s_smc *smc,
- volatile struct s_smt_fp_txd *txd);
-extern void mac_drv_rx_complete(struct s_smc *smc,
- volatile struct s_smt_fp_rxd *rxd,
- int frag_count, int len);
-extern void mac_drv_requeue_rxd(struct s_smc *smc,
- volatile struct s_smt_fp_rxd *rxd,
- int frag_count);
-extern void mac_drv_clear_rxd(struct s_smc *smc,
- volatile struct s_smt_fp_rxd *rxd, int frag_count);
-
-#ifdef USE_OS_CPY
-extern void hwm_cpy_rxd2mb(void);
-extern void hwm_cpy_txd2mb(void);
-#endif
-
-#ifdef ALL_RX_COMPLETE
-extern void mac_drv_all_receives_complete(void);
-#endif
-
-extern u_long mac_drv_virt2phys(struct s_smc *smc, void *virt);
-extern u_long dma_master(struct s_smc *smc, void *virt, int len, int flag);
-
-#ifdef NDIS_OS2
-extern void post_proc(void);
-#else
-extern void dma_complete(struct s_smc *smc, volatile union s_fp_descr *descr,
- int flag);
-#endif
-
-extern int mac_drv_rx_init(struct s_smc *smc, int len, int fc, char *look_ahead,
- int la_len);
-
-/*
- -------------------------------------------------------------
- PUBLIC FUNCTIONS:
- -------------------------------------------------------------
-*/
-void process_receive(struct s_smc *smc);
-void fddi_isr(struct s_smc *smc);
-void smt_free_mbuf(struct s_smc *smc, SMbuf *mb);
-void init_driver_fplus(struct s_smc *smc);
-void mac_drv_rx_mode(struct s_smc *smc, int mode);
-void init_fddi_driver(struct s_smc *smc, u_char *mac_addr);
-void mac_drv_clear_tx_queue(struct s_smc *smc);
-void mac_drv_clear_rx_queue(struct s_smc *smc);
-void hwm_tx_frag(struct s_smc *smc, char far *virt, u_long phys, int len,
- int frame_status);
-void hwm_rx_frag(struct s_smc *smc, char far *virt, u_long phys, int len,
- int frame_status);
-
-int mac_drv_init(struct s_smc *smc);
-int hwm_tx_init(struct s_smc *smc, u_char fc, int frag_count, int frame_len,
- int frame_status);
-
-u_int mac_drv_check_space(void);
-
-SMbuf* smt_get_mbuf(struct s_smc *smc);
-
-#ifdef DEBUG
- void mac_drv_debug_lev(void);
-#endif
-
-/*
- -------------------------------------------------------------
- MACROS:
- -------------------------------------------------------------
-*/
-#ifndef UNUSED
-#ifdef lint
-#define UNUSED(x) (x) = (x)
-#else
-#define UNUSED(x)
-#endif
-#endif
-
-#ifdef USE_CAN_ADDR
-#define MA smc->hw.fddi_canon_addr.a
-#define GROUP_ADDR_BIT 0x01
-#else
-#define MA smc->hw.fddi_home_addr.a
-#define GROUP_ADDR_BIT 0x80
-#endif
-
-#define RXD_TXD_COUNT (HWM_ASYNC_TXD_COUNT+HWM_SYNC_TXD_COUNT+\
- SMT_R1_RXD_COUNT+SMT_R2_RXD_COUNT)
-
-#ifdef MB_OUTSIDE_SMC
-#define EXT_VIRT_MEM ((RXD_TXD_COUNT+1)*sizeof(struct s_smt_fp_txd) +\
- MAX_MBUF*sizeof(SMbuf))
-#define EXT_VIRT_MEM_2 ((RXD_TXD_COUNT+1)*sizeof(struct s_smt_fp_txd))
-#else
-#define EXT_VIRT_MEM ((RXD_TXD_COUNT+1)*sizeof(struct s_smt_fp_txd))
-#endif
-
- /*
- * define critical read for 16 Bit drivers
- */
-#if defined(NDIS_OS2) || defined(ODI2)
-#define CR_READ(var) ((var) & 0xffff0000 | ((var) & 0xffff))
-#else
-#define CR_READ(var) (__le32)(var)
-#endif
-
-#define IMASK_SLOW (IS_PLINT1 | IS_PLINT2 | IS_TIMINT | IS_TOKEN | \
- IS_MINTR1 | IS_MINTR2 | IS_MINTR3 | IS_R1_P | \
- IS_R1_C | IS_XA_C | IS_XS_C)
-
-/*
- -------------------------------------------------------------
- INIT- AND SMT FUNCTIONS:
- -------------------------------------------------------------
-*/
-
-
-/*
- * BEGIN_MANUAL_ENTRY(mac_drv_check_space)
- * u_int mac_drv_check_space()
- *
- * function DOWNCALL (drvsr.c)
- * This function calculates the needed non virtual
- * memory for MBufs, RxD and TxD descriptors etc.
- * needed by the driver.
- *
- * return u_int memory in bytes
- *
- * END_MANUAL_ENTRY
- */
-u_int mac_drv_check_space(void)
-{
-#ifdef MB_OUTSIDE_SMC
-#ifdef COMMON_MB_POOL
- call_count++ ;
- if (call_count == 1) {
- return EXT_VIRT_MEM;
- }
- else {
- return EXT_VIRT_MEM_2;
- }
-#else
- return EXT_VIRT_MEM;
-#endif
-#else
- return 0;
-#endif
-}
-
-/*
- * BEGIN_MANUAL_ENTRY(mac_drv_init)
- * void mac_drv_init(smc)
- *
- * function DOWNCALL (drvsr.c)
- * In this function the hardware module allocates it's
- * memory.
- * The operating system dependent module should call
- * mac_drv_init once, after the adatper is detected.
- * END_MANUAL_ENTRY
- */
-int mac_drv_init(struct s_smc *smc)
-{
- if (sizeof(struct s_smt_fp_rxd) % 16) {
- SMT_PANIC(smc,HWM_E0001,HWM_E0001_MSG) ;
- }
- if (sizeof(struct s_smt_fp_txd) % 16) {
- SMT_PANIC(smc,HWM_E0002,HWM_E0002_MSG) ;
- }
-
- /*
- * get the required memory for the RxDs and TxDs
- */
- if (!(smc->os.hwm.descr_p = (union s_fp_descr volatile *)
- mac_drv_get_desc_mem(smc,(u_int)
- (RXD_TXD_COUNT+1)*sizeof(struct s_smt_fp_txd)))) {
- return 1; /* no space the hwm modul can't work */
- }
-
- /*
- * get the memory for the SMT MBufs
- */
-#ifndef MB_OUTSIDE_SMC
- smc->os.hwm.mbuf_pool.mb_start=(SMbuf *)(&smc->os.hwm.mbuf_pool.mb[0]) ;
-#else
-#ifndef COMMON_MB_POOL
- if (!(smc->os.hwm.mbuf_pool.mb_start = (SMbuf *) mac_drv_get_space(smc,
- MAX_MBUF*sizeof(SMbuf)))) {
- return 1; /* no space the hwm modul can't work */
- }
-#else
- if (!mb_start) {
- if (!(mb_start = (SMbuf *) mac_drv_get_space(smc,
- MAX_MBUF*sizeof(SMbuf)))) {
- return 1; /* no space the hwm modul can't work */
- }
- }
-#endif
-#endif
- return 0;
-}
-
-/*
- * BEGIN_MANUAL_ENTRY(init_driver_fplus)
- * init_driver_fplus(smc)
- *
- * Sets hardware modul specific values for the mode register 2
- * (e.g. the byte alignment for the received frames, the position of the
- * least significant byte etc.)
- * END_MANUAL_ENTRY
- */
-void init_driver_fplus(struct s_smc *smc)
-{
- smc->hw.fp.mdr2init = FM_LSB | FM_BMMODE | FM_ENNPRQ | FM_ENHSRQ | 3 ;
-
-#ifdef PCI
- smc->hw.fp.mdr2init |= FM_CHKPAR | FM_PARITY ;
-#endif
- smc->hw.fp.mdr3init = FM_MENRQAUNLCK | FM_MENRS ;
-
-#ifdef USE_CAN_ADDR
- /* enable address bit swapping */
- smc->hw.fp.frselreg_init = FM_ENXMTADSWAP | FM_ENRCVADSWAP ;
-#endif
-}
-
-static u_long init_descr_ring(struct s_smc *smc,
- union s_fp_descr volatile *start,
- int count)
-{
- int i ;
- union s_fp_descr volatile *d1 ;
- union s_fp_descr volatile *d2 ;
- u_long phys ;
-
- DB_GEN("descr ring starts at = %x ",(void *)start,0,3) ;
- for (i=count-1, d1=start; i ; i--) {
- d2 = d1 ;
- d1++ ; /* descr is owned by the host */
- d2->r.rxd_rbctrl = cpu_to_le32(BMU_CHECK) ;
- d2->r.rxd_next = &d1->r ;
- phys = mac_drv_virt2phys(smc,(void *)d1) ;
- d2->r.rxd_nrdadr = cpu_to_le32(phys) ;
- }
- DB_GEN("descr ring ends at = %x ",(void *)d1,0,3) ;
- d1->r.rxd_rbctrl = cpu_to_le32(BMU_CHECK) ;
- d1->r.rxd_next = &start->r ;
- phys = mac_drv_virt2phys(smc,(void *)start) ;
- d1->r.rxd_nrdadr = cpu_to_le32(phys) ;
-
- for (i=count, d1=start; i ; i--) {
- DRV_BUF_FLUSH(&d1->r,DDI_DMA_SYNC_FORDEV) ;
- d1++;
- }
- return phys;
-}
-
-static void init_txd_ring(struct s_smc *smc)
-{
- struct s_smt_fp_txd volatile *ds ;
- struct s_smt_tx_queue *queue ;
- u_long phys ;
-
- /*
- * initialize the transmit descriptors
- */
- ds = (struct s_smt_fp_txd volatile *) ((char *)smc->os.hwm.descr_p +
- SMT_R1_RXD_COUNT*sizeof(struct s_smt_fp_rxd)) ;
- queue = smc->hw.fp.tx[QUEUE_A0] ;
- DB_GEN("Init async TxD ring, %d TxDs ",HWM_ASYNC_TXD_COUNT,0,3) ;
- (void)init_descr_ring(smc,(union s_fp_descr volatile *)ds,
- HWM_ASYNC_TXD_COUNT) ;
- phys = le32_to_cpu(ds->txd_ntdadr) ;
- ds++ ;
- queue->tx_curr_put = queue->tx_curr_get = ds ;
- ds-- ;
- queue->tx_free = HWM_ASYNC_TXD_COUNT ;
- queue->tx_used = 0 ;
- outpd(ADDR(B5_XA_DA),phys) ;
-
- ds = (struct s_smt_fp_txd volatile *) ((char *)ds +
- HWM_ASYNC_TXD_COUNT*sizeof(struct s_smt_fp_txd)) ;
- queue = smc->hw.fp.tx[QUEUE_S] ;
- DB_GEN("Init sync TxD ring, %d TxDs ",HWM_SYNC_TXD_COUNT,0,3) ;
- (void)init_descr_ring(smc,(union s_fp_descr volatile *)ds,
- HWM_SYNC_TXD_COUNT) ;
- phys = le32_to_cpu(ds->txd_ntdadr) ;
- ds++ ;
- queue->tx_curr_put = queue->tx_curr_get = ds ;
- queue->tx_free = HWM_SYNC_TXD_COUNT ;
- queue->tx_used = 0 ;
- outpd(ADDR(B5_XS_DA),phys) ;
-}
-
-static void init_rxd_ring(struct s_smc *smc)
-{
- struct s_smt_fp_rxd volatile *ds ;
- struct s_smt_rx_queue *queue ;
- u_long phys ;
-
- /*
- * initialize the receive descriptors
- */
- ds = (struct s_smt_fp_rxd volatile *) smc->os.hwm.descr_p ;
- queue = smc->hw.fp.rx[QUEUE_R1] ;
- DB_GEN("Init RxD ring, %d RxDs ",SMT_R1_RXD_COUNT,0,3) ;
- (void)init_descr_ring(smc,(union s_fp_descr volatile *)ds,
- SMT_R1_RXD_COUNT) ;
- phys = le32_to_cpu(ds->rxd_nrdadr) ;
- ds++ ;
- queue->rx_curr_put = queue->rx_curr_get = ds ;
- queue->rx_free = SMT_R1_RXD_COUNT ;
- queue->rx_used = 0 ;
- outpd(ADDR(B4_R1_DA),phys) ;
-}
-
-/*
- * BEGIN_MANUAL_ENTRY(init_fddi_driver)
- * void init_fddi_driver(smc,mac_addr)
- *
- * initializes the driver and it's variables
- *
- * END_MANUAL_ENTRY
- */
-void init_fddi_driver(struct s_smc *smc, u_char *mac_addr)
-{
- SMbuf *mb ;
- int i ;
-
- init_board(smc,mac_addr) ;
- (void)init_fplus(smc) ;
-
- /*
- * initialize the SMbufs for the SMT
- */
-#ifndef COMMON_MB_POOL
- mb = smc->os.hwm.mbuf_pool.mb_start ;
- smc->os.hwm.mbuf_pool.mb_free = (SMbuf *)NULL ;
- for (i = 0; i < MAX_MBUF; i++) {
- mb->sm_use_count = 1 ;
- smt_free_mbuf(smc,mb) ;
- mb++ ;
- }
-#else
- mb = mb_start ;
- if (!mb_init) {
- mb_free = 0 ;
- for (i = 0; i < MAX_MBUF; i++) {
- mb->sm_use_count = 1 ;
- smt_free_mbuf(smc,mb) ;
- mb++ ;
- }
- mb_init = TRUE ;
- }
-#endif
-
- /*
- * initialize the other variables
- */
- smc->os.hwm.llc_rx_pipe = smc->os.hwm.llc_rx_tail = (SMbuf *)NULL ;
- smc->os.hwm.txd_tx_pipe = smc->os.hwm.txd_tx_tail = NULL ;
- smc->os.hwm.pass_SMT = smc->os.hwm.pass_NSA = smc->os.hwm.pass_DB = 0 ;
- smc->os.hwm.pass_llc_promisc = TRUE ;
- smc->os.hwm.queued_rx_frames = smc->os.hwm.queued_txd_mb = 0 ;
- smc->os.hwm.detec_count = 0 ;
- smc->os.hwm.rx_break = 0 ;
- smc->os.hwm.rx_len_error = 0 ;
- smc->os.hwm.isr_flag = FALSE ;
-
- /*
- * make sure that the start pointer is 16 byte aligned
- */
- i = 16 - ((long)smc->os.hwm.descr_p & 0xf) ;
- if (i != 16) {
- DB_GEN("i = %d",i,0,3) ;
- smc->os.hwm.descr_p = (union s_fp_descr volatile *)
- ((char *)smc->os.hwm.descr_p+i) ;
- }
- DB_GEN("pt to descr area = %x",(void *)smc->os.hwm.descr_p,0,3) ;
-
- init_txd_ring(smc) ;
- init_rxd_ring(smc) ;
- mac_drv_fill_rxd(smc) ;
-
- init_plc(smc) ;
-}
-
-
-SMbuf *smt_get_mbuf(struct s_smc *smc)
-{
- register SMbuf *mb ;
-
-#ifndef COMMON_MB_POOL
- mb = smc->os.hwm.mbuf_pool.mb_free ;
-#else
- mb = mb_free ;
-#endif
- if (mb) {
-#ifndef COMMON_MB_POOL
- smc->os.hwm.mbuf_pool.mb_free = mb->sm_next ;
-#else
- mb_free = mb->sm_next ;
-#endif
- mb->sm_off = 8 ;
- mb->sm_use_count = 1 ;
- }
- DB_GEN("get SMbuf: mb = %x",(void *)mb,0,3) ;
- return mb; /* May be NULL */
-}
-
-void smt_free_mbuf(struct s_smc *smc, SMbuf *mb)
-{
-
- if (mb) {
- mb->sm_use_count-- ;
- DB_GEN("free_mbuf: sm_use_count = %d",mb->sm_use_count,0,3) ;
- /*
- * If the use_count is != zero the MBuf is queued
- * more than once and must not queued into the
- * free MBuf queue
- */
- if (!mb->sm_use_count) {
- DB_GEN("free SMbuf: mb = %x",(void *)mb,0,3) ;
-#ifndef COMMON_MB_POOL
- mb->sm_next = smc->os.hwm.mbuf_pool.mb_free ;
- smc->os.hwm.mbuf_pool.mb_free = mb ;
-#else
- mb->sm_next = mb_free ;
- mb_free = mb ;
-#endif
- }
- }
- else
- SMT_PANIC(smc,HWM_E0003,HWM_E0003_MSG) ;
-}
-
-
-/*
- * BEGIN_MANUAL_ENTRY(mac_drv_repair_descr)
- * void mac_drv_repair_descr(smc)
- *
- * function called from SMT (HWM / hwmtm.c)
- * The BMU is idle when this function is called.
- * Mac_drv_repair_descr sets up the physical address
- * for all receive and transmit queues where the BMU
- * should continue.
- * It may be that the BMU was reseted during a fragmented
- * transfer. In this case there are some fragments which will
- * never completed by the BMU. The OWN bit of this fragments
- * must be switched to be owned by the host.
- *
- * Give a start command to the receive BMU.
- * Start the transmit BMUs if transmit frames pending.
- *
- * END_MANUAL_ENTRY
- */
-void mac_drv_repair_descr(struct s_smc *smc)
-{
- u_long phys ;
-
- if (smc->hw.hw_state != STOPPED) {
- SK_BREAK() ;
- SMT_PANIC(smc,HWM_E0013,HWM_E0013_MSG) ;
- return ;
- }
-
- /*
- * repair tx queues: don't start
- */
- phys = repair_txd_ring(smc,smc->hw.fp.tx[QUEUE_A0]) ;
- outpd(ADDR(B5_XA_DA),phys) ;
- if (smc->hw.fp.tx_q[QUEUE_A0].tx_used) {
- outpd(ADDR(B0_XA_CSR),CSR_START) ;
- }
- phys = repair_txd_ring(smc,smc->hw.fp.tx[QUEUE_S]) ;
- outpd(ADDR(B5_XS_DA),phys) ;
- if (smc->hw.fp.tx_q[QUEUE_S].tx_used) {
- outpd(ADDR(B0_XS_CSR),CSR_START) ;
- }
-
- /*
- * repair rx queues
- */
- phys = repair_rxd_ring(smc,smc->hw.fp.rx[QUEUE_R1]) ;
- outpd(ADDR(B4_R1_DA),phys) ;
- outpd(ADDR(B0_R1_CSR),CSR_START) ;
-}
-
-static u_long repair_txd_ring(struct s_smc *smc, struct s_smt_tx_queue *queue)
-{
- int i ;
- int tx_used ;
- u_long phys ;
- u_long tbctrl ;
- struct s_smt_fp_txd volatile *t ;
-
- SK_UNUSED(smc) ;
-
- t = queue->tx_curr_get ;
- tx_used = queue->tx_used ;
- for (i = tx_used+queue->tx_free-1 ; i ; i-- ) {
- t = t->txd_next ;
- }
- phys = le32_to_cpu(t->txd_ntdadr) ;
-
- t = queue->tx_curr_get ;
- while (tx_used) {
- DRV_BUF_FLUSH(t,DDI_DMA_SYNC_FORCPU) ;
- tbctrl = le32_to_cpu(t->txd_tbctrl) ;
-
- if (tbctrl & BMU_OWN) {
- if (tbctrl & BMU_STF) {
- break ; /* exit the loop */
- }
- else {
- /*
- * repair the descriptor
- */
- t->txd_tbctrl &= ~cpu_to_le32(BMU_OWN) ;
- }
- }
- phys = le32_to_cpu(t->txd_ntdadr) ;
- DRV_BUF_FLUSH(t,DDI_DMA_SYNC_FORDEV) ;
- t = t->txd_next ;
- tx_used-- ;
- }
- return phys;
-}
-
-/*
- * Repairs the receive descriptor ring and returns the physical address
- * where the BMU should continue working.
- *
- * o The physical address where the BMU was stopped has to be
- * determined. This is the next RxD after rx_curr_get with an OWN
- * bit set.
- * o The BMU should start working at beginning of the next frame.
- * RxDs with an OWN bit set but with a reset STF bit should be
- * skipped and owned by the driver (OWN = 0).
- */
-static u_long repair_rxd_ring(struct s_smc *smc, struct s_smt_rx_queue *queue)
-{
- int i ;
- int rx_used ;
- u_long phys ;
- u_long rbctrl ;
- struct s_smt_fp_rxd volatile *r ;
-
- SK_UNUSED(smc) ;
-
- r = queue->rx_curr_get ;
- rx_used = queue->rx_used ;
- for (i = SMT_R1_RXD_COUNT-1 ; i ; i-- ) {
- r = r->rxd_next ;
- }
- phys = le32_to_cpu(r->rxd_nrdadr) ;
-
- r = queue->rx_curr_get ;
- while (rx_used) {
- DRV_BUF_FLUSH(r,DDI_DMA_SYNC_FORCPU) ;
- rbctrl = le32_to_cpu(r->rxd_rbctrl) ;
-
- if (rbctrl & BMU_OWN) {
- if (rbctrl & BMU_STF) {
- break ; /* exit the loop */
- }
- else {
- /*
- * repair the descriptor
- */
- r->rxd_rbctrl &= ~cpu_to_le32(BMU_OWN) ;
- }
- }
- phys = le32_to_cpu(r->rxd_nrdadr) ;
- DRV_BUF_FLUSH(r,DDI_DMA_SYNC_FORDEV) ;
- r = r->rxd_next ;
- rx_used-- ;
- }
- return phys;
-}
-
-
-/*
- -------------------------------------------------------------
- INTERRUPT SERVICE ROUTINE:
- -------------------------------------------------------------
-*/
-
-/*
- * BEGIN_MANUAL_ENTRY(fddi_isr)
- * void fddi_isr(smc)
- *
- * function DOWNCALL (drvsr.c)
- * interrupt service routine, handles the interrupt requests
- * generated by the FDDI adapter.
- *
- * NOTE: The operating system dependent module must guarantee that the
- * interrupts of the adapter are disabled when it calls fddi_isr.
- *
- * About the USE_BREAK_ISR mechanismn:
- *
- * The main requirement of this mechanismn is to force an timer IRQ when
- * leaving process_receive() with leave_isr set. process_receive() may
- * be called at any time from anywhere!
- * To be sure we don't miss such event we set 'force_irq' per default.
- * We have to force and Timer IRQ if 'smc->os.hwm.leave_isr' AND
- * 'force_irq' are set. 'force_irq' may be reset if a receive complete
- * IRQ is pending.
- *
- * END_MANUAL_ENTRY
- */
-void fddi_isr(struct s_smc *smc)
-{
- u_long is ; /* ISR source */
- u_short stu, stl ;
- SMbuf *mb ;
-
-#ifdef USE_BREAK_ISR
- int force_irq ;
-#endif
-
-#ifdef ODI2
- if (smc->os.hwm.rx_break) {
- mac_drv_fill_rxd(smc) ;
- if (smc->hw.fp.rx_q[QUEUE_R1].rx_used > 0) {
- smc->os.hwm.rx_break = 0 ;
- process_receive(smc) ;
- }
- else {
- smc->os.hwm.detec_count = 0 ;
- smt_force_irq(smc) ;
- }
- }
-#endif
- smc->os.hwm.isr_flag = TRUE ;
-
-#ifdef USE_BREAK_ISR
- force_irq = TRUE ;
- if (smc->os.hwm.leave_isr) {
- smc->os.hwm.leave_isr = FALSE ;
- process_receive(smc) ;
- }
-#endif
-
- while ((is = GET_ISR() & ISR_MASK)) {
- NDD_TRACE("CH0B",is,0,0) ;
- DB_GEN("ISA = 0x%x",is,0,7) ;
-
- if (is & IMASK_SLOW) {
- NDD_TRACE("CH1b",is,0,0) ;
- if (is & IS_PLINT1) { /* PLC1 */
- plc1_irq(smc) ;
- }
- if (is & IS_PLINT2) { /* PLC2 */
- plc2_irq(smc) ;
- }
- if (is & IS_MINTR1) { /* FORMAC+ STU1(U/L) */
- stu = inpw(FM_A(FM_ST1U)) ;
- stl = inpw(FM_A(FM_ST1L)) ;
- DB_GEN("Slow transmit complete",0,0,6) ;
- mac1_irq(smc,stu,stl) ;
- }
- if (is & IS_MINTR2) { /* FORMAC+ STU2(U/L) */
- stu= inpw(FM_A(FM_ST2U)) ;
- stl= inpw(FM_A(FM_ST2L)) ;
- DB_GEN("Slow receive complete",0,0,6) ;
- DB_GEN("stl = %x : stu = %x",stl,stu,7) ;
- mac2_irq(smc,stu,stl) ;
- }
- if (is & IS_MINTR3) { /* FORMAC+ STU3(U/L) */
- stu= inpw(FM_A(FM_ST3U)) ;
- stl= inpw(FM_A(FM_ST3L)) ;
- DB_GEN("FORMAC Mode Register 3",0,0,6) ;
- mac3_irq(smc,stu,stl) ;
- }
- if (is & IS_TIMINT) { /* Timer 82C54-2 */
- timer_irq(smc) ;
-#ifdef NDIS_OS2
- force_irq_pending = 0 ;
-#endif
- /*
- * out of RxD detection
- */
- if (++smc->os.hwm.detec_count > 4) {
- /*
- * check out of RxD condition
- */
- process_receive(smc) ;
- }
- }
- if (is & IS_TOKEN) { /* Restricted Token Monitor */
- rtm_irq(smc) ;
- }
- if (is & IS_R1_P) { /* Parity error rx queue 1 */
- /* clear IRQ */
- outpd(ADDR(B4_R1_CSR),CSR_IRQ_CL_P) ;
- SMT_PANIC(smc,HWM_E0004,HWM_E0004_MSG) ;
- }
- if (is & IS_R1_C) { /* Encoding error rx queue 1 */
- /* clear IRQ */
- outpd(ADDR(B4_R1_CSR),CSR_IRQ_CL_C) ;
- SMT_PANIC(smc,HWM_E0005,HWM_E0005_MSG) ;
- }
- if (is & IS_XA_C) { /* Encoding error async tx q */
- /* clear IRQ */
- outpd(ADDR(B5_XA_CSR),CSR_IRQ_CL_C) ;
- SMT_PANIC(smc,HWM_E0006,HWM_E0006_MSG) ;
- }
- if (is & IS_XS_C) { /* Encoding error sync tx q */
- /* clear IRQ */
- outpd(ADDR(B5_XS_CSR),CSR_IRQ_CL_C) ;
- SMT_PANIC(smc,HWM_E0007,HWM_E0007_MSG) ;
- }
- }
-
- /*
- * Fast Tx complete Async/Sync Queue (BMU service)
- */
- if (is & (IS_XS_F|IS_XA_F)) {
- DB_GEN("Fast tx complete queue",0,0,6) ;
- /*
- * clear IRQ, Note: no IRQ is lost, because
- * we always service both queues
- */
- outpd(ADDR(B5_XS_CSR),CSR_IRQ_CL_F) ;
- outpd(ADDR(B5_XA_CSR),CSR_IRQ_CL_F) ;
- mac_drv_clear_txd(smc) ;
- llc_restart_tx(smc) ;
- }
-
- /*
- * Fast Rx Complete (BMU service)
- */
- if (is & IS_R1_F) {
- DB_GEN("Fast receive complete",0,0,6) ;
- /* clear IRQ */
-#ifndef USE_BREAK_ISR
- outpd(ADDR(B4_R1_CSR),CSR_IRQ_CL_F) ;
- process_receive(smc) ;
-#else
- process_receive(smc) ;
- if (smc->os.hwm.leave_isr) {
- force_irq = FALSE ;
- } else {
- outpd(ADDR(B4_R1_CSR),CSR_IRQ_CL_F) ;
- process_receive(smc) ;
- }
-#endif
- }
-
-#ifndef NDIS_OS2
- while ((mb = get_llc_rx(smc))) {
- smt_to_llc(smc,mb) ;
- }
-#else
- if (offDepth)
- post_proc() ;
-
- while (!offDepth && (mb = get_llc_rx(smc))) {
- smt_to_llc(smc,mb) ;
- }
-
- if (!offDepth && smc->os.hwm.rx_break) {
- process_receive(smc) ;
- }
-#endif
- if (smc->q.ev_get != smc->q.ev_put) {
- NDD_TRACE("CH2a",0,0,0) ;
- ev_dispatcher(smc) ;
- }
-#ifdef NDIS_OS2
- post_proc() ;
- if (offDepth) { /* leave fddi_isr because */
- break ; /* indications not allowed */
- }
-#endif
-#ifdef USE_BREAK_ISR
- if (smc->os.hwm.leave_isr) {
- break ; /* leave fddi_isr */
- }
-#endif
-
- /* NOTE: when the isr is left, no rx is pending */
- } /* end of interrupt source polling loop */
-
-#ifdef USE_BREAK_ISR
- if (smc->os.hwm.leave_isr && force_irq) {
- smt_force_irq(smc) ;
- }
-#endif
- smc->os.hwm.isr_flag = FALSE ;
- NDD_TRACE("CH0E",0,0,0) ;
-}
-
-
-/*
- -------------------------------------------------------------
- RECEIVE FUNCTIONS:
- -------------------------------------------------------------
-*/
-
-#ifndef NDIS_OS2
-/*
- * BEGIN_MANUAL_ENTRY(mac_drv_rx_mode)
- * void mac_drv_rx_mode(smc,mode)
- *
- * function DOWNCALL (fplus.c)
- * Corresponding to the parameter mode, the operating system
- * dependent module can activate several receive modes.
- *
- * para mode = 1: RX_ENABLE_ALLMULTI enable all multicasts
- * = 2: RX_DISABLE_ALLMULTI disable "enable all multicasts"
- * = 3: RX_ENABLE_PROMISC enable promiscuous
- * = 4: RX_DISABLE_PROMISC disable promiscuous
- * = 5: RX_ENABLE_NSA enable rec. of all NSA frames
- * (disabled after 'driver reset' & 'set station address')
- * = 6: RX_DISABLE_NSA disable rec. of all NSA frames
- *
- * = 21: RX_ENABLE_PASS_SMT ( see description )
- * = 22: RX_DISABLE_PASS_SMT ( " " )
- * = 23: RX_ENABLE_PASS_NSA ( " " )
- * = 24: RX_DISABLE_PASS_NSA ( " " )
- * = 25: RX_ENABLE_PASS_DB ( " " )
- * = 26: RX_DISABLE_PASS_DB ( " " )
- * = 27: RX_DISABLE_PASS_ALL ( " " )
- * = 28: RX_DISABLE_LLC_PROMISC ( " " )
- * = 29: RX_ENABLE_LLC_PROMISC ( " " )
- *
- *
- * RX_ENABLE_PASS_SMT / RX_DISABLE_PASS_SMT
- *
- * If the operating system dependent module activates the
- * mode RX_ENABLE_PASS_SMT, the hardware module
- * duplicates all SMT frames with the frame control
- * FC_SMT_INFO and passes them to the LLC receive channel
- * by calling mac_drv_rx_init.
- * The SMT Frames which are sent by the local SMT and the NSA
- * frames whose A- and C-Indicator is not set are also duplicated
- * and passed.
- * The receive mode RX_DISABLE_PASS_SMT disables the passing
- * of SMT frames.
- *
- * RX_ENABLE_PASS_NSA / RX_DISABLE_PASS_NSA
- *
- * If the operating system dependent module activates the
- * mode RX_ENABLE_PASS_NSA, the hardware module
- * duplicates all NSA frames with frame control FC_SMT_NSA
- * and a set A-Indicator and passed them to the LLC
- * receive channel by calling mac_drv_rx_init.
- * All NSA Frames which are sent by the local SMT
- * are also duplicated and passed.
- * The receive mode RX_DISABLE_PASS_NSA disables the passing
- * of NSA frames with the A- or C-Indicator set.
- *
- * NOTE: For fear that the hardware module receives NSA frames with
- * a reset A-Indicator, the operating system dependent module
- * has to call mac_drv_rx_mode with the mode RX_ENABLE_NSA
- * before activate the RX_ENABLE_PASS_NSA mode and after every
- * 'driver reset' and 'set station address'.
- *
- * RX_ENABLE_PASS_DB / RX_DISABLE_PASS_DB
- *
- * If the operating system dependent module activates the
- * mode RX_ENABLE_PASS_DB, direct BEACON frames
- * (FC_BEACON frame control) are passed to the LLC receive
- * channel by mac_drv_rx_init.
- * The receive mode RX_DISABLE_PASS_DB disables the passing
- * of direct BEACON frames.
- *
- * RX_DISABLE_PASS_ALL
- *
- * Disables all special receives modes. It is equal to
- * call mac_drv_set_rx_mode successively with the
- * parameters RX_DISABLE_NSA, RX_DISABLE_PASS_SMT,
- * RX_DISABLE_PASS_NSA and RX_DISABLE_PASS_DB.
- *
- * RX_ENABLE_LLC_PROMISC
- *
- * (default) all received LLC frames and all SMT/NSA/DBEACON
- * frames depending on the attitude of the flags
- * PASS_SMT/PASS_NSA/PASS_DBEACON will be delivered to the
- * LLC layer
- *
- * RX_DISABLE_LLC_PROMISC
- *
- * all received SMT/NSA/DBEACON frames depending on the
- * attitude of the flags PASS_SMT/PASS_NSA/PASS_DBEACON
- * will be delivered to the LLC layer.
- * all received LLC frames with a directed address, Multicast
- * or Broadcast address will be delivered to the LLC
- * layer too.
- *
- * END_MANUAL_ENTRY
- */
-void mac_drv_rx_mode(struct s_smc *smc, int mode)
-{
- switch(mode) {
- case RX_ENABLE_PASS_SMT:
- smc->os.hwm.pass_SMT = TRUE ;
- break ;
- case RX_DISABLE_PASS_SMT:
- smc->os.hwm.pass_SMT = FALSE ;
- break ;
- case RX_ENABLE_PASS_NSA:
- smc->os.hwm.pass_NSA = TRUE ;
- break ;
- case RX_DISABLE_PASS_NSA:
- smc->os.hwm.pass_NSA = FALSE ;
- break ;
- case RX_ENABLE_PASS_DB:
- smc->os.hwm.pass_DB = TRUE ;
- break ;
- case RX_DISABLE_PASS_DB:
- smc->os.hwm.pass_DB = FALSE ;
- break ;
- case RX_DISABLE_PASS_ALL:
- smc->os.hwm.pass_SMT = smc->os.hwm.pass_NSA = FALSE ;
- smc->os.hwm.pass_DB = FALSE ;
- smc->os.hwm.pass_llc_promisc = TRUE ;
- mac_set_rx_mode(smc,RX_DISABLE_NSA) ;
- break ;
- case RX_DISABLE_LLC_PROMISC:
- smc->os.hwm.pass_llc_promisc = FALSE ;
- break ;
- case RX_ENABLE_LLC_PROMISC:
- smc->os.hwm.pass_llc_promisc = TRUE ;
- break ;
- case RX_ENABLE_ALLMULTI:
- case RX_DISABLE_ALLMULTI:
- case RX_ENABLE_PROMISC:
- case RX_DISABLE_PROMISC:
- case RX_ENABLE_NSA:
- case RX_DISABLE_NSA:
- default:
- mac_set_rx_mode(smc,mode) ;
- break ;
- }
-}
-#endif /* ifndef NDIS_OS2 */
-
-/*
- * process receive queue
- */
-void process_receive(struct s_smc *smc)
-{
- int i ;
- int n ;
- int frag_count ; /* number of RxDs of the curr rx buf */
- int used_frags ; /* number of RxDs of the curr frame */
- struct s_smt_rx_queue *queue ; /* points to the queue ctl struct */
- struct s_smt_fp_rxd volatile *r ; /* rxd pointer */
- struct s_smt_fp_rxd volatile *rxd ; /* first rxd of rx frame */
- u_long rbctrl ; /* receive buffer control word */
- u_long rfsw ; /* receive frame status word */
- u_short rx_used ;
- u_char far *virt ;
- char far *data ;
- SMbuf *mb ;
- u_char fc ; /* Frame control */
- int len ; /* Frame length */
-
- smc->os.hwm.detec_count = 0 ;
- queue = smc->hw.fp.rx[QUEUE_R1] ;
- NDD_TRACE("RHxB",0,0,0) ;
- for ( ; ; ) {
- r = queue->rx_curr_get ;
- rx_used = queue->rx_used ;
- frag_count = 0 ;
-
-#ifdef USE_BREAK_ISR
- if (smc->os.hwm.leave_isr) {
- goto rx_end ;
- }
-#endif
-#ifdef NDIS_OS2
- if (offDepth) {
- smc->os.hwm.rx_break = 1 ;
- goto rx_end ;
- }
- smc->os.hwm.rx_break = 0 ;
-#endif
-#ifdef ODI2
- if (smc->os.hwm.rx_break) {
- goto rx_end ;
- }
-#endif
- n = 0 ;
- do {
- DB_RX("Check RxD %x for OWN and EOF",(void *)r,0,5) ;
- DRV_BUF_FLUSH(r,DDI_DMA_SYNC_FORCPU) ;
- rbctrl = le32_to_cpu(CR_READ(r->rxd_rbctrl));
-
- if (rbctrl & BMU_OWN) {
- NDD_TRACE("RHxE",r,rfsw,rbctrl) ;
- DB_RX("End of RxDs",0,0,4) ;
- goto rx_end ;
- }
- /*
- * out of RxD detection
- */
- if (!rx_used) {
- SK_BREAK() ;
- SMT_PANIC(smc,HWM_E0009,HWM_E0009_MSG) ;
- /* Either we don't have an RxD or all
- * RxDs are filled. Therefore it's allowed
- * for to set the STOPPED flag */
- smc->hw.hw_state = STOPPED ;
- mac_drv_clear_rx_queue(smc) ;
- smc->hw.hw_state = STARTED ;
- mac_drv_fill_rxd(smc) ;
- smc->os.hwm.detec_count = 0 ;
- goto rx_end ;
- }
- rfsw = le32_to_cpu(r->rxd_rfsw) ;
- if ((rbctrl & BMU_STF) != ((rbctrl & BMU_ST_BUF) <<5)) {
- /*
- * The BMU_STF bit is deleted, 1 frame is
- * placed into more than 1 rx buffer
- *
- * skip frame by setting the rx len to 0
- *
- * if fragment count == 0
- * The missing STF bit belongs to the
- * current frame, search for the
- * EOF bit to complete the frame
- * else
- * the fragment belongs to the next frame,
- * exit the loop and process the frame
- */
- SK_BREAK() ;
- rfsw = 0 ;
- if (frag_count) {
- break ;
- }
- }
- n += rbctrl & 0xffff ;
- r = r->rxd_next ;
- frag_count++ ;
- rx_used-- ;
- } while (!(rbctrl & BMU_EOF)) ;
- used_frags = frag_count ;
- DB_RX("EOF set in RxD, used_frags = %d ",used_frags,0,5) ;
-
- /* may be next 2 DRV_BUF_FLUSH() can be skipped, because */
- /* BMU_ST_BUF will not be changed by the ASIC */
- DRV_BUF_FLUSH(r,DDI_DMA_SYNC_FORCPU) ;
- while (rx_used && !(r->rxd_rbctrl & cpu_to_le32(BMU_ST_BUF))) {
- DB_RX("Check STF bit in %x",(void *)r,0,5) ;
- r = r->rxd_next ;
- DRV_BUF_FLUSH(r,DDI_DMA_SYNC_FORCPU) ;
- frag_count++ ;
- rx_used-- ;
- }
- DB_RX("STF bit found",0,0,5) ;
-
- /*
- * The received frame is finished for the process receive
- */
- rxd = queue->rx_curr_get ;
- queue->rx_curr_get = r ;
- queue->rx_free += frag_count ;
- queue->rx_used = rx_used ;
-
- /*
- * ASIC Errata no. 7 (STF - Bit Bug)
- */
- rxd->rxd_rbctrl &= cpu_to_le32(~BMU_STF) ;
-
- for (r=rxd, i=frag_count ; i ; r=r->rxd_next, i--){
- DB_RX("dma_complete for RxD %x",(void *)r,0,5) ;
- dma_complete(smc,(union s_fp_descr volatile *)r,DMA_WR);
- }</