diff options
| author | Giuseppe CAVALLARO <peppe.cavallaro@st.com> | 2011-09-01 21:51:36 +0000 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2011-09-15 15:40:00 -0400 |
| commit | 26a051cc2c4ccac8d124906a3df946044037b76d (patch) | |
| tree | 1455b252ec32d963284fb30d092f66847ae3595f /drivers/net/ethernet/stmicro/stmmac/dwmac100_core.c | |
| parent | 2e19a3818bd6438213e312fce14af6217a5a749b (diff) | |
stmmac: remove the mmc code (v3)
DWMAC Management Counters (MMC) are not fully support.
The minimal support added in the past allowed to
only disable counters (if present) and mask their
interrupts.
This patch prepares the driver to support the MMC
removing obsolete code.
Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/stmicro/stmmac/dwmac100_core.c')
| -rw-r--r-- | drivers/net/ethernet/stmicro/stmmac/dwmac100_core.c | 11 |
1 files changed, 0 insertions, 11 deletions
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac100_core.c b/drivers/net/ethernet/stmicro/stmmac/dwmac100_core.c index 743a58017637..aacfc6eade50 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac100_core.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac100_core.c @@ -70,17 +70,6 @@ static void dwmac100_dump_mac_regs(void __iomem *ioaddr) readl(ioaddr + MAC_VLAN1)); pr_info("\tVLAN2 tag (offset 0x%x): 0x%08x\n", MAC_VLAN2, readl(ioaddr + MAC_VLAN2)); - pr_info("\n\tMAC management counter registers\n"); - pr_info("\t MMC crtl (offset 0x%x): 0x%08x\n", - MMC_CONTROL, readl(ioaddr + MMC_CONTROL)); - pr_info("\t MMC High Interrupt (offset 0x%x): 0x%08x\n", - MMC_HIGH_INTR, readl(ioaddr + MMC_HIGH_INTR)); - pr_info("\t MMC Low Interrupt (offset 0x%x): 0x%08x\n", - MMC_LOW_INTR, readl(ioaddr + MMC_LOW_INTR)); - pr_info("\t MMC High Interrupt Mask (offset 0x%x): 0x%08x\n", - MMC_HIGH_INTR_MASK, readl(ioaddr + MMC_HIGH_INTR_MASK)); - pr_info("\t MMC Low Interrupt Mask (offset 0x%x): 0x%08x\n", - MMC_LOW_INTR_MASK, readl(ioaddr + MMC_LOW_INTR_MASK)); } static void dwmac100_irq_status(void __iomem *ioaddr) |